free_list.cc revision 2665
11689SN/A/* 21689SN/A * Copyright (c) 2004-2005 The Regents of The University of Michigan 31689SN/A * All rights reserved. 41689SN/A * 51689SN/A * Redistribution and use in source and binary forms, with or without 61689SN/A * modification, are permitted provided that the following conditions are 71689SN/A * met: redistributions of source code must retain the above copyright 81689SN/A * notice, this list of conditions and the following disclaimer; 91689SN/A * redistributions in binary form must reproduce the above copyright 101689SN/A * notice, this list of conditions and the following disclaimer in the 111689SN/A * documentation and/or other materials provided with the distribution; 121689SN/A * neither the name of the copyright holders nor the names of its 131689SN/A * contributors may be used to endorse or promote products derived from 141689SN/A * this software without specific prior written permission. 151689SN/A * 161689SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 171689SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 181689SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 191689SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 201689SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 211689SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 221689SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 231689SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 241689SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 251689SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 261689SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu * 282665Ssaidi@eecs.umich.edu * Authors: Kevin Lim 291689SN/A */ 301689SN/A 311061SN/A#include "base/trace.hh" 321061SN/A 331717SN/A#include "cpu/o3/free_list.hh" 341060SN/A 351060SN/ASimpleFreeList::SimpleFreeList(unsigned _numLogicalIntRegs, 361060SN/A unsigned _numPhysicalIntRegs, 371060SN/A unsigned _numLogicalFloatRegs, 381060SN/A unsigned _numPhysicalFloatRegs) 391060SN/A : numLogicalIntRegs(_numLogicalIntRegs), 401060SN/A numPhysicalIntRegs(_numPhysicalIntRegs), 411060SN/A numLogicalFloatRegs(_numLogicalFloatRegs), 421060SN/A numPhysicalFloatRegs(_numPhysicalFloatRegs), 431060SN/A numPhysicalRegs(numPhysicalIntRegs + numPhysicalFloatRegs) 441060SN/A{ 451061SN/A DPRINTF(FreeList, "FreeList: Creating new free list object.\n"); 461061SN/A 471061SN/A // DEBUG stuff. 481061SN/A freeIntRegsScoreboard.resize(numPhysicalIntRegs); 491061SN/A 501061SN/A freeFloatRegsScoreboard.resize(numPhysicalRegs); 511061SN/A 521061SN/A for (PhysRegIndex i = 0; i < numLogicalIntRegs; ++i) { 531061SN/A freeIntRegsScoreboard[i] = 0; 541061SN/A } 551060SN/A 561060SN/A // Put all of the extra physical registers onto the free list. This 571060SN/A // means excluding all of the base logical registers. 581060SN/A for (PhysRegIndex i = numLogicalIntRegs; 591060SN/A i < numPhysicalIntRegs; ++i) 601060SN/A { 611060SN/A freeIntRegs.push(i); 621061SN/A 631061SN/A freeIntRegsScoreboard[i] = 1; 641061SN/A } 651061SN/A 661061SN/A for (PhysRegIndex i = 0; i < numPhysicalIntRegs + numLogicalFloatRegs; 671061SN/A ++i) 681061SN/A { 691061SN/A freeFloatRegsScoreboard[i] = 0; 701060SN/A } 711060SN/A 721060SN/A // Put all of the extra physical registers onto the free list. This 731060SN/A // means excluding all of the base logical registers. Because the 741060SN/A // float registers' indices start where the physical registers end, 751060SN/A // some math must be done to determine where the free registers start. 761060SN/A for (PhysRegIndex i = numPhysicalIntRegs + numLogicalFloatRegs; 771060SN/A i < numPhysicalRegs; ++i) 781060SN/A { 791060SN/A freeFloatRegs.push(i); 801061SN/A 811061SN/A freeFloatRegsScoreboard[i] = 1; 821060SN/A } 831060SN/A} 841060SN/A 85