dyn_inst_impl.hh revision 1689
16657Snate@binkert.org/* 26657Snate@binkert.org * Copyright (c) 2004-2005 The Regents of The University of Michigan 36657Snate@binkert.org * All rights reserved. 46657Snate@binkert.org * 56657Snate@binkert.org * Redistribution and use in source and binary forms, with or without 66657Snate@binkert.org * modification, are permitted provided that the following conditions are 76657Snate@binkert.org * met: redistributions of source code must retain the above copyright 86657Snate@binkert.org * notice, this list of conditions and the following disclaimer; 96657Snate@binkert.org * redistributions in binary form must reproduce the above copyright 106657Snate@binkert.org * notice, this list of conditions and the following disclaimer in the 116657Snate@binkert.org * documentation and/or other materials provided with the distribution; 126657Snate@binkert.org * neither the name of the copyright holders nor the names of its 136657Snate@binkert.org * contributors may be used to endorse or promote products derived from 146657Snate@binkert.org * this software without specific prior written permission. 156657Snate@binkert.org * 166657Snate@binkert.org * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 176657Snate@binkert.org * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 186657Snate@binkert.org * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 196657Snate@binkert.org * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 206657Snate@binkert.org * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 216657Snate@binkert.org * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 226657Snate@binkert.org * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 236657Snate@binkert.org * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 246657Snate@binkert.org * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 256657Snate@binkert.org * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 266657Snate@binkert.org * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 276657Snate@binkert.org */ 288453Snate@binkert.org 296657Snate@binkert.org#include "cpu/beta_cpu/alpha_dyn_inst.hh" 306657Snate@binkert.org 316657Snate@binkert.orgtemplate <class Impl> 326657Snate@binkert.orgAlphaDynInst<Impl>::AlphaDynInst(MachInst inst, Addr PC, Addr Pred_PC, 336657Snate@binkert.org InstSeqNum seq_num, FullCPU *cpu) 346657Snate@binkert.org : BaseDynInst<Impl>(inst, PC, Pred_PC, seq_num, cpu) 356657Snate@binkert.org{ 366999Snate@binkert.org // Make sure to have the renamed register entries set to the same 376999Snate@binkert.org // as the normal register entries. It will allow the IQ to work 386999Snate@binkert.org // without any modifications. 396657Snate@binkert.org for (int i = 0; i < this->staticInst->numDestRegs(); i++) 406657Snate@binkert.org { 416657Snate@binkert.org _destRegIdx[i] = this->staticInst->destRegIdx(i); 426657Snate@binkert.org } 436657Snate@binkert.org 446657Snate@binkert.org for (int i = 0; i < this->staticInst->numSrcRegs(); i++) 456657Snate@binkert.org { 468453Snate@binkert.org _srcRegIdx[i] = this->staticInst->srcRegIdx(i); 478453Snate@binkert.org this->_readySrcRegIdx[i] = 0; 486657Snate@binkert.org } 496657Snate@binkert.org 506657Snate@binkert.org} 516657Snate@binkert.org 526657Snate@binkert.orgtemplate <class Impl> 536999Snate@binkert.orgAlphaDynInst<Impl>::AlphaDynInst(StaticInstPtr<AlphaISA> &_staticInst) 546999Snate@binkert.org : BaseDynInst<Impl>(_staticInst) 556999Snate@binkert.org{ 566657Snate@binkert.org // Make sure to have the renamed register entries set to the same 576657Snate@binkert.org // as the normal register entries. It will allow the IQ to work 586657Snate@binkert.org // without any modifications. 596657Snate@binkert.org for (int i = 0; i < _staticInst->numDestRegs(); i++) 606657Snate@binkert.org { 616657Snate@binkert.org _destRegIdx[i] = _staticInst->destRegIdx(i); 626657Snate@binkert.org } 636657Snate@binkert.org 646657Snate@binkert.org for (int i = 0; i < _staticInst->numSrcRegs(); i++) 659767Slena@cs.wisc.edu { 669767Slena@cs.wisc.edu _srcRegIdx[i] = _staticInst->srcRegIdx(i); 6710985SBrad.Beckmann@amd.com } 689767Slena@cs.wisc.edu} 699767Slena@cs.wisc.edu 706657Snate@binkert.orgtemplate <class Impl> 716657Snate@binkert.orguint64_t 726657Snate@binkert.orgAlphaDynInst<Impl>::readUniq() 736657Snate@binkert.org{ 746657Snate@binkert.org return this->cpu->readUniq(); 756657Snate@binkert.org} 766657Snate@binkert.org 776657Snate@binkert.orgtemplate <class Impl> 786657Snate@binkert.orgvoid 796657Snate@binkert.orgAlphaDynInst<Impl>::setUniq(uint64_t val) 806657Snate@binkert.org{ 816794SBrad.Beckmann@amd.com this->cpu->setUniq(val); 8210953Sdavid.hashe@amd.com} 8310953Sdavid.hashe@amd.com 846657Snate@binkert.orgtemplate <class Impl> 856657Snate@binkert.orguint64_t 866657Snate@binkert.orgAlphaDynInst<Impl>::readFpcr() 876657Snate@binkert.org{ 886657Snate@binkert.org return this->cpu->readFpcr(); 896657Snate@binkert.org} 906657Snate@binkert.org 916657Snate@binkert.orgtemplate <class Impl> 926657Snate@binkert.orgvoid 936657Snate@binkert.orgAlphaDynInst<Impl>::setFpcr(uint64_t val) 946657Snate@binkert.org{ 956657Snate@binkert.org this->cpu->setFpcr(val); 966657Snate@binkert.org} 976657Snate@binkert.org 986657Snate@binkert.org#ifdef FULL_SYSTEM 996657Snate@binkert.orgtemplate <class Impl> 1006657Snate@binkert.orguint64_t 1016657Snate@binkert.orgAlphaDynInst<Impl>::readIpr(int idx, Fault &fault) 1026657Snate@binkert.org{ 1036657Snate@binkert.org return this->cpu->readIpr(idx, fault); 1046657Snate@binkert.org} 1056657Snate@binkert.org 1066657Snate@binkert.orgtemplate <class Impl> 1076657Snate@binkert.orgFault 1086657Snate@binkert.orgAlphaDynInst<Impl>::setIpr(int idx, uint64_t val) 1096657Snate@binkert.org{ 1106657Snate@binkert.org return this->cpu->setIpr(idx, val); 1116657Snate@binkert.org} 1126657Snate@binkert.org 1136657Snate@binkert.orgtemplate <class Impl> 1146657Snate@binkert.orgFault 1156657Snate@binkert.orgAlphaDynInst<Impl>::hwrei() 1166657Snate@binkert.org{ 1176657Snate@binkert.org return this->cpu->hwrei(); 1186657Snate@binkert.org} 1196657Snate@binkert.org 1206657Snate@binkert.orgtemplate <class Impl> 1216657Snate@binkert.orgint 1226657Snate@binkert.orgAlphaDynInst<Impl>::readIntrFlag() 1236657Snate@binkert.org{ 1246657Snate@binkert.orgreturn this->cpu->readIntrFlag(); 1259219Spower.jg@gmail.com} 1268453Snate@binkert.org 1278453Snate@binkert.orgtemplate <class Impl> 1286999Snate@binkert.orgvoid 1299219Spower.jg@gmail.comAlphaDynInst<Impl>::setIntrFlag(int val) 1306657Snate@binkert.org{ 1319219Spower.jg@gmail.com this->cpu->setIntrFlag(val); 1329219Spower.jg@gmail.com} 1339219Spower.jg@gmail.com 1346657Snate@binkert.orgtemplate <class Impl> 1356657Snate@binkert.orgbool 13614184Sgabeblack@google.comAlphaDynInst<Impl>::inPalMode() 1376657Snate@binkert.org{ 1386657Snate@binkert.org return this->cpu->inPalMode(); 1396657Snate@binkert.org} 1406657Snate@binkert.org 1419219Spower.jg@gmail.comtemplate <class Impl> 1426657Snate@binkert.orgvoid 1436657Snate@binkert.orgAlphaDynInst<Impl>::trap(Fault fault) 1448453Snate@binkert.org{ 1458453Snate@binkert.org this->cpu->trap(fault); 1466657Snate@binkert.org} 1476657Snate@binkert.org 1486657Snate@binkert.orgtemplate <class Impl> 1496657Snate@binkert.orgbool 1506657Snate@binkert.orgAlphaDynInst<Impl>::simPalCheck(int palFunc) 1516657Snate@binkert.org{ 1526999Snate@binkert.org return this->cpu->simPalCheck(palFunc); 1536657Snate@binkert.org} 1546657Snate@binkert.org#else 1556657Snate@binkert.orgtemplate <class Impl> 1566657Snate@binkert.orgvoid 1576657Snate@binkert.orgAlphaDynInst<Impl>::syscall() 1586657Snate@binkert.org{ 1596657Snate@binkert.org this->cpu->syscall(this->threadNumber); 1606657Snate@binkert.org} 1616657Snate@binkert.org#endif 1626657Snate@binkert.org 1636657Snate@binkert.org