dyn_inst.hh revision 4149:3da926f8ea75
1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Korey Sewell 29 */ 30 31#ifndef __CPU_O3_DYN_INST_HH__ 32#define __CPU_O3_DYN_INST_HH__ 33 34#include "arch/isa_specific.hh" 35 36#if THE_ISA == ALPHA_ISA 37 template <class Impl> class AlphaDynInst; 38 struct AlphaSimpleImpl; 39 typedef AlphaDynInst<AlphaSimpleImpl> O3DynInst; 40#elif THE_ISA == MIPS_ISA 41 template <class Impl> class MipsDynInst; 42 struct MipsSimpleImpl; 43 typedef MipsDynInst<MipsSimpleImpl> O3DynInst; 44#elif THE_ISA == SPARC_ISA 45 template <class Impl> class SparcDynInst; 46 struct SparcSimpleImpl; 47 typedef SparcDynInst<SparcSimpleImpl> O3DynInst; 48#elif THE_ISA == X86_ISA 49 template <class Impl> class X86DynInst; 50 struct X86SimpleImpl; 51 typedef X86DynInst<X86SimpleImpl> O3DynInst; 52#else 53 #error "O3DynInst not defined for this ISA" 54#endif 55 56#endif // __CPU_O3_DYN_INST_HH__ 57