deriv.cc revision 8793
110259SAndrew.Bardsley@arm.com/* 213953Sgiacomo.gabrielli@arm.com * Copyright (c) 2004-2006 The Regents of The University of Michigan 310259SAndrew.Bardsley@arm.com * All rights reserved. 410259SAndrew.Bardsley@arm.com * 510259SAndrew.Bardsley@arm.com * Redistribution and use in source and binary forms, with or without 610259SAndrew.Bardsley@arm.com * modification, are permitted provided that the following conditions are 710259SAndrew.Bardsley@arm.com * met: redistributions of source code must retain the above copyright 810259SAndrew.Bardsley@arm.com * notice, this list of conditions and the following disclaimer; 910259SAndrew.Bardsley@arm.com * redistributions in binary form must reproduce the above copyright 1010259SAndrew.Bardsley@arm.com * notice, this list of conditions and the following disclaimer in the 1110259SAndrew.Bardsley@arm.com * documentation and/or other materials provided with the distribution; 1210259SAndrew.Bardsley@arm.com * neither the name of the copyright holders nor the names of its 1310259SAndrew.Bardsley@arm.com * contributors may be used to endorse or promote products derived from 1410259SAndrew.Bardsley@arm.com * this software without specific prior written permission. 1510259SAndrew.Bardsley@arm.com * 1610259SAndrew.Bardsley@arm.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1710259SAndrew.Bardsley@arm.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1810259SAndrew.Bardsley@arm.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 1910259SAndrew.Bardsley@arm.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2010259SAndrew.Bardsley@arm.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2110259SAndrew.Bardsley@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2210259SAndrew.Bardsley@arm.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2310259SAndrew.Bardsley@arm.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2410259SAndrew.Bardsley@arm.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2510259SAndrew.Bardsley@arm.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2610259SAndrew.Bardsley@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2710259SAndrew.Bardsley@arm.com * 2810259SAndrew.Bardsley@arm.com * Authors: Kevin Lim 2910259SAndrew.Bardsley@arm.com */ 3010259SAndrew.Bardsley@arm.com 3110259SAndrew.Bardsley@arm.com#include <string> 3210259SAndrew.Bardsley@arm.com 3310259SAndrew.Bardsley@arm.com#include "config/full_system.hh" 3410259SAndrew.Bardsley@arm.com#include "config/use_checker.hh" 3510259SAndrew.Bardsley@arm.com#include "cpu/o3/cpu.hh" 3610259SAndrew.Bardsley@arm.com#include "cpu/o3/impl.hh" 3710259SAndrew.Bardsley@arm.com#include "params/DerivO3CPU.hh" 3810259SAndrew.Bardsley@arm.com 3910259SAndrew.Bardsley@arm.comclass DerivO3CPU : public FullO3CPU<O3CPUImpl> 4010259SAndrew.Bardsley@arm.com{ 4110259SAndrew.Bardsley@arm.com public: 4210259SAndrew.Bardsley@arm.com DerivO3CPU(DerivO3CPUParams *p) 4310259SAndrew.Bardsley@arm.com : FullO3CPU<O3CPUImpl>(p) 4410259SAndrew.Bardsley@arm.com { } 4510259SAndrew.Bardsley@arm.com}; 4610259SAndrew.Bardsley@arm.com 4710259SAndrew.Bardsley@arm.comDerivO3CPU * 4810259SAndrew.Bardsley@arm.comDerivO3CPUParams::create() 4910259SAndrew.Bardsley@arm.com{ 5010259SAndrew.Bardsley@arm.com ThreadID actual_num_threads; 5110259SAndrew.Bardsley@arm.com if (FullSystem) { 5210259SAndrew.Bardsley@arm.com // Full-system only supports a single thread for the moment. 5310259SAndrew.Bardsley@arm.com actual_num_threads = 1; 5410259SAndrew.Bardsley@arm.com } else { 5510259SAndrew.Bardsley@arm.com if (workload.size() > numThreads) { 5610319SAndreas.Sandberg@ARM.com fatal("Workload Size (%i) > Max Supported Threads (%i) on This CPU", 5710259SAndrew.Bardsley@arm.com workload.size(), numThreads); 5810259SAndrew.Bardsley@arm.com } else if (workload.size() == 0) { 5910259SAndrew.Bardsley@arm.com fatal("Must specify at least one workload!"); 6010259SAndrew.Bardsley@arm.com } 6111608Snikos.nikoleris@arm.com 6210259SAndrew.Bardsley@arm.com // In non-full-system mode, we infer the number of threads from 6310259SAndrew.Bardsley@arm.com // the workload if it's not explicitly specified. 6410259SAndrew.Bardsley@arm.com actual_num_threads = 6510259SAndrew.Bardsley@arm.com (numThreads >= workload.size()) ? numThreads : workload.size(); 6610259SAndrew.Bardsley@arm.com } 6710259SAndrew.Bardsley@arm.com 6810259SAndrew.Bardsley@arm.com numThreads = actual_num_threads; 6910259SAndrew.Bardsley@arm.com 7010259SAndrew.Bardsley@arm.com // Default smtFetchPolicy to "RoundRobin", if necessary. 7110259SAndrew.Bardsley@arm.com std::string round_robin_policy = "RoundRobin"; 7210259SAndrew.Bardsley@arm.com std::string single_thread = "SingleThread"; 7310259SAndrew.Bardsley@arm.com 7410319SAndreas.Sandberg@ARM.com if (actual_num_threads > 1 && single_thread.compare(smtFetchPolicy) == 0) 7510259SAndrew.Bardsley@arm.com smtFetchPolicy = round_robin_policy; 7610259SAndrew.Bardsley@arm.com else 7710259SAndrew.Bardsley@arm.com smtFetchPolicy = smtFetchPolicy; 7810259SAndrew.Bardsley@arm.com 7910259SAndrew.Bardsley@arm.com instShiftAmt = 2; 8010259SAndrew.Bardsley@arm.com 8110259SAndrew.Bardsley@arm.com return new DerivO3CPU(this); 8210259SAndrew.Bardsley@arm.com} 8310259SAndrew.Bardsley@arm.com