cpu_policy.hh revision 1717
1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29#ifndef __CPU_BETA_CPU_CPU_POLICY_HH__ 30#define __CPU_BETA_CPU_CPU_POLICY_HH__ 31 32#include "cpu/o3/bpred_unit.hh" 33#include "cpu/o3/free_list.hh" 34#include "cpu/o3/inst_queue.hh" 35#include "cpu/o3/ldstq.hh" 36#include "cpu/o3/mem_dep_unit.hh" 37#include "cpu/o3/regfile.hh" 38#include "cpu/o3/rename_map.hh" 39#include "cpu/o3/rob.hh" 40#include "cpu/o3/store_set.hh" 41 42#include "cpu/o3/commit.hh" 43#include "cpu/o3/decode.hh" 44#include "cpu/o3/fetch.hh" 45#include "cpu/o3/iew.hh" 46#include "cpu/o3/rename.hh" 47 48#include "cpu/o3/comm.hh" 49 50template<class Impl> 51struct SimpleCPUPolicy 52{ 53 typedef TwobitBPredUnit<Impl> BPredUnit; 54 typedef PhysRegFile<Impl> RegFile; 55 typedef SimpleFreeList FreeList; 56 typedef SimpleRenameMap RenameMap; 57 typedef ROB<Impl> ROB; 58 typedef InstructionQueue<Impl> IQ; 59 typedef MemDepUnit<StoreSet, Impl> MemDepUnit; 60 typedef LDSTQ<Impl> LDSTQ; 61 62 typedef SimpleFetch<Impl> Fetch; 63 typedef SimpleDecode<Impl> Decode; 64 typedef SimpleRename<Impl> Rename; 65 typedef SimpleIEW<Impl> IEW; 66 typedef SimpleCommit<Impl> Commit; 67 68 /** The struct for communication between fetch and decode. */ 69 typedef SimpleFetchSimpleDecode<Impl> FetchStruct; 70 71 /** The struct for communication between decode and rename. */ 72 typedef SimpleDecodeSimpleRename<Impl> DecodeStruct; 73 74 /** The struct for communication between rename and IEW. */ 75 typedef SimpleRenameSimpleIEW<Impl> RenameStruct; 76 77 /** The struct for communication between IEW and commit. */ 78 typedef SimpleIEWSimpleCommit<Impl> IEWStruct; 79 80 /** The struct for communication within the IEW stage. */ 81 typedef IssueStruct<Impl> IssueStruct; 82 83 /** The struct for all backwards communication. */ 84 typedef TimeBufStruct TimeStruct; 85 86}; 87 88#endif //__CPU_BETA_CPU_CPU_POLICY_HH__ 89