SConscript revision 9259 
14202Sbinkertn@umich.edu# -*- mode:python -*-
24202Sbinkertn@umich.edu
34202Sbinkertn@umich.edu# Copyright (c) 2006 The Regents of The University of Michigan
44202Sbinkertn@umich.edu# All rights reserved.
54202Sbinkertn@umich.edu#
64202Sbinkertn@umich.edu# Redistribution and use in source and binary forms, with or without
74202Sbinkertn@umich.edu# modification, are permitted provided that the following conditions are
84202Sbinkertn@umich.edu# met: redistributions of source code must retain the above copyright
94202Sbinkertn@umich.edu# notice, this list of conditions and the following disclaimer;
104202Sbinkertn@umich.edu# redistributions in binary form must reproduce the above copyright
114202Sbinkertn@umich.edu# notice, this list of conditions and the following disclaimer in the
124202Sbinkertn@umich.edu# documentation and/or other materials provided with the distribution;
134202Sbinkertn@umich.edu# neither the name of the copyright holders nor the names of its
144202Sbinkertn@umich.edu# contributors may be used to endorse or promote products derived from
154202Sbinkertn@umich.edu# this software without specific prior written permission.
164202Sbinkertn@umich.edu#
174202Sbinkertn@umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
184202Sbinkertn@umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
194202Sbinkertn@umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
204202Sbinkertn@umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
214202Sbinkertn@umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
224202Sbinkertn@umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
234202Sbinkertn@umich.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
244202Sbinkertn@umich.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
254202Sbinkertn@umich.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
264202Sbinkertn@umich.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
274202Sbinkertn@umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
284202Sbinkertn@umich.edu#
294202Sbinkertn@umich.edu# Authors: Nathan Binkert
304202Sbinkertn@umich.edu
314202Sbinkertn@umich.eduimport sys
324202Sbinkertn@umich.edu
334486Sbinkertn@umich.eduImport('*')
344486Sbinkertn@umich.edu
356165Ssanchezd@stanford.eduif 'O3CPU' in env['CPU_MODELS'] or 'OzoneCPU' in env['CPU_MODELS']:
364486Sbinkertn@umich.edu    DebugFlag('CommitRate')
376168Snate@binkert.org    DebugFlag('IEW')
386168Snate@binkert.org    DebugFlag('IQ')
396168Snate@binkert.org
404486Sbinkertn@umich.eduif 'O3CPU' in env['CPU_MODELS']:
414202Sbinkertn@umich.edu    SimObject('FUPool.py')
424202Sbinkertn@umich.edu    SimObject('FuncUnitConfig.py')
434202Sbinkertn@umich.edu    SimObject('O3CPU.py')
444202Sbinkertn@umich.edu
454202Sbinkertn@umich.edu    Source('base_dyn_inst.cc')
464202Sbinkertn@umich.edu    Source('bpred_unit.cc')
474202Sbinkertn@umich.edu    Source('commit.cc')
484202Sbinkertn@umich.edu    Source('cpu.cc')
495650Sgblack@eecs.umich.edu    Source('cpu_builder.cc')
506168Snate@binkert.org    Source('decode.cc')
516168Snate@binkert.org    Source('dyn_inst.cc')
526168Snate@binkert.org    Source('fetch.cc')
534202Sbinkertn@umich.edu    Source('free_list.cc')
544202Sbinkertn@umich.edu    Source('fu_pool.cc')
554202Sbinkertn@umich.edu    Source('iew.cc')
564202Sbinkertn@umich.edu    Source('inst_queue.cc')
574202Sbinkertn@umich.edu    Source('lsq.cc')
584202Sbinkertn@umich.edu    Source('lsq_unit.cc')
595192Ssaidi@eecs.umich.edu    Source('mem_dep_unit.cc')
605192Ssaidi@eecs.umich.edu    Source('rename.cc')
615192Ssaidi@eecs.umich.edu    Source('rename_map.cc')
625192Ssaidi@eecs.umich.edu    Source('rob.cc')
635192Ssaidi@eecs.umich.edu    Source('scoreboard.cc')
645192Ssaidi@eecs.umich.edu    Source('store_set.cc')
655192Ssaidi@eecs.umich.edu    Source('thread_context.cc')
66
67    DebugFlag('LSQ')
68    DebugFlag('LSQUnit')
69    DebugFlag('MemDepUnit')
70    DebugFlag('O3CPU')
71    DebugFlag('ROB')
72    DebugFlag('Rename')
73    DebugFlag('Scoreboard')
74    DebugFlag('StoreSet')
75    DebugFlag('Writeback')
76
77    CompoundFlag('O3CPUAll', [ 'Fetch', 'Decode', 'Rename', 'IEW', 'Commit',
78        'IQ', 'ROB', 'FreeList', 'LSQ', 'LSQUnit', 'StoreSet', 'MemDepUnit',
79        'DynInst', 'O3CPU', 'Activity', 'Scoreboard', 'Writeback' ])
80
81    SimObject('O3Checker.py')
82    Source('checker_builder.cc')
83