SConscript revision 8233
112SN/A# -*- mode:python -*- 210037SARM gem5 Developers 310037SARM gem5 Developers# Copyright (c) 2006 The Regents of The University of Michigan 410037SARM gem5 Developers# All rights reserved. 510037SARM gem5 Developers# 610037SARM gem5 Developers# Redistribution and use in source and binary forms, with or without 710037SARM gem5 Developers# modification, are permitted provided that the following conditions are 810037SARM gem5 Developers# met: redistributions of source code must retain the above copyright 910037SARM gem5 Developers# notice, this list of conditions and the following disclaimer; 1010037SARM gem5 Developers# redistributions in binary form must reproduce the above copyright 1110037SARM gem5 Developers# notice, this list of conditions and the following disclaimer in the 1210037SARM gem5 Developers# documentation and/or other materials provided with the distribution; 1310037SARM gem5 Developers# neither the name of the copyright holders nor the names of its 141762SN/A# contributors may be used to endorse or promote products derived from 1512SN/A# this software without specific prior written permission. 1612SN/A# 1712SN/A# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1812SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1912SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2012SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2112SN/A# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2212SN/A# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2312SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2412SN/A# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2512SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2612SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2712SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2812SN/A# 2912SN/A# Authors: Nathan Binkert 3012SN/A 3112SN/Aimport sys 3212SN/A 3312SN/AImport('*') 3412SN/A 3512SN/Aif 'O3CPU' in env['CPU_MODELS'] or 'OzoneCPU' in env['CPU_MODELS']: 3612SN/A TraceFlag('CommitRate') 3712SN/A TraceFlag('IEW') 3812SN/A TraceFlag('IQ') 392665Ssaidi@eecs.umich.edu 402665Ssaidi@eecs.umich.eduif 'O3CPU' in env['CPU_MODELS']: 412665Ssaidi@eecs.umich.edu SimObject('FUPool.py') 4212SN/A SimObject('FuncUnitConfig.py') 4312SN/A SimObject('O3CPU.py') 4411389Sbrandon.potter@amd.com 4511389Sbrandon.potter@amd.com Source('base_dyn_inst.cc') 4611389Sbrandon.potter@amd.com Source('bpred_unit.cc') 4711389Sbrandon.potter@amd.com Source('commit.cc') 4811389Sbrandon.potter@amd.com Source('cpu.cc') 4911389Sbrandon.potter@amd.com Source('cpu_builder.cc') 5011389Sbrandon.potter@amd.com Source('decode.cc') 5111389Sbrandon.potter@amd.com Source('dyn_inst.cc') 525616Snate@binkert.org Source('fetch.cc') 5312SN/A Source('free_list.cc') 5412SN/A Source('fu_pool.cc') 5511389Sbrandon.potter@amd.com Source('iew.cc') 564484Sbinkertn@umich.edu Source('inst_queue.cc') 572439SN/A Source('lsq.cc') 587676Snate@binkert.org Source('lsq_unit.cc') 598232Snate@binkert.org Source('mem_dep_unit.cc') 6011389Sbrandon.potter@amd.com Source('rename.cc') 612423SN/A Source('rename_map.cc') 622423SN/A Source('rob.cc') 6312SN/A Source('scoreboard.cc') 6411391Sbrandon.potter@amd.com Source('store_set.cc') 6511389Sbrandon.potter@amd.com Source('thread_context.cc') 6612SN/A 67468SN/A TraceFlag('LSQ') 681708SN/A TraceFlag('LSQUnit') 691708SN/A TraceFlag('MemDepUnit') 70443SN/A TraceFlag('O3CPU') 71468SN/A TraceFlag('ROB') 7211391Sbrandon.potter@amd.com TraceFlag('Rename') 7311391Sbrandon.potter@amd.com TraceFlag('Scoreboard') 7411391Sbrandon.potter@amd.com TraceFlag('StoreSet') 75443SN/A TraceFlag('Writeback') 7611391Sbrandon.potter@amd.com 7710037SARM gem5 Developers CompoundFlag('O3CPUAll', [ 'Fetch', 'Decode', 'Rename', 'IEW', 'Commit', 78443SN/A 'IQ', 'ROB', 'FreeList', 'LSQ', 'LSQUnit', 'StoreSet', 'MemDepUnit', 79443SN/A 'DynInst', 'O3CPU', 'Activity', 'Scoreboard', 'Writeback' ]) 80443SN/A 8111391Sbrandon.potter@amd.com if env['USE_CHECKER']: 8211391Sbrandon.potter@amd.com SimObject('O3Checker.py') 8311391Sbrandon.potter@amd.com Source('checker_builder.cc') 8411391Sbrandon.potter@amd.com