SConscript revision 2972
16019Shines@cs.fsu.edu# -*- mode:python -*-
26019Shines@cs.fsu.edu
310037SARM gem5 Developers# Copyright (c) 2006 The Regents of The University of Michigan
47100Sgblack@eecs.umich.edu# All rights reserved.
57100Sgblack@eecs.umich.edu#
67100Sgblack@eecs.umich.edu# Redistribution and use in source and binary forms, with or without
77100Sgblack@eecs.umich.edu# modification, are permitted provided that the following conditions are
87100Sgblack@eecs.umich.edu# met: redistributions of source code must retain the above copyright
97100Sgblack@eecs.umich.edu# notice, this list of conditions and the following disclaimer;
107100Sgblack@eecs.umich.edu# redistributions in binary form must reproduce the above copyright
117100Sgblack@eecs.umich.edu# notice, this list of conditions and the following disclaimer in the
127100Sgblack@eecs.umich.edu# documentation and/or other materials provided with the distribution;
137100Sgblack@eecs.umich.edu# neither the name of the copyright holders nor the names of its
147100Sgblack@eecs.umich.edu# contributors may be used to endorse or promote products derived from
156019Shines@cs.fsu.edu# this software without specific prior written permission.
166019Shines@cs.fsu.edu#
176019Shines@cs.fsu.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
186019Shines@cs.fsu.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
196019Shines@cs.fsu.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
206019Shines@cs.fsu.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
216019Shines@cs.fsu.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
226019Shines@cs.fsu.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
236019Shines@cs.fsu.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
246019Shines@cs.fsu.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
256019Shines@cs.fsu.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
266019Shines@cs.fsu.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
276019Shines@cs.fsu.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
286019Shines@cs.fsu.edu#
296019Shines@cs.fsu.edu# Authors: Korey Sewell
306019Shines@cs.fsu.edu
316019Shines@cs.fsu.eduimport os
326019Shines@cs.fsu.eduimport os.path
336019Shines@cs.fsu.eduimport sys
346019Shines@cs.fsu.edu
356019Shines@cs.fsu.edu# Import build environment variable from SConstruct.
366019Shines@cs.fsu.eduImport('env')
376019Shines@cs.fsu.edu
386019Shines@cs.fsu.edu
396019Shines@cs.fsu.edu#################################################################
406019Shines@cs.fsu.edu#
416019Shines@cs.fsu.edu# Include ISA-specific files for the O3 CPU-model
426757SAli.Saidi@ARM.com#
436019Shines@cs.fsu.edu#################################################################
446019Shines@cs.fsu.edu
456019Shines@cs.fsu.edusources = []
466019Shines@cs.fsu.edu
476019Shines@cs.fsu.eduif env['TARGET_ISA'] == 'alpha':
486019Shines@cs.fsu.edu    sources += Split('''
496019Shines@cs.fsu.edu        alpha/dyn_inst.cc
509022Sgblack@eecs.umich.edu        alpha/cpu.cc
516019Shines@cs.fsu.edu        alpha/thread_context.cc
5210037SARM gem5 Developers        alpha/cpu_builder.cc
5310037SARM gem5 Developers        ''')
547170Sgblack@eecs.umich.eduelif env['TARGET_ISA'] == 'mips':
556253Sgblack@eecs.umich.edu    sources += Split('''
5610037SARM gem5 Developers        mips/dyn_inst.cc
577202Sgblack@eecs.umich.edu        mips/cpu.cc
5810037SARM gem5 Developers        mips/thread_context.cc
596253Sgblack@eecs.umich.edu        mips/cpu_builder.cc
6010611SAndreas.Sandberg@ARM.com        ''')
616253Sgblack@eecs.umich.eduelif env['TARGET_ISA'] == 'sparc':
627396Sgblack@eecs.umich.edu    sys.exit('O3 CPU does not support Sparc')
6310037SARM gem5 Developers    #sources += Split('''
648745Sgblack@eecs.umich.edu    #    sparc/dyn_inst.cc
657405SAli.Saidi@ARM.com    #    sparc/cpu.cc
6610461SAndreas.Sandberg@ARM.com    #    sparc/thread_context.cc
678782Sgblack@eecs.umich.edu    #    sparc/cpu_builder.cc
688782Sgblack@eecs.umich.edu    #    ''')
698782Sgblack@eecs.umich.eduelse:
7010810Sbr@bsdpad.com    sys.exit('O3 CPU does not support the \'%s\' ISA' % env['TARGET_ISA'])
7110810Sbr@bsdpad.com
7210810Sbr@bsdpad.com
737259Sgblack@eecs.umich.edu# Convert file names to SCons File objects.  This takes care of the
748757Sgblack@eecs.umich.edu# path relative to the top of the directory tree.
7510461SAndreas.Sandberg@ARM.comsources = [File(s) for s in sources]
768782Sgblack@eecs.umich.edu
778757Sgblack@eecs.umich.eduReturn('sources')
788777Sgblack@eecs.umich.edu
798782Sgblack@eecs.umich.edu