nativetrace.hh revision 5049:16a0724434b8
1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Steve Reinhardt 29 * Nathan Binkert 30 */ 31 32#ifndef __NATIVETRACE_HH__ 33#define __NATIVETRACE_HH__ 34 35#include "base/trace.hh" 36#include "cpu/static_inst.hh" 37#include "sim/host.hh" 38#include "sim/insttracer.hh" 39#include "arch/x86/intregs.hh" 40#include "arch/x86/floatregs.hh" 41 42class ThreadContext; 43 44 45namespace Trace { 46 47class NativeTrace; 48 49class NativeTraceRecord : public InstRecord 50{ 51 protected: 52 NativeTrace * parent; 53 54 public: 55 NativeTraceRecord(NativeTrace * _parent, 56 Tick _when, ThreadContext *_thread, 57 const StaticInstPtr &_staticInst, Addr _pc, bool spec) 58 : InstRecord(_when, _thread, _staticInst, _pc, spec), parent(_parent) 59 { 60 } 61 62 void dump(); 63}; 64 65class NativeTrace : public InstTracer 66{ 67 protected: 68 int fd; 69 70 ListenSocket native_listener; 71 72 bool checkRcx; 73 bool checkR11; 74 uint64_t oldRcxVal, oldR11Val; 75 uint64_t oldRealRcxVal, oldRealR11Val; 76 77 struct ThreadState { 78 uint64_t rax; 79 uint64_t rcx; 80 uint64_t rdx; 81 uint64_t rbx; 82 uint64_t rsp; 83 uint64_t rbp; 84 uint64_t rsi; 85 uint64_t rdi; 86 uint64_t r8; 87 uint64_t r9; 88 uint64_t r10; 89 uint64_t r11; 90 uint64_t r12; 91 uint64_t r13; 92 uint64_t r14; 93 uint64_t r15; 94 uint64_t rip; 95 //This should be expanded to 16 if x87 registers are considered 96 uint64_t mmx[8]; 97 uint64_t xmm[32]; 98 99 void update(int fd) 100 { 101 int bytesLeft = sizeof(ThreadState); 102 int bytesRead = 0; 103 do 104 { 105 int res = read(fd, ((char *)this) + bytesRead, bytesLeft); 106 if(res < 0) 107 panic("Read call failed! %s\n", strerror(errno)); 108 bytesLeft -= res; 109 bytesRead += res; 110 } while(bytesLeft); 111 rax = TheISA::gtoh(rax); 112 rcx = TheISA::gtoh(rcx); 113 rdx = TheISA::gtoh(rdx); 114 rbx = TheISA::gtoh(rbx); 115 rsp = TheISA::gtoh(rsp); 116 rbp = TheISA::gtoh(rbp); 117 rsi = TheISA::gtoh(rsi); 118 rdi = TheISA::gtoh(rdi); 119 r8 = TheISA::gtoh(r8); 120 r9 = TheISA::gtoh(r9); 121 r10 = TheISA::gtoh(r10); 122 r11 = TheISA::gtoh(r11); 123 r12 = TheISA::gtoh(r12); 124 r13 = TheISA::gtoh(r13); 125 r14 = TheISA::gtoh(r14); 126 r15 = TheISA::gtoh(r15); 127 rip = TheISA::gtoh(rip); 128 //This should be expanded if x87 registers are considered 129 for (int i = 0; i < 8; i++) 130 mmx[i] = TheISA::gtoh(mmx[i]); 131 for (int i = 0; i < 32; i++) 132 xmm[i] = TheISA::gtoh(xmm[i]); 133 } 134 135 void update(ThreadContext * tc) 136 { 137 rax = tc->readIntReg(X86ISA::INTREG_RAX); 138 rcx = tc->readIntReg(X86ISA::INTREG_RCX); 139 rdx = tc->readIntReg(X86ISA::INTREG_RDX); 140 rbx = tc->readIntReg(X86ISA::INTREG_RBX); 141 rsp = tc->readIntReg(X86ISA::INTREG_RSP); 142 rbp = tc->readIntReg(X86ISA::INTREG_RBP); 143 rsi = tc->readIntReg(X86ISA::INTREG_RSI); 144 rdi = tc->readIntReg(X86ISA::INTREG_RDI); 145 r8 = tc->readIntReg(X86ISA::INTREG_R8); 146 r9 = tc->readIntReg(X86ISA::INTREG_R9); 147 r10 = tc->readIntReg(X86ISA::INTREG_R10); 148 r11 = tc->readIntReg(X86ISA::INTREG_R11); 149 r12 = tc->readIntReg(X86ISA::INTREG_R12); 150 r13 = tc->readIntReg(X86ISA::INTREG_R13); 151 r14 = tc->readIntReg(X86ISA::INTREG_R14); 152 r15 = tc->readIntReg(X86ISA::INTREG_R15); 153 rip = tc->readNextPC(); 154 //This should be expanded if x87 registers are considered 155 for (int i = 0; i < 8; i++) 156 mmx[i] = tc->readFloatRegBits(X86ISA::FLOATREG_MMX(i)); 157 for (int i = 0; i < 32; i++) 158 xmm[i] = tc->readFloatRegBits(X86ISA::FLOATREG_XMM_BASE + i); 159 } 160 161 }; 162 163 ThreadState nState; 164 ThreadState mState; 165 166 167 public: 168 169 template<class T> 170 bool 171 checkReg(const char * regName, T &val, T &realVal) 172 { 173 if(val != realVal) 174 { 175 DPRINTFN("Register %s should be %#x but is %#x.\n", 176 regName, realVal, val); 177 return false; 178 } 179 return true; 180 } 181 182 bool 183 checkRcxReg(const char * regName, uint64_t &, uint64_t &); 184 185 bool 186 checkR11Reg(const char * regName, uint64_t &, uint64_t &); 187 188 bool 189 checkXMM(int num, uint64_t mXmmBuf[], uint64_t nXmmBuf[]); 190 191 NativeTrace(const Params *p); 192 193 NativeTraceRecord * 194 getInstRecord(Tick when, ThreadContext *tc, 195 const StaticInstPtr staticInst, Addr pc) 196 { 197 if (tc->misspeculating()) 198 return NULL; 199 200 return new NativeTraceRecord(this, when, tc, 201 staticInst, pc, tc->misspeculating()); 202 } 203 204 void 205 check(ThreadContext *, bool syscall); 206 207 friend class NativeTraceRecord; 208}; 209 210/* namespace Trace */ } 211 212#endif // __EXETRACE_HH__ 213