BaseKvmCPU.py revision 9655
19651SAndreas.Sandberg@ARM.com# Copyright (c) 2012 ARM Limited
29651SAndreas.Sandberg@ARM.com# All rights reserved.
39651SAndreas.Sandberg@ARM.com#
49651SAndreas.Sandberg@ARM.com# The license below extends only to copyright in the software and shall
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69651SAndreas.Sandberg@ARM.com# property including but not limited to intellectual property relating
79651SAndreas.Sandberg@ARM.com# to a hardware implementation of the functionality of the software
89651SAndreas.Sandberg@ARM.com# licensed hereunder.  You may use the software subject to the license
99651SAndreas.Sandberg@ARM.com# terms below provided that you ensure that this notice is replicated
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119651SAndreas.Sandberg@ARM.com# modified or unmodified, in source code or in binary form.
129651SAndreas.Sandberg@ARM.com#
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149651SAndreas.Sandberg@ARM.com# modification, are permitted provided that the following conditions are
159651SAndreas.Sandberg@ARM.com# met: redistributions of source code must retain the above copyright
169651SAndreas.Sandberg@ARM.com# notice, this list of conditions and the following disclaimer;
179651SAndreas.Sandberg@ARM.com# redistributions in binary form must reproduce the above copyright
189651SAndreas.Sandberg@ARM.com# notice, this list of conditions and the following disclaimer in the
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229651SAndreas.Sandberg@ARM.com# this software without specific prior written permission.
239651SAndreas.Sandberg@ARM.com#
249651SAndreas.Sandberg@ARM.com# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
259651SAndreas.Sandberg@ARM.com# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
269651SAndreas.Sandberg@ARM.com# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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359651SAndreas.Sandberg@ARM.com#
369651SAndreas.Sandberg@ARM.com# Authors: Andreas Sandberg
379651SAndreas.Sandberg@ARM.com
389651SAndreas.Sandberg@ARM.comfrom m5.params import *
399651SAndreas.Sandberg@ARM.comfrom m5.proxy import *
409651SAndreas.Sandberg@ARM.com
419651SAndreas.Sandberg@ARM.comfrom BaseCPU import BaseCPU
429651SAndreas.Sandberg@ARM.comfrom KvmVM import KvmVM
439651SAndreas.Sandberg@ARM.com
449651SAndreas.Sandberg@ARM.comclass BaseKvmCPU(BaseCPU):
459651SAndreas.Sandberg@ARM.com    type = 'BaseKvmCPU'
469651SAndreas.Sandberg@ARM.com    cxx_header = "cpu/kvm/base.hh"
479651SAndreas.Sandberg@ARM.com    abstract = True
489651SAndreas.Sandberg@ARM.com
499651SAndreas.Sandberg@ARM.com    @classmethod
509651SAndreas.Sandberg@ARM.com    def export_method_cxx_predecls(cls, code):
519651SAndreas.Sandberg@ARM.com        code('#include "cpu/kvm/base.hh"')
529651SAndreas.Sandberg@ARM.com
539651SAndreas.Sandberg@ARM.com    @classmethod
549651SAndreas.Sandberg@ARM.com    def export_methods(cls, code):
559651SAndreas.Sandberg@ARM.com        code('''
569651SAndreas.Sandberg@ARM.com      void dump();
579651SAndreas.Sandberg@ARM.com''')
589651SAndreas.Sandberg@ARM.com
599651SAndreas.Sandberg@ARM.com    @classmethod
609651SAndreas.Sandberg@ARM.com    def memory_mode(cls):
619651SAndreas.Sandberg@ARM.com        return 'atomic_noncaching'
629651SAndreas.Sandberg@ARM.com
639651SAndreas.Sandberg@ARM.com    @classmethod
649651SAndreas.Sandberg@ARM.com    def require_caches(cls):
659651SAndreas.Sandberg@ARM.com        return False
669651SAndreas.Sandberg@ARM.com
679651SAndreas.Sandberg@ARM.com    @classmethod
689651SAndreas.Sandberg@ARM.com    def support_take_over(cls):
699651SAndreas.Sandberg@ARM.com        return True
709651SAndreas.Sandberg@ARM.com
719651SAndreas.Sandberg@ARM.com    kvmVM = Param.KvmVM(Parent.any, 'KVM VM (i.e., shared memory domain)')
729655SAndreas.Sandberg@ARM.com    usePerfOverflow = Param.Bool(False, "Use perf event overflow counters (EXPERIMENTAL)")
739651SAndreas.Sandberg@ARM.com    hostFactor = Param.Float(1.0, "Cycle scale factor")
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