inteltrace.cc revision 7720:65d338a8dba4 
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Steve Reinhardt
29 *          Lisa Hsu
30 *          Nathan Binkert
31 *          Steve Raasch
32 */
33
34#include <iomanip>
35
36#include "config/the_isa.hh"
37#include "cpu/exetrace.hh"
38#include "cpu/inteltrace.hh"
39#include "cpu/static_inst.hh"
40
41using namespace std;
42using namespace TheISA;
43
44namespace Trace {
45
46void
47Trace::IntelTraceRecord::dump()
48{
49    ostream &outs = Trace::output();
50    ccprintf(outs, "%7d ) ", when);
51    outs << "0x" << hex << pc.instAddr() << ":\t";
52    if (staticInst->isLoad()) {
53        ccprintf(outs, "<RD %#x>", addr);
54    } else if (staticInst->isStore()) {
55        ccprintf(outs, "<WR %#x>", addr);
56    }
57    outs << endl;
58}
59
60/* namespace Trace */ }
61
62////////////////////////////////////////////////////////////////////////
63//
64//  ExeTracer Simulation Object
65//
66Trace::IntelTrace *
67IntelTraceParams::create()
68{
69    return new Trace::IntelTrace(this);
70};
71