exetrace.cc revision 5866
11689SN/A/*
210596Sgabeblack@google.com * Copyright (c) 2001-2005 The Regents of The University of Michigan
310331Smitch.hayenga@arm.com * All rights reserved.
47783SGiacomo.Gabrielli@arm.com *
57783SGiacomo.Gabrielli@arm.com * Redistribution and use in source and binary forms, with or without
67783SGiacomo.Gabrielli@arm.com * modification, are permitted provided that the following conditions are
77783SGiacomo.Gabrielli@arm.com * met: redistributions of source code must retain the above copyright
87783SGiacomo.Gabrielli@arm.com * notice, this list of conditions and the following disclaimer;
97783SGiacomo.Gabrielli@arm.com * redistributions in binary form must reproduce the above copyright
107783SGiacomo.Gabrielli@arm.com * notice, this list of conditions and the following disclaimer in the
117783SGiacomo.Gabrielli@arm.com * documentation and/or other materials provided with the distribution;
127783SGiacomo.Gabrielli@arm.com * neither the name of the copyright holders nor the names of its
137783SGiacomo.Gabrielli@arm.com * contributors may be used to endorse or promote products derived from
147783SGiacomo.Gabrielli@arm.com * this software without specific prior written permission.
152316SN/A *
161689SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
171689SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
181689SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
191689SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
201689SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
211689SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
221689SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
231689SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
241689SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
251689SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
261689SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
271689SN/A *
281689SN/A * Authors: Steve Reinhardt
291689SN/A *          Lisa Hsu
301689SN/A *          Nathan Binkert
311689SN/A *          Steve Raasch
321689SN/A */
331689SN/A
341689SN/A#include <iomanip>
351689SN/A
361689SN/A#include "base/loader/symtab.hh"
371689SN/A#include "cpu/base.hh"
381689SN/A#include "cpu/exetrace.hh"
391689SN/A#include "cpu/static_inst.hh"
402665Ssaidi@eecs.umich.edu#include "cpu/thread_context.hh"
412665Ssaidi@eecs.umich.edu#include "enums/OpClass.hh"
422965Sksewell@umich.edu
431689SN/Ausing namespace std;
449944Smatt.horsnell@ARM.comusing namespace TheISA;
459944Smatt.horsnell@ARM.com
461689SN/Anamespace Trace {
472292SN/A
489516SAli.Saidi@ARM.comvoid
492329SN/AExeTracerRecord::dumpTicks(ostream &outs)
502292SN/A{
513577Sgblack@eecs.umich.edu    ccprintf(outs, "%7d: ", when);
528229Snate@binkert.org}
535953Ssaidi@eecs.umich.edu
546658Snate@binkert.orgvoid
558887Sgeoffrey.blake@arm.comTrace::ExeTracerRecord::traceInst(StaticInstPtr inst, bool ran)
561717SN/A{
572292SN/A    ostream &outs = Trace::output();
588662SAli.Saidi@ARM.com
598229Snate@binkert.org    if (IsOn(ExecTicks))
608229Snate@binkert.org        dumpTicks(outs);
618232Snate@binkert.org
628232Snate@binkert.org    outs << thread->getCpuPtr()->name() << " ";
638232Snate@binkert.org
649444SAndreas.Sandberg@ARM.com    if (IsOn(ExecSpeculative))
658232Snate@binkert.org        outs << (misspeculating ? "-" : "+") << " ";
669527SMatt.Horsnell@arm.com
676221Snate@binkert.org    if (IsOn(ExecThread))
688230Snate@binkert.org        outs << "T" << thread->threadId() << " : ";
698793Sgblack@eecs.umich.edu
702292SN/A    std::string sym_str;
716221Snate@binkert.org    Addr sym_addr;
725529Snate@binkert.org    if (debugSymbolTable
731061SN/A        && IsOn(ExecSymbol)
742292SN/A        && debugSymbolTable->findNearestSymbol(PC, sym_str, sym_addr)) {
756221Snate@binkert.org        if (PC != sym_addr)
768581Ssteve.reinhardt@amd.com            sym_str += csprintf("+%d", PC - sym_addr);
771060SN/A        outs << "@" << sym_str;
781060SN/A    }
791060SN/A    else {
801061SN/A        outs << "0x" << hex << PC;
811060SN/A    }
822292SN/A
831062SN/A    if (inst->isMicroop()) {
842316SN/A        outs << "." << setw(2) << dec << upc;
852316SN/A    } else {
862292SN/A        outs << "   ";
872292SN/A    }
882292SN/A
892292SN/A    outs << " : ";
902292SN/A
915336Shines@cs.fsu.edu    //
922292SN/A    //  Print decoded instruction
934873Sstever@eecs.umich.edu    //
942292SN/A
952292SN/A    outs << setw(26) << left;
962292SN/A    outs << inst->disassemble(PC, debugSymbolTable);
975529Snate@binkert.org
984329Sktlim@umich.edu    if (ran) {
992292SN/A        outs << " : ";
1002292SN/A
1012292SN/A        if (IsOn(ExecOpClass)) {
1022292SN/A            outs << Enums::OpClassStrings[inst->opClass()] << " : ";
1032292SN/A        }
1042292SN/A
1055529Snate@binkert.org        if (IsOn(ExecResult) && data_status != DataInvalid) {
1062843Sktlim@umich.edu            ccprintf(outs, " D=%#018x", data.as_int);
10710340Smitch.hayenga@arm.com        }
1088823Snilay@cs.wisc.edu
1099513SAli.Saidi@ARM.com        if (IsOn(ExecEffAddr) && addr_valid)
1109513SAli.Saidi@ARM.com            outs << " A=0x" << hex << addr;
1112292SN/A
11210172Sdam.sunwoo@arm.com        if (IsOn(ExecFetchSeq) && fetch_seq_valid)
11310172Sdam.sunwoo@arm.com            outs << "  FetchSeq=" << dec << fetch_seq;
11410172Sdam.sunwoo@arm.com
11510172Sdam.sunwoo@arm.com        if (IsOn(ExecCPSeq) && cp_seq_valid)
11610172Sdam.sunwoo@arm.com            outs << "  CPSeq=" << dec << cp_seq;
1172292SN/A    }
1182292SN/A
1192980Sgblack@eecs.umich.edu    //
1202292SN/A    //  End of line...
1212292SN/A    //
1222292SN/A    outs << endl;
1232292SN/A}
1242292SN/A
1252292SN/Avoid
1262292SN/ATrace::ExeTracerRecord::dump()
1272292SN/A{
1282292SN/A    /*
1298346Sksewell@umich.edu     * The behavior this check tries to achieve is that if ExecMacro is on,
1302292SN/A     * the macroop will be printed. If it's on and microops are also on, it's
1312292SN/A     * printed before the microops start printing to give context. If the
1322292SN/A     * microops aren't printed, then it's printed only when the final microop
1332292SN/A     * finishes. Macroops then behave like regular instructions and don't
1346221Snate@binkert.org     * complete/print when they fault.
1352292SN/A     */
1362292SN/A    if (IsOn(ExecMacro) && staticInst->isMicroop() &&
1372292SN/A            ((IsOn(ExecMicro) &&
1388346Sksewell@umich.edu             macroStaticInst && staticInst->isFirstMicroop()) ||
1392292SN/A            (!IsOn(ExecMicro) &&
1402292SN/A             macroStaticInst && staticInst->isLastMicroop()))) {
1412292SN/A        traceInst(macroStaticInst, false);
1424329Sktlim@umich.edu    }
1432292SN/A    if (IsOn(ExecMicro) || !staticInst->isMicroop()) {
1442292SN/A        traceInst(staticInst, true);
1452292SN/A    }
1462292SN/A}
1472292SN/A
1486221Snate@binkert.org/* namespace Trace */ }
1496221Snate@binkert.org
1506221Snate@binkert.org////////////////////////////////////////////////////////////////////////
1516221Snate@binkert.org//
1526221Snate@binkert.org//  ExeTracer Simulation Object
1536221Snate@binkert.org//
1546221Snate@binkert.orgTrace::ExeTracer *
1556221Snate@binkert.orgExeTracerParams::create()
1567720Sgblack@eecs.umich.edu{
1577855SAli.Saidi@ARM.com    return new Trace::ExeTracer(this);
1589437SAndreas.Sandberg@ARM.com};
1592292SN/A