exetrace.cc revision 5866
12207SN/A/* 22207SN/A * Copyright (c) 2001-2005 The Regents of The University of Michigan 32207SN/A * All rights reserved. 42207SN/A * 52207SN/A * Redistribution and use in source and binary forms, with or without 62207SN/A * modification, are permitted provided that the following conditions are 72207SN/A * met: redistributions of source code must retain the above copyright 82207SN/A * notice, this list of conditions and the following disclaimer; 92207SN/A * redistributions in binary form must reproduce the above copyright 102207SN/A * notice, this list of conditions and the following disclaimer in the 112207SN/A * documentation and/or other materials provided with the distribution; 122207SN/A * neither the name of the copyright holders nor the names of its 132207SN/A * contributors may be used to endorse or promote products derived from 142207SN/A * this software without specific prior written permission. 152207SN/A * 162207SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172207SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182207SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192207SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202207SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212207SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222207SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232207SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242207SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252207SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262207SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu * 282665Ssaidi@eecs.umich.edu * Authors: Steve Reinhardt 292665Ssaidi@eecs.umich.edu * Lisa Hsu 302207SN/A * Nathan Binkert 312207SN/A * Steve Raasch 3211793Sbrandon.potter@amd.com */ 3311793Sbrandon.potter@amd.com 342972Sgblack@eecs.umich.edu#include <iomanip> 358229Snate@binkert.org 362454SN/A#include "base/loader/symtab.hh" 372454SN/A#include "cpu/base.hh" 382680Sktlim@umich.edu#include "cpu/exetrace.hh" 398232Snate@binkert.org#include "cpu/static_inst.hh" 405759Shsul@eecs.umich.edu#include "cpu/thread_context.hh" 4111854Sbrandon.potter@amd.com#include "enums/OpClass.hh" 427678Sgblack@eecs.umich.edu 435759Shsul@eecs.umich.eduusing namespace std; 4411800Sbrandon.potter@amd.comusing namespace TheISA; 452474SN/A 462207SN/Anamespace Trace { 472474SN/A 482474SN/Avoid 492474SN/AExeTracerRecord::dumpTicks(ostream &outs) 5011851Sbrandon.potter@amd.com{ 5111851Sbrandon.potter@amd.com ccprintf(outs, "%7d: ", when); 522474SN/A} 532474SN/A 5410318Sandreas.hansson@arm.comvoid 552474SN/ATrace::ExeTracerRecord::traceInst(StaticInstPtr inst, bool ran) 562474SN/A{ 572474SN/A ostream &outs = Trace::output(); 582474SN/A 592474SN/A if (IsOn(ExecTicks)) 602474SN/A dumpTicks(outs); 612474SN/A 6211386Ssteve.reinhardt@amd.com outs << thread->getCpuPtr()->name() << " "; 632474SN/A 642474SN/A if (IsOn(ExecSpeculative)) 652474SN/A outs << (misspeculating ? "-" : "+") << " "; 662474SN/A 672474SN/A if (IsOn(ExecThread)) 682474SN/A outs << "T" << thread->threadId() << " : "; 692474SN/A 7011851Sbrandon.potter@amd.com std::string sym_str; 715759Shsul@eecs.umich.edu Addr sym_addr; 7211389Sbrandon.potter@amd.com if (debugSymbolTable 7311389Sbrandon.potter@amd.com && IsOn(ExecSymbol) 7411389Sbrandon.potter@amd.com && debugSymbolTable->findNearestSymbol(PC, sym_str, sym_addr)) { 755759Shsul@eecs.umich.edu if (PC != sym_addr) 765759Shsul@eecs.umich.edu sym_str += csprintf("+%d", PC - sym_addr); 775771Shsul@eecs.umich.edu outs << "@" << sym_str; 785759Shsul@eecs.umich.edu } 795759Shsul@eecs.umich.edu else { 805759Shsul@eecs.umich.edu outs << "0x" << hex << PC; 8111321Ssteve.reinhardt@amd.com } 825759Shsul@eecs.umich.edu 8311320Ssteve.reinhardt@amd.com if (inst->isMicroop()) { 845759Shsul@eecs.umich.edu outs << "." << setw(2) << dec << upc; 855759Shsul@eecs.umich.edu } else { 865759Shsul@eecs.umich.edu outs << " "; 875759Shsul@eecs.umich.edu } 885759Shsul@eecs.umich.edu 895759Shsul@eecs.umich.edu outs << " : "; 905759Shsul@eecs.umich.edu 9110318Sandreas.hansson@arm.com // 925759Shsul@eecs.umich.edu // Print decoded instruction 935759Shsul@eecs.umich.edu // 945759Shsul@eecs.umich.edu 955759Shsul@eecs.umich.edu outs << setw(26) << left; 9611389Sbrandon.potter@amd.com outs << inst->disassemble(PC, debugSymbolTable); 9711389Sbrandon.potter@amd.com 9811389Sbrandon.potter@amd.com if (ran) { 9911389Sbrandon.potter@amd.com outs << " : "; 1005759Shsul@eecs.umich.edu 1015759Shsul@eecs.umich.edu if (IsOn(ExecOpClass)) { 1025759Shsul@eecs.umich.edu outs << Enums::OpClassStrings[inst->opClass()] << " : "; 1035759Shsul@eecs.umich.edu } 1045759Shsul@eecs.umich.edu 1055759Shsul@eecs.umich.edu if (IsOn(ExecResult) && data_status != DataInvalid) { 1065759Shsul@eecs.umich.edu ccprintf(outs, " D=%#018x", data.as_int); 1075759Shsul@eecs.umich.edu } 1085759Shsul@eecs.umich.edu 1095759Shsul@eecs.umich.edu if (IsOn(ExecEffAddr) && addr_valid) 1105759Shsul@eecs.umich.edu outs << " A=0x" << hex << addr; 1115759Shsul@eecs.umich.edu 1125759Shsul@eecs.umich.edu if (IsOn(ExecFetchSeq) && fetch_seq_valid) 1135759Shsul@eecs.umich.edu outs << " FetchSeq=" << dec << fetch_seq; 1146227Snate@binkert.org 1155759Shsul@eecs.umich.edu if (IsOn(ExecCPSeq) && cp_seq_valid) 1165759Shsul@eecs.umich.edu outs << " CPSeq=" << dec << cp_seq; 1175759Shsul@eecs.umich.edu } 1186227Snate@binkert.org 1195759Shsul@eecs.umich.edu // 1205759Shsul@eecs.umich.edu // End of line... 1215759Shsul@eecs.umich.edu // 1225759Shsul@eecs.umich.edu outs << endl; 12311320Ssteve.reinhardt@amd.com} 12411320Ssteve.reinhardt@amd.com 1255759Shsul@eecs.umich.eduvoid 12611320Ssteve.reinhardt@amd.comTrace::ExeTracerRecord::dump() 1275759Shsul@eecs.umich.edu{ 1285759Shsul@eecs.umich.edu /* 1295759Shsul@eecs.umich.edu * The behavior this check tries to achieve is that if ExecMacro is on, 1305759Shsul@eecs.umich.edu * the macroop will be printed. If it's on and microops are also on, it's 1315759Shsul@eecs.umich.edu * printed before the microops start printing to give context. If the 1325759Shsul@eecs.umich.edu * microops aren't printed, then it's printed only when the final microop 1335759Shsul@eecs.umich.edu * finishes. Macroops then behave like regular instructions and don't 1345759Shsul@eecs.umich.edu * complete/print when they fault. 1355759Shsul@eecs.umich.edu */ 1365759Shsul@eecs.umich.edu if (IsOn(ExecMacro) && staticInst->isMicroop() && 1375759Shsul@eecs.umich.edu ((IsOn(ExecMicro) && 1388601Ssteve.reinhardt@amd.com macroStaticInst && staticInst->isFirstMicroop()) || 1395759Shsul@eecs.umich.edu (!IsOn(ExecMicro) && 1405759Shsul@eecs.umich.edu macroStaticInst && staticInst->isLastMicroop()))) { 1415759Shsul@eecs.umich.edu traceInst(macroStaticInst, false); 1425759Shsul@eecs.umich.edu } 1435759Shsul@eecs.umich.edu if (IsOn(ExecMicro) || !staticInst->isMicroop()) { 1445759Shsul@eecs.umich.edu traceInst(staticInst, true); 1455759Shsul@eecs.umich.edu } 1465759Shsul@eecs.umich.edu} 1475759Shsul@eecs.umich.edu 1485759Shsul@eecs.umich.edu/* namespace Trace */ } 1495759Shsul@eecs.umich.edu 1505759Shsul@eecs.umich.edu//////////////////////////////////////////////////////////////////////// 1515759Shsul@eecs.umich.edu// 1525759Shsul@eecs.umich.edu// ExeTracer Simulation Object 1535759Shsul@eecs.umich.edu// 1545759Shsul@eecs.umich.eduTrace::ExeTracer * 1555759Shsul@eecs.umich.eduExeTracerParams::create() 1568852Sandreas.hansson@arm.com{ 1575759Shsul@eecs.umich.edu return new Trace::ExeTracer(this); 1585759Shsul@eecs.umich.edu}; 1595759Shsul@eecs.umich.edu