exetrace.cc revision 1904 
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <fstream>
30#include <iomanip>
31
32#include "sim/param.hh"
33#include "encumbered/cpu/full/dyn_inst.hh"
34#include "encumbered/cpu/full/spec_state.hh"
35#include "encumbered/cpu/full/issue.hh"
36#include "cpu/exetrace.hh"
37#include "cpu/exec_context.hh"
38#include "base/loader/symtab.hh"
39#include "cpu/base.hh"
40#include "cpu/static_inst.hh"
41
42using namespace std;
43
44
45////////////////////////////////////////////////////////////////////////
46//
47//  Methods for the InstRecord object
48//
49
50
51void
52Trace::InstRecord::dump(ostream &outs)
53{
54    if (flags[INTEL_FORMAT]) {
55        ccprintf(outs, "%7d ) ", cycle);
56        outs << "0x" << hex << PC << ":\t";
57        if (staticInst->isLoad()) {
58            outs << "<RD 0x" << hex << addr;
59            outs << ">";
60        } else if (staticInst->isStore()) {
61            outs << "<WR 0x" << hex << addr;
62            outs << ">";
63        }
64    } else {
65        if (flags[PRINT_CYCLE])
66            ccprintf(outs, "%7d: ", cycle);
67
68        outs << cpu->name() << " ";
69
70        if (flags[TRACE_MISSPEC])
71            outs << (misspeculating ? "-" : "+") << " ";
72
73        if (flags[PRINT_THREAD_NUM])
74            outs << "T" << thread << " : ";
75
76
77        std::string sym_str;
78        Addr sym_addr;
79        if (debugSymbolTable
80            && debugSymbolTable->findNearestSymbol(PC, sym_str, sym_addr)) {
81            if (PC != sym_addr)
82                sym_str += csprintf("+%d", PC - sym_addr);
83            outs << "@" << sym_str << " : ";
84        }
85        else {
86            outs << "0x" << hex << PC << " : ";
87        }
88
89        //
90        //  Print decoded instruction
91        //
92
93#if defined(__GNUC__) && (__GNUC__ < 3)
94        // There's a bug in gcc 2.x library that prevents setw()
95        // from working properly on strings
96        string mc(staticInst->disassemble(PC, debugSymbolTable));
97        while (mc.length() < 26)
98            mc += " ";
99        outs << mc;
100#else
101        outs << setw(26) << left << staticInst->disassemble(PC, debugSymbolTable);
102#endif
103
104        outs << " : ";
105
106        if (flags[PRINT_OP_CLASS]) {
107            outs << opClassStrings[staticInst->opClass()] << " : ";
108        }
109
110        if (flags[PRINT_RESULT_DATA] && data_status != DataInvalid) {
111            outs << " D=";
112#if 0
113            if (data_status == DataDouble)
114                ccprintf(outs, "%f", data.as_double);
115            else
116                ccprintf(outs, "%#018x", data.as_int);
117#else
118            ccprintf(outs, "%#018x", data.as_int);
119#endif
120        }
121
122        if (flags[PRINT_EFF_ADDR] && addr_valid)
123            outs << " A=0x" << hex << addr;
124
125        if (flags[PRINT_INT_REGS] && regs_valid) {
126            for (int i = 0; i < 32;)
127                for (int j = i + 1; i <= j; i++)
128                    ccprintf(outs, "r%02d = %#018x%s", i, iregs->regs[i],
129                             ((i == j) ? "\n" : "    "));
130            outs << "\n";
131        }
132
133        if (flags[PRINT_FETCH_SEQ] && fetch_seq_valid)
134            outs << "  FetchSeq=" << dec << fetch_seq;
135
136        if (flags[PRINT_CP_SEQ] && cp_seq_valid)
137            outs << "  CPSeq=" << dec << cp_seq;
138    }
139    //
140    //  End of line...
141    //
142    outs << endl;
143}
144
145
146vector<bool> Trace::InstRecord::flags(NUM_BITS);
147
148////////////////////////////////////////////////////////////////////////
149//
150// Parameter space for per-cycle execution address tracing options.
151// Derive from ParamContext so we can override checkParams() function.
152//
153class ExecutionTraceParamContext : public ParamContext
154{
155  public:
156    ExecutionTraceParamContext(const string &_iniSection)
157        : ParamContext(_iniSection)
158        {
159        }
160
161    void checkParams();	// defined at bottom of file
162};
163
164ExecutionTraceParamContext exeTraceParams("exetrace");
165
166Param<bool> exe_trace_spec(&exeTraceParams, "speculative",
167                           "capture speculative instructions", true);
168
169Param<bool> exe_trace_print_cycle(&exeTraceParams, "print_cycle",
170                                  "print cycle number", true);
171Param<bool> exe_trace_print_opclass(&exeTraceParams, "print_opclass",
172                                  "print op class", true);
173Param<bool> exe_trace_print_thread(&exeTraceParams, "print_thread",
174                                  "print thread number", true);
175Param<bool> exe_trace_print_effaddr(&exeTraceParams, "print_effaddr",
176                                  "print effective address", true);
177Param<bool> exe_trace_print_data(&exeTraceParams, "print_data",
178                                  "print result data", true);
179Param<bool> exe_trace_print_iregs(&exeTraceParams, "print_iregs",
180                                  "print all integer regs", false);
181Param<bool> exe_trace_print_fetchseq(&exeTraceParams, "print_fetchseq",
182                                  "print fetch sequence number", false);
183Param<bool> exe_trace_print_cp_seq(&exeTraceParams, "print_cpseq",
184                                  "print correct-path sequence number", false);
185Param<bool> exe_trace_intel_format(&exeTraceParams, "intel_format",
186                                   "print trace in intel compatible format", false);
187
188
189//
190// Helper function for ExecutionTraceParamContext::checkParams() just
191// to get us into the InstRecord namespace
192//
193void
194Trace::InstRecord::setParams()
195{
196    flags[TRACE_MISSPEC]     = exe_trace_spec;
197
198    flags[PRINT_CYCLE]       = exe_trace_print_cycle;
199    flags[PRINT_OP_CLASS]    = exe_trace_print_opclass;
200    flags[PRINT_THREAD_NUM]  = exe_trace_print_thread;
201    flags[PRINT_RESULT_DATA] = exe_trace_print_effaddr;
202    flags[PRINT_EFF_ADDR]    = exe_trace_print_data;
203    flags[PRINT_INT_REGS]    = exe_trace_print_iregs;
204    flags[PRINT_FETCH_SEQ]   = exe_trace_print_fetchseq;
205    flags[PRINT_CP_SEQ]      = exe_trace_print_cp_seq;
206    flags[INTEL_FORMAT]      = exe_trace_intel_format;
207}
208
209void
210ExecutionTraceParamContext::checkParams()
211{
212    Trace::InstRecord::setParams();
213}
214
215