base.hh revision 4000 
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Steve Reinhardt
29 *          Nathan Binkert
30 */
31
32#ifndef __CPU_BASE_HH__
33#define __CPU_BASE_HH__
34
35#include <vector>
36
37#include "base/statistics.hh"
38#include "config/full_system.hh"
39#include "sim/eventq.hh"
40#include "mem/mem_object.hh"
41#include "arch/isa_traits.hh"
42
43#if FULL_SYSTEM
44#include "arch/interrupts.hh"
45#endif
46
47class BranchPred;
48class CheckerCPU;
49class ThreadContext;
50class System;
51class Port;
52
53class CPUProgressEvent : public Event
54{
55  protected:
56    Tick interval;
57    Counter lastNumInst;
58    BaseCPU *cpu;
59
60  public:
61    CPUProgressEvent(EventQueue *q, Tick ival, BaseCPU *_cpu);
62
63    void process();
64
65    virtual const char *description();
66};
67
68class BaseCPU : public MemObject
69{
70  protected:
71    // CPU's clock period in terms of the number of ticks of curTime.
72    Tick clock;
73    // @todo remove me after debugging with legion done
74    Tick instCnt;
75
76  public:
77//    Tick currentTick;
78    inline Tick frequency() const { return Clock::Frequency / clock; }
79    inline Tick cycles(int numCycles) const { return clock * numCycles; }
80    inline Tick curCycle() const { return curTick / clock; }
81    // @todo remove me after debugging with legion done
82    Tick instCount() { return instCnt; }
83
84    /** The next cycle the CPU should be scheduled, given a cache
85     * access or quiesce event returning on this cycle.  This function
86     * may return curTick if the CPU should run on the current cycle.
87     */
88    Tick nextCycle();
89
90    /** The next cycle the CPU should be scheduled, given a cache
91     * access or quiesce event returning on the given Tick.  This
92     * function may return curTick if the CPU should run on the
93     * current cycle.
94     * @param begin_tick The tick that the event is completing on.
95     */
96    Tick nextCycle(Tick begin_tick);
97
98#if FULL_SYSTEM
99  protected:
100//    uint64_t interrupts[TheISA::NumInterruptLevels];
101//    uint64_t intstatus;
102    TheISA::Interrupts interrupts;
103
104  public:
105    virtual void post_interrupt(int int_type);
106    virtual void post_interrupt(int int_num, int index);
107    virtual void clear_interrupt(int int_num, int index);
108    virtual void clear_interrupts();
109
110    bool check_interrupts(ThreadContext * tc) const
111    { return interrupts.check_interrupts(tc); }
112
113    class ProfileEvent : public Event
114    {
115      private:
116        BaseCPU *cpu;
117        int interval;
118
119      public:
120        ProfileEvent(BaseCPU *cpu, int interval);
121        void process();
122    };
123    ProfileEvent *profileEvent;
124#endif
125
126  protected:
127    std::vector<ThreadContext *> threadContexts;
128
129  public:
130
131    /// Notify the CPU that the indicated context is now active.  The
132    /// delay parameter indicates the number of ticks to wait before
133    /// executing (typically 0 or 1).
134    virtual void activateContext(int thread_num, int delay) {}
135
136    /// Notify the CPU that the indicated context is now suspended.
137    virtual void suspendContext(int thread_num) {}
138
139    /// Notify the CPU that the indicated context is now deallocated.
140    virtual void deallocateContext(int thread_num) {}
141
142    /// Notify the CPU that the indicated context is now halted.
143    virtual void haltContext(int thread_num) {}
144
145   /// Given a Thread Context pointer return the thread num
146   int findContext(ThreadContext *tc);
147
148   /// Given a thread num get tho thread context for it
149   ThreadContext *getContext(int tn) { return threadContexts[tn]; }
150
151  public:
152    struct Params
153    {
154        std::string name;
155        int numberOfThreads;
156        bool deferRegistration;
157        Counter max_insts_any_thread;
158        Counter max_insts_all_threads;
159        Counter max_loads_any_thread;
160        Counter max_loads_all_threads;
161        Tick clock;
162        bool functionTrace;
163        Tick functionTraceStart;
164        System *system;
165        int cpu_id;
166        Tick phase;
167#if FULL_SYSTEM
168        Tick profile;
169
170        bool do_statistics_insts;
171        bool do_checkpoint_insts;
172        bool do_quiesce;
173#endif
174        Tick progress_interval;
175        BaseCPU *checker;
176
177        Params();
178    };
179
180    const Params *params;
181
182    BaseCPU(Params *params);
183    virtual ~BaseCPU();
184
185    virtual void init();
186    virtual void startup();
187    virtual void regStats();
188
189    virtual void activateWhenReady(int tid) {};
190
191    void registerThreadContexts();
192
193    /// Prepare for another CPU to take over execution.  When it is
194    /// is ready (drained pipe) it signals the sampler.
195    virtual void switchOut();
196
197    /// Take over execution from the given CPU.  Used for warm-up and
198    /// sampling.
199    virtual void takeOverFrom(BaseCPU *);
200
201    /**
202     *  Number of threads we're actually simulating (<= SMT_MAX_THREADS).
203     * This is a constant for the duration of the simulation.
204     */
205    int number_of_threads;
206
207    /**
208     * Vector of per-thread instruction-based event queues.  Used for
209     * scheduling events based on number of instructions committed by
210     * a particular thread.
211     */
212    EventQueue **comInstEventQueue;
213
214    /**
215     * Vector of per-thread load-based event queues.  Used for
216     * scheduling events based on number of loads committed by
217     *a particular thread.
218     */
219    EventQueue **comLoadEventQueue;
220
221    System *system;
222
223    Tick phase;
224
225#if FULL_SYSTEM
226    /**
227     * Serialize this object to the given output stream.
228     * @param os The stream to serialize to.
229     */
230    virtual void serialize(std::ostream &os);
231
232    /**
233     * Reconstruct the state of this object from a checkpoint.
234     * @param cp The checkpoint use.
235     * @param section The section name of this object
236     */
237    virtual void unserialize(Checkpoint *cp, const std::string &section);
238
239#endif
240
241    /**
242     * Return pointer to CPU's branch predictor (NULL if none).
243     * @return Branch predictor pointer.
244     */
245    virtual BranchPred *getBranchPred() { return NULL; };
246
247    virtual Counter totalInstructions() const { return 0; }
248
249    // Function tracing
250  private:
251    bool functionTracingEnabled;
252    std::ostream *functionTraceStream;
253    Addr currentFunctionStart;
254    Addr currentFunctionEnd;
255    Tick functionEntryTick;
256    void enableFunctionTrace();
257    void traceFunctionsInternal(Addr pc);
258
259  protected:
260    void traceFunctions(Addr pc)
261    {
262        if (functionTracingEnabled)
263            traceFunctionsInternal(pc);
264    }
265
266  private:
267    static std::vector<BaseCPU *> cpuList;   //!< Static global cpu list
268
269  public:
270    static int numSimulatedCPUs() { return cpuList.size(); }
271    static Counter numSimulatedInstructions()
272    {
273        Counter total = 0;
274
275        int size = cpuList.size();
276        for (int i = 0; i < size; ++i)
277            total += cpuList[i]->totalInstructions();
278
279        return total;
280    }
281
282  public:
283    // Number of CPU cycles simulated
284    Stats::Scalar<> numCycles;
285};
286
287#endif // __CPU_BASE_HH__
288