base.hh revision 2103 
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef __CPU_BASE_HH__
30#define __CPU_BASE_HH__
31
32#include <vector>
33
34#include "base/statistics.hh"
35#include "config/full_system.hh"
36#include "cpu/sampler/sampler.hh"
37#include "sim/eventq.hh"
38#include "sim/sim_object.hh"
39#include "targetarch/isa_traits.hh"
40
41#if FULL_SYSTEM
42class System;
43#endif
44
45class BranchPred;
46class ExecContext;
47
48class BaseCPU : public SimObject
49{
50  protected:
51    // CPU's clock period in terms of the number of ticks of curTime.
52    Tick clock;
53
54  public:
55    inline Tick frequency() const { return Clock::Frequency / clock; }
56    inline Tick cycles(int numCycles) const { return clock * numCycles; }
57    inline Tick curCycle() const { return curTick / clock; }
58
59#if FULL_SYSTEM
60  protected:
61    uint64_t interrupts[NumInterruptLevels];
62    uint64_t intstatus;
63
64  public:
65    virtual void post_interrupt(int int_num, int index);
66    virtual void clear_interrupt(int int_num, int index);
67    virtual void clear_interrupts();
68    bool checkInterrupts;
69
70    bool check_interrupt(int int_num) const {
71        if (int_num > NumInterruptLevels)
72            panic("int_num out of bounds\n");
73
74        return interrupts[int_num] != 0;
75    }
76
77    bool check_interrupts() const { return intstatus != 0; }
78    uint64_t intr_status() const { return intstatus; }
79
80    class ProfileEvent : public Event
81    {
82      private:
83        BaseCPU *cpu;
84        int interval;
85
86      public:
87        ProfileEvent(BaseCPU *cpu, int interval);
88        void process();
89    };
90    ProfileEvent *profileEvent;
91#endif
92
93  protected:
94    std::vector<ExecContext *> execContexts;
95
96  public:
97
98    /// Notify the CPU that the indicated context is now active.  The
99    /// delay parameter indicates the number of ticks to wait before
100    /// executing (typically 0 or 1).
101    virtual void activateContext(int thread_num, int delay) {}
102
103    /// Notify the CPU that the indicated context is now suspended.
104    virtual void suspendContext(int thread_num) {}
105
106    /// Notify the CPU that the indicated context is now deallocated.
107    virtual void deallocateContext(int thread_num) {}
108
109    /// Notify the CPU that the indicated context is now halted.
110    virtual void haltContext(int thread_num) {}
111
112  public:
113    struct Params
114    {
115        std::string name;
116        int numberOfThreads;
117        bool deferRegistration;
118        Counter max_insts_any_thread;
119        Counter max_insts_all_threads;
120        Counter max_loads_any_thread;
121        Counter max_loads_all_threads;
122        Tick clock;
123        bool functionTrace;
124        Tick functionTraceStart;
125#if FULL_SYSTEM
126        System *system;
127        int cpu_id;
128        Tick profile;
129#endif
130
131        Params();
132    };
133
134    const Params *params;
135
136    BaseCPU(Params *params);
137    virtual ~BaseCPU();
138
139    virtual void init();
140    virtual void startup();
141    virtual void regStats();
142
143    virtual void activateWhenReady(int tid) {};
144
145    void registerExecContexts();
146
147    /// Prepare for another CPU to take over execution.  When it is
148    /// is ready (drained pipe) it signals the sampler.
149    virtual void switchOut(Sampler *);
150
151    /// Take over execution from the given CPU.  Used for warm-up and
152    /// sampling.
153    virtual void takeOverFrom(BaseCPU *);
154
155    /**
156     *  Number of threads we're actually simulating (<= SMT_MAX_THREADS).
157     * This is a constant for the duration of the simulation.
158     */
159    int number_of_threads;
160
161    /**
162     * Vector of per-thread instruction-based event queues.  Used for
163     * scheduling events based on number of instructions committed by
164     * a particular thread.
165     */
166    EventQueue **comInstEventQueue;
167
168    /**
169     * Vector of per-thread load-based event queues.  Used for
170     * scheduling events based on number of loads committed by
171     *a particular thread.
172     */
173    EventQueue **comLoadEventQueue;
174
175#if FULL_SYSTEM
176    System *system;
177
178    /**
179     * Serialize this object to the given output stream.
180     * @param os The stream to serialize to.
181     */
182    virtual void serialize(std::ostream &os);
183
184    /**
185     * Reconstruct the state of this object from a checkpoint.
186     * @param cp The checkpoint use.
187     * @param section The section name of this object
188     */
189    virtual void unserialize(Checkpoint *cp, const std::string &section);
190
191#endif
192
193    /**
194     * Return pointer to CPU's branch predictor (NULL if none).
195     * @return Branch predictor pointer.
196     */
197    virtual BranchPred *getBranchPred() { return NULL; };
198
199    virtual Counter totalInstructions() const { return 0; }
200
201    // Function tracing
202  private:
203    bool functionTracingEnabled;
204    std::ostream *functionTraceStream;
205    Addr currentFunctionStart;
206    Addr currentFunctionEnd;
207    Tick functionEntryTick;
208    void enableFunctionTrace();
209    void traceFunctionsInternal(Addr pc);
210
211  protected:
212    void traceFunctions(Addr pc)
213    {
214        if (functionTracingEnabled)
215            traceFunctionsInternal(pc);
216    }
217
218  private:
219    static std::vector<BaseCPU *> cpuList;   //!< Static global cpu list
220
221  public:
222    static int numSimulatedCPUs() { return cpuList.size(); }
223    static Counter numSimulatedInstructions()
224    {
225        Counter total = 0;
226
227        int size = cpuList.size();
228        for (int i = 0; i < size; ++i)
229            total += cpuList[i]->totalInstructions();
230
231        return total;
232    }
233
234  public:
235    // Number of CPU cycles simulated
236    Stats::Scalar<> numCycles;
237};
238
239#endif // __CPU_BASE_HH__
240