base.hh revision 2315 
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef __CPU_BASE_HH__
30#define __CPU_BASE_HH__
31
32#include <vector>
33
34#include "base/statistics.hh"
35#include "config/full_system.hh"
36#include "cpu/sampler/sampler.hh"
37#include "sim/eventq.hh"
38#include "sim/sim_object.hh"
39#include "arch/isa_traits.hh"
40
41#if FULL_SYSTEM
42class System;
43namespace Kernel { class Statistics; }
44#endif
45
46class BranchPred;
47class CheckerCPU;
48class ExecContext;
49
50class BaseCPU : public SimObject
51{
52  protected:
53    // CPU's clock period in terms of the number of ticks of curTime.
54    Tick clock;
55
56  public:
57    inline Tick frequency() const { return Clock::Frequency / clock; }
58    inline Tick cycles(int numCycles) const { return clock * numCycles; }
59    inline Tick curCycle() const { return curTick / clock; }
60
61#if FULL_SYSTEM
62  protected:
63    uint64_t interrupts[TheISA::NumInterruptLevels];
64    uint64_t intstatus;
65
66  public:
67    virtual void post_interrupt(int int_num, int index);
68    virtual void clear_interrupt(int int_num, int index);
69    virtual void clear_interrupts();
70    bool checkInterrupts;
71
72    bool check_interrupt(int int_num) const {
73        if (int_num > TheISA::NumInterruptLevels)
74            panic("int_num out of bounds\n");
75
76        return interrupts[int_num] != 0;
77    }
78
79    bool check_interrupts() const { return intstatus != 0; }
80    uint64_t intr_status() const { return intstatus; }
81
82    class ProfileEvent : public Event
83    {
84      private:
85        BaseCPU *cpu;
86        int interval;
87
88      public:
89        ProfileEvent(BaseCPU *cpu, int interval);
90        void process();
91    };
92    ProfileEvent *profileEvent;
93#endif
94
95  protected:
96    std::vector<ExecContext *> execContexts;
97
98  public:
99
100    /// Notify the CPU that the indicated context is now active.  The
101    /// delay parameter indicates the number of ticks to wait before
102    /// executing (typically 0 or 1).
103    virtual void activateContext(int thread_num, int delay) {}
104
105    /// Notify the CPU that the indicated context is now suspended.
106    virtual void suspendContext(int thread_num) {}
107
108    /// Notify the CPU that the indicated context is now deallocated.
109    virtual void deallocateContext(int thread_num) {}
110
111    /// Notify the CPU that the indicated context is now halted.
112    virtual void haltContext(int thread_num) {}
113
114  public:
115    struct Params
116    {
117        std::string name;
118        int numberOfThreads;
119        bool deferRegistration;
120        Counter max_insts_any_thread;
121        Counter max_insts_all_threads;
122        Counter max_loads_any_thread;
123        Counter max_loads_all_threads;
124        Tick clock;
125        bool functionTrace;
126        Tick functionTraceStart;
127#if FULL_SYSTEM
128        System *system;
129        int cpu_id;
130        Tick profile;
131#endif
132        BaseCPU *checker;
133
134        Params();
135    };
136
137    const Params *params;
138
139    BaseCPU(Params *params);
140    virtual ~BaseCPU();
141
142    virtual void init();
143    virtual void startup();
144    virtual void regStats();
145
146    virtual void activateWhenReady(int tid) {};
147
148    void registerExecContexts();
149
150    /// Prepare for another CPU to take over execution.  When it is
151    /// is ready (drained pipe) it signals the sampler.
152    virtual void switchOut(Sampler *);
153
154    /// Take over execution from the given CPU.  Used for warm-up and
155    /// sampling.
156    virtual void takeOverFrom(BaseCPU *);
157
158    /**
159     *  Number of threads we're actually simulating (<= SMT_MAX_THREADS).
160     * This is a constant for the duration of the simulation.
161     */
162    int number_of_threads;
163
164    /**
165     * Vector of per-thread instruction-based event queues.  Used for
166     * scheduling events based on number of instructions committed by
167     * a particular thread.
168     */
169    EventQueue **comInstEventQueue;
170
171    /**
172     * Vector of per-thread load-based event queues.  Used for
173     * scheduling events based on number of loads committed by
174     *a particular thread.
175     */
176    EventQueue **comLoadEventQueue;
177
178#if FULL_SYSTEM
179    System *system;
180
181    /**
182     * Serialize this object to the given output stream.
183     * @param os The stream to serialize to.
184     */
185    virtual void serialize(std::ostream &os);
186
187    /**
188     * Reconstruct the state of this object from a checkpoint.
189     * @param cp The checkpoint use.
190     * @param section The section name of this object
191     */
192    virtual void unserialize(Checkpoint *cp, const std::string &section);
193
194#endif
195
196    /**
197     * Return pointer to CPU's branch predictor (NULL if none).
198     * @return Branch predictor pointer.
199     */
200    virtual BranchPred *getBranchPred() { return NULL; };
201
202    virtual Counter totalInstructions() const { return 0; }
203
204    // Function tracing
205  private:
206    bool functionTracingEnabled;
207    std::ostream *functionTraceStream;
208    Addr currentFunctionStart;
209    Addr currentFunctionEnd;
210    Tick functionEntryTick;
211    void enableFunctionTrace();
212    void traceFunctionsInternal(Addr pc);
213
214  protected:
215    void traceFunctions(Addr pc)
216    {
217        if (functionTracingEnabled)
218            traceFunctionsInternal(pc);
219    }
220
221  private:
222    static std::vector<BaseCPU *> cpuList;   //!< Static global cpu list
223
224  public:
225    static int numSimulatedCPUs() { return cpuList.size(); }
226    static Counter numSimulatedInstructions()
227    {
228        Counter total = 0;
229
230        int size = cpuList.size();
231        for (int i = 0; i < size; ++i)
232            total += cpuList[i]->totalInstructions();
233
234        return total;
235    }
236
237  public:
238    // Number of CPU cycles simulated
239    Stats::Scalar<> numCycles;
240
241#if FULL_SYSTEM
242    Kernel::Statistics *kernelStats;
243#endif
244};
245
246#endif // __CPU_BASE_HH__
247