base.hh revision 1695 
1/*
2 * Copyright (c) 2002-2004 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef __BASE_CPU_HH__
30#define __BASE_CPU_HH__
31
32#include <vector>
33
34#include "base/statistics.hh"
35#include "cpu/sampling_cpu/sampling_cpu.hh"
36#include "sim/eventq.hh"
37#include "sim/sim_object.hh"
38#include "targetarch/isa_traits.hh"
39
40#ifdef FULL_SYSTEM
41class System;
42#endif
43
44class BranchPred;
45class ExecContext;
46
47class BaseCPU : public SimObject
48{
49  protected:
50    // CPU's clock period in terms of the number of ticks of curTime.
51    Tick clock;
52
53  public:
54    inline Tick frequency() const { return Clock::Frequency / clock; }
55    inline Tick cycles(int numCycles) const { return clock * numCycles; }
56    inline Tick curCycle() const { return curTick / clock; }
57
58#ifdef FULL_SYSTEM
59  protected:
60    uint64_t interrupts[NumInterruptLevels];
61    uint64_t intstatus;
62
63  public:
64    virtual void post_interrupt(int int_num, int index);
65    virtual void clear_interrupt(int int_num, int index);
66    virtual void clear_interrupts();
67    bool checkInterrupts;
68
69    bool check_interrupt(int int_num) const {
70        if (int_num > NumInterruptLevels)
71            panic("int_num out of bounds\n");
72
73        return interrupts[int_num] != 0;
74    }
75
76    bool check_interrupts() const { return intstatus != 0; }
77    uint64_t intr_status() const { return intstatus; }
78#endif
79
80  protected:
81    std::vector<ExecContext *> execContexts;
82
83  public:
84
85    /// Notify the CPU that the indicated context is now active.  The
86    /// delay parameter indicates the number of ticks to wait before
87    /// executing (typically 0 or 1).
88    virtual void activateContext(int thread_num, int delay) {}
89
90    /// Notify the CPU that the indicated context is now suspended.
91    virtual void suspendContext(int thread_num) {}
92
93    /// Notify the CPU that the indicated context is now deallocated.
94    virtual void deallocateContext(int thread_num) {}
95
96    /// Notify the CPU that the indicated context is now halted.
97    virtual void haltContext(int thread_num) {}
98
99  public:
100    struct Params
101    {
102        std::string name;
103        int numberOfThreads;
104        bool deferRegistration;
105        Counter max_insts_any_thread;
106        Counter max_insts_all_threads;
107        Counter max_loads_any_thread;
108        Counter max_loads_all_threads;
109        Tick clock;
110        bool functionTrace;
111        Tick functionTraceStart;
112#ifdef FULL_SYSTEM
113        System *system;
114#endif
115    };
116
117    const Params *params;
118
119    BaseCPU(Params *params);
120    virtual ~BaseCPU();
121
122    virtual void init();
123    virtual void regStats();
124
125    void registerExecContexts();
126
127    /// Prepare for another CPU to take over execution.  When it is
128    /// is ready (drained pipe) it signals the sampler.
129    virtual void switchOut(SamplingCPU *);
130
131    /// Take over execution from the given CPU.  Used for warm-up and
132    /// sampling.
133    virtual void takeOverFrom(BaseCPU *);
134
135    /**
136     *  Number of threads we're actually simulating (<= SMT_MAX_THREADS).
137     * This is a constant for the duration of the simulation.
138     */
139    int number_of_threads;
140
141    /**
142     * Vector of per-thread instruction-based event queues.  Used for
143     * scheduling events based on number of instructions committed by
144     * a particular thread.
145     */
146    EventQueue **comInstEventQueue;
147
148    /**
149     * Vector of per-thread load-based event queues.  Used for
150     * scheduling events based on number of loads committed by
151     *a particular thread.
152     */
153    EventQueue **comLoadEventQueue;
154
155#ifdef FULL_SYSTEM
156    System *system;
157
158    /**
159     * Serialize this object to the given output stream.
160     * @param os The stream to serialize to.
161     */
162    virtual void serialize(std::ostream &os);
163
164    /**
165     * Reconstruct the state of this object from a checkpoint.
166     * @param cp The checkpoint use.
167     * @param section The section name of this object
168     */
169    virtual void unserialize(Checkpoint *cp, const std::string &section);
170
171#endif
172
173    /**
174     * Return pointer to CPU's branch predictor (NULL if none).
175     * @return Branch predictor pointer.
176     */
177    virtual BranchPred *getBranchPred() { return NULL; };
178
179    virtual Counter totalInstructions() const { return 0; }
180
181    // Function tracing
182  private:
183    bool functionTracingEnabled;
184    std::ostream *functionTraceStream;
185    Addr currentFunctionStart;
186    Addr currentFunctionEnd;
187    Tick functionEntryTick;
188    void enableFunctionTrace();
189    void traceFunctionsInternal(Addr pc);
190
191  protected:
192    void traceFunctions(Addr pc)
193    {
194        if (functionTracingEnabled)
195            traceFunctionsInternal(pc);
196    }
197
198  private:
199    static std::vector<BaseCPU *> cpuList;   //!< Static global cpu list
200
201  public:
202    static int numSimulatedCPUs() { return cpuList.size(); }
203    static Counter numSimulatedInstructions()
204    {
205        Counter total = 0;
206
207        int size = cpuList.size();
208        for (int i = 0; i < size; ++i)
209            total += cpuList[i]->totalInstructions();
210
211        return total;
212    }
213
214  public:
215    // Number of CPU cycles simulated
216    Stats::Scalar<> numCycles;
217};
218
219#endif // __BASE_CPU_HH__
220