base.cc revision 3126:756092c6383c
112338Sjason@lowepower.com/* 212338Sjason@lowepower.com * Copyright (c) 2002-2005 The Regents of The University of Michigan 312338Sjason@lowepower.com * All rights reserved. 412338Sjason@lowepower.com * 512338Sjason@lowepower.com * Redistribution and use in source and binary forms, with or without 612338Sjason@lowepower.com * modification, are permitted provided that the following conditions are 712338Sjason@lowepower.com * met: redistributions of source code must retain the above copyright 812338Sjason@lowepower.com * notice, this list of conditions and the following disclaimer; 912338Sjason@lowepower.com * redistributions in binary form must reproduce the above copyright 1012338Sjason@lowepower.com * notice, this list of conditions and the following disclaimer in the 1112338Sjason@lowepower.com * documentation and/or other materials provided with the distribution; 1212338Sjason@lowepower.com * neither the name of the copyright holders nor the names of its 1312338Sjason@lowepower.com * contributors may be used to endorse or promote products derived from 1412338Sjason@lowepower.com * this software without specific prior written permission. 1512338Sjason@lowepower.com * 1612338Sjason@lowepower.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1712338Sjason@lowepower.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1812338Sjason@lowepower.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 1912338Sjason@lowepower.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2012338Sjason@lowepower.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2112338Sjason@lowepower.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2212338Sjason@lowepower.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2312338Sjason@lowepower.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2412338Sjason@lowepower.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2512338Sjason@lowepower.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2612338Sjason@lowepower.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2712338Sjason@lowepower.com * 2812338Sjason@lowepower.com * Authors: Steve Reinhardt 2912338Sjason@lowepower.com * Nathan Binkert 3012338Sjason@lowepower.com */ 3112338Sjason@lowepower.com 3212338Sjason@lowepower.com#include <iostream> 3312338Sjason@lowepower.com#include <string> 3412338Sjason@lowepower.com#include <sstream> 3512338Sjason@lowepower.com 3612564Sgabeblack@google.com#include "base/cprintf.hh" 3712564Sgabeblack@google.com#include "base/loader/symtab.hh" 3812338Sjason@lowepower.com#include "base/misc.hh" 3912338Sjason@lowepower.com#include "base/output.hh" 4012338Sjason@lowepower.com#include "cpu/base.hh" 4112338Sjason@lowepower.com#include "cpu/cpuevent.hh" 4212338Sjason@lowepower.com#include "cpu/thread_context.hh" 4312338Sjason@lowepower.com#include "cpu/profile.hh" 4412338Sjason@lowepower.com#include "sim/param.hh" 4512338Sjason@lowepower.com#include "sim/process.hh" 4612338Sjason@lowepower.com#include "sim/sim_events.hh" 4712338Sjason@lowepower.com#include "sim/system.hh" 4812338Sjason@lowepower.com 4912338Sjason@lowepower.com#include "base/trace.hh" 5012338Sjason@lowepower.com 5112338Sjason@lowepower.com// Hack 5212338Sjason@lowepower.com#include "sim/stat_control.hh" 5312338Sjason@lowepower.com 5412338Sjason@lowepower.comusing namespace std; 5512338Sjason@lowepower.com 5612338Sjason@lowepower.comvector<BaseCPU *> BaseCPU::cpuList; 5712338Sjason@lowepower.com 5812338Sjason@lowepower.com// This variable reflects the max number of threads in any CPU. Be 5912338Sjason@lowepower.com// careful to only use it once all the CPUs that you care about have 6012338Sjason@lowepower.com// been initialized 6112338Sjason@lowepower.comint maxThreadsPerCPU = 1; 6212338Sjason@lowepower.com 6312338Sjason@lowepower.comCPUProgressEvent::CPUProgressEvent(EventQueue *q, Tick ival, 6412338Sjason@lowepower.com BaseCPU *_cpu) 6512338Sjason@lowepower.com : Event(q, Event::Stat_Event_Pri), interval(ival), 6612338Sjason@lowepower.com lastNumInst(0), cpu(_cpu) 6712338Sjason@lowepower.com{ 6812338Sjason@lowepower.com if (interval) 6912338Sjason@lowepower.com schedule(curTick + interval); 7012338Sjason@lowepower.com} 7112338Sjason@lowepower.com 7212338Sjason@lowepower.comvoid 7312338Sjason@lowepower.comCPUProgressEvent::process() 7412338Sjason@lowepower.com{ 7512338Sjason@lowepower.com Counter temp = cpu->totalInstructions(); 7612338Sjason@lowepower.com#ifndef NDEBUG 7712338Sjason@lowepower.com double ipc = double(temp - lastNumInst) / (interval / cpu->cycles(1)); 7812338Sjason@lowepower.com 7912338Sjason@lowepower.com DPRINTFN("%s progress event, instructions committed: %lli, IPC: %0.8d\n", 8012338Sjason@lowepower.com cpu->name(), temp - lastNumInst, ipc); 8112338Sjason@lowepower.com ipc = 0.0; 8212338Sjason@lowepower.com#else 8312338Sjason@lowepower.com cprintf("%lli: %s progress event, instructions committed: %lli\n", 8412338Sjason@lowepower.com curTick, cpu->name(), temp - lastNumInst); 8512338Sjason@lowepower.com#endif 8612338Sjason@lowepower.com lastNumInst = temp; 8712338Sjason@lowepower.com schedule(curTick + interval); 8812338Sjason@lowepower.com} 8912338Sjason@lowepower.com 9012338Sjason@lowepower.comconst char * 9112338Sjason@lowepower.comCPUProgressEvent::description() 9212338Sjason@lowepower.com{ 9312338Sjason@lowepower.com return "CPU Progress event"; 9412338Sjason@lowepower.com} 9512338Sjason@lowepower.com 9612338Sjason@lowepower.com#if FULL_SYSTEM 9712338Sjason@lowepower.comBaseCPU::BaseCPU(Params *p) 9812338Sjason@lowepower.com : MemObject(p->name), clock(p->clock), checkInterrupts(true), 9912564Sgabeblack@google.com params(p), number_of_threads(p->numberOfThreads), system(p->system) 10012338Sjason@lowepower.com#else 10112564Sgabeblack@google.comBaseCPU::BaseCPU(Params *p) 102 : MemObject(p->name), clock(p->clock), params(p), 103 number_of_threads(p->numberOfThreads), system(p->system) 104#endif 105{ 106// currentTick = curTick; 107 DPRINTF(FullCPU, "BaseCPU: Creating object, mem address %#x.\n", this); 108 109 // add self to global list of CPUs 110 cpuList.push_back(this); 111 112 DPRINTF(FullCPU, "BaseCPU: CPU added to cpuList, mem address %#x.\n", 113 this); 114 115 if (number_of_threads > maxThreadsPerCPU) 116 maxThreadsPerCPU = number_of_threads; 117 118 // allocate per-thread instruction-based event queues 119 comInstEventQueue = new EventQueue *[number_of_threads]; 120 for (int i = 0; i < number_of_threads; ++i) 121 comInstEventQueue[i] = new EventQueue("instruction-based event queue"); 122 123 // 124 // set up instruction-count-based termination events, if any 125 // 126 if (p->max_insts_any_thread != 0) 127 for (int i = 0; i < number_of_threads; ++i) 128 new SimLoopExitEvent(comInstEventQueue[i], p->max_insts_any_thread, 129 "a thread reached the max instruction count"); 130 131 if (p->max_insts_all_threads != 0) { 132 // allocate & initialize shared downcounter: each event will 133 // decrement this when triggered; simulation will terminate 134 // when counter reaches 0 135 int *counter = new int; 136 *counter = number_of_threads; 137 for (int i = 0; i < number_of_threads; ++i) 138 new CountedExitEvent(comInstEventQueue[i], 139 "all threads reached the max instruction count", 140 p->max_insts_all_threads, *counter); 141 } 142 143 // allocate per-thread load-based event queues 144 comLoadEventQueue = new EventQueue *[number_of_threads]; 145 for (int i = 0; i < number_of_threads; ++i) 146 comLoadEventQueue[i] = new EventQueue("load-based event queue"); 147 148 // 149 // set up instruction-count-based termination events, if any 150 // 151 if (p->max_loads_any_thread != 0) 152 for (int i = 0; i < number_of_threads; ++i) 153 new SimLoopExitEvent(comLoadEventQueue[i], p->max_loads_any_thread, 154 "a thread reached the max load count"); 155 156 if (p->max_loads_all_threads != 0) { 157 // allocate & initialize shared downcounter: each event will 158 // decrement this when triggered; simulation will terminate 159 // when counter reaches 0 160 int *counter = new int; 161 *counter = number_of_threads; 162 for (int i = 0; i < number_of_threads; ++i) 163 new CountedExitEvent(comLoadEventQueue[i], 164 "all threads reached the max load count", 165 p->max_loads_all_threads, *counter); 166 } 167 168#if FULL_SYSTEM 169 memset(interrupts, 0, sizeof(interrupts)); 170 intstatus = 0; 171#endif 172 173 functionTracingEnabled = false; 174 if (p->functionTrace) { 175 functionTraceStream = simout.find(csprintf("ftrace.%s", name())); 176 currentFunctionStart = currentFunctionEnd = 0; 177 functionEntryTick = p->functionTraceStart; 178 179 if (p->functionTraceStart == 0) { 180 functionTracingEnabled = true; 181 } else { 182 Event *e = 183 new EventWrapper<BaseCPU, &BaseCPU::enableFunctionTrace>(this, 184 true); 185 e->schedule(p->functionTraceStart); 186 } 187 } 188#if FULL_SYSTEM 189 profileEvent = NULL; 190 if (params->profile) 191 profileEvent = new ProfileEvent(this, params->profile); 192#endif 193} 194 195BaseCPU::Params::Params() 196{ 197#if FULL_SYSTEM 198 profile = false; 199#endif 200 checker = NULL; 201} 202 203void 204BaseCPU::enableFunctionTrace() 205{ 206 functionTracingEnabled = true; 207} 208 209BaseCPU::~BaseCPU() 210{ 211} 212 213void 214BaseCPU::init() 215{ 216 if (!params->deferRegistration) 217 registerThreadContexts(); 218} 219 220void 221BaseCPU::startup() 222{ 223#if FULL_SYSTEM 224 if (!params->deferRegistration && profileEvent) 225 profileEvent->schedule(curTick); 226#endif 227 228 if (params->progress_interval) { 229 new CPUProgressEvent(&mainEventQueue, params->progress_interval, 230 this); 231 } 232} 233 234 235void 236BaseCPU::regStats() 237{ 238 using namespace Stats; 239 240 numCycles 241 .name(name() + ".numCycles") 242 .desc("number of cpu cycles simulated") 243 ; 244 245 int size = threadContexts.size(); 246 if (size > 1) { 247 for (int i = 0; i < size; ++i) { 248 stringstream namestr; 249 ccprintf(namestr, "%s.ctx%d", name(), i); 250 threadContexts[i]->regStats(namestr.str()); 251 } 252 } else if (size == 1) 253 threadContexts[0]->regStats(name()); 254 255#if FULL_SYSTEM 256#endif 257} 258 259 260void 261BaseCPU::registerThreadContexts() 262{ 263 for (int i = 0; i < threadContexts.size(); ++i) { 264 ThreadContext *tc = threadContexts[i]; 265 266#if FULL_SYSTEM 267 int id = params->cpu_id; 268 if (id != -1) 269 id += i; 270 271 tc->setCpuId(system->registerThreadContext(tc, id)); 272#else 273 tc->setCpuId(tc->getProcessPtr()->registerThreadContext(tc)); 274#endif 275 } 276} 277 278 279void 280BaseCPU::switchOut() 281{ 282// panic("This CPU doesn't support sampling!"); 283#if FULL_SYSTEM 284 if (profileEvent && profileEvent->scheduled()) 285 profileEvent->deschedule(); 286#endif 287} 288 289void 290BaseCPU::takeOverFrom(BaseCPU *oldCPU) 291{ 292 assert(threadContexts.size() == oldCPU->threadContexts.size()); 293 294 for (int i = 0; i < threadContexts.size(); ++i) { 295 ThreadContext *newTC = threadContexts[i]; 296 ThreadContext *oldTC = oldCPU->threadContexts[i]; 297 298 newTC->takeOverFrom(oldTC); 299 300 CpuEvent::replaceThreadContext(oldTC, newTC); 301 302 assert(newTC->readCpuId() == oldTC->readCpuId()); 303#if FULL_SYSTEM 304 system->replaceThreadContext(newTC, newTC->readCpuId()); 305#else 306 assert(newTC->getProcessPtr() == oldTC->getProcessPtr()); 307 newTC->getProcessPtr()->replaceThreadContext(newTC, newTC->readCpuId()); 308#endif 309 310// TheISA::compareXCs(oldXC, newXC); 311 } 312 313#if FULL_SYSTEM 314 for (int i = 0; i < TheISA::NumInterruptLevels; ++i) 315 interrupts[i] = oldCPU->interrupts[i]; 316 intstatus = oldCPU->intstatus; 317 checkInterrupts = oldCPU->checkInterrupts; 318 319 for (int i = 0; i < threadContexts.size(); ++i) 320 threadContexts[i]->profileClear(); 321 322 // The Sampler must take care of this! 323// if (profileEvent) 324// profileEvent->schedule(curTick); 325#endif 326} 327 328 329#if FULL_SYSTEM 330BaseCPU::ProfileEvent::ProfileEvent(BaseCPU *_cpu, int _interval) 331 : Event(&mainEventQueue), cpu(_cpu), interval(_interval) 332{ } 333 334void 335BaseCPU::ProfileEvent::process() 336{ 337 for (int i = 0, size = cpu->threadContexts.size(); i < size; ++i) { 338 ThreadContext *tc = cpu->threadContexts[i]; 339 tc->profileSample(); 340 } 341 342 schedule(curTick + interval); 343} 344 345void 346BaseCPU::post_interrupt(int int_num, int index) 347{ 348 DPRINTF(Interrupt, "Interrupt %d:%d posted\n", int_num, index); 349 350 if (int_num < 0 || int_num >= TheISA::NumInterruptLevels) 351 panic("int_num out of bounds\n"); 352 353 if (index < 0 || index >= sizeof(uint64_t) * 8) 354 panic("int_num out of bounds\n"); 355 356 checkInterrupts = true; 357 interrupts[int_num] |= 1 << index; 358 intstatus |= (ULL(1) << int_num); 359} 360 361void 362BaseCPU::clear_interrupt(int int_num, int index) 363{ 364 DPRINTF(Interrupt, "Interrupt %d:%d cleared\n", int_num, index); 365 366 if (int_num < 0 || int_num >= TheISA::NumInterruptLevels) 367 panic("int_num out of bounds\n"); 368 369 if (index < 0 || index >= sizeof(uint64_t) * 8) 370 panic("int_num out of bounds\n"); 371 372 interrupts[int_num] &= ~(1 << index); 373 if (interrupts[int_num] == 0) 374 intstatus &= ~(ULL(1) << int_num); 375} 376 377void 378BaseCPU::clear_interrupts() 379{ 380 DPRINTF(Interrupt, "Interrupts all cleared\n"); 381 382 memset(interrupts, 0, sizeof(interrupts)); 383 intstatus = 0; 384} 385 386 387void 388BaseCPU::serialize(std::ostream &os) 389{ 390 SERIALIZE_ARRAY(interrupts, TheISA::NumInterruptLevels); 391 SERIALIZE_SCALAR(intstatus); 392} 393 394void 395BaseCPU::unserialize(Checkpoint *cp, const std::string §ion) 396{ 397 UNSERIALIZE_ARRAY(interrupts, TheISA::NumInterruptLevels); 398 UNSERIALIZE_SCALAR(intstatus); 399} 400 401#endif // FULL_SYSTEM 402 403void 404BaseCPU::traceFunctionsInternal(Addr pc) 405{ 406 if (!debugSymbolTable) 407 return; 408 409 // if pc enters different function, print new function symbol and 410 // update saved range. Otherwise do nothing. 411 if (pc < currentFunctionStart || pc >= currentFunctionEnd) { 412 string sym_str; 413 bool found = debugSymbolTable->findNearestSymbol(pc, sym_str, 414 currentFunctionStart, 415 currentFunctionEnd); 416 417 if (!found) { 418 // no symbol found: use addr as label 419 sym_str = csprintf("0x%x", pc); 420 currentFunctionStart = pc; 421 currentFunctionEnd = pc + 1; 422 } 423 424 ccprintf(*functionTraceStream, " (%d)\n%d: %s", 425 curTick - functionEntryTick, curTick, sym_str); 426 functionEntryTick = curTick; 427 } 428} 429 430 431DEFINE_SIM_OBJECT_CLASS_NAME("BaseCPU", BaseCPU) 432