base.cc revision 1917 
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <iostream>
30#include <string>
31#include <sstream>
32
33#include "base/cprintf.hh"
34#include "base/loader/symtab.hh"
35#include "base/misc.hh"
36#include "base/output.hh"
37#include "cpu/base.hh"
38#include "cpu/exec_context.hh"
39#include "cpu/sampler/sampler.hh"
40#include "sim/param.hh"
41#include "sim/sim_events.hh"
42
43#include "base/trace.hh"
44
45using namespace std;
46
47vector<BaseCPU *> BaseCPU::cpuList;
48
49// This variable reflects the max number of threads in any CPU.  Be
50// careful to only use it once all the CPUs that you care about have
51// been initialized
52int maxThreadsPerCPU = 1;
53
54#if FULL_SYSTEM
55BaseCPU::BaseCPU(Params *p)
56    : SimObject(p->name), clock(p->clock), checkInterrupts(true),
57      params(p), number_of_threads(p->numberOfThreads), system(p->system)
58#else
59BaseCPU::BaseCPU(Params *p)
60    : SimObject(p->name), clock(p->clock), params(p),
61      number_of_threads(p->numberOfThreads)
62#endif
63{
64    DPRINTF(FullCPU, "BaseCPU: Creating object, mem address %#x.\n", this);
65
66    // add self to global list of CPUs
67    cpuList.push_back(this);
68
69    DPRINTF(FullCPU, "BaseCPU: CPU added to cpuList, mem address %#x.\n",
70            this);
71
72    if (number_of_threads > maxThreadsPerCPU)
73        maxThreadsPerCPU = number_of_threads;
74
75    // allocate per-thread instruction-based event queues
76    comInstEventQueue = new EventQueue *[number_of_threads];
77    for (int i = 0; i < number_of_threads; ++i)
78        comInstEventQueue[i] = new EventQueue("instruction-based event queue");
79
80    //
81    // set up instruction-count-based termination events, if any
82    //
83    if (p->max_insts_any_thread != 0)
84        for (int i = 0; i < number_of_threads; ++i)
85            new SimExitEvent(comInstEventQueue[i], p->max_insts_any_thread,
86                "a thread reached the max instruction count");
87
88    if (p->max_insts_all_threads != 0) {
89        // allocate & initialize shared downcounter: each event will
90        // decrement this when triggered; simulation will terminate
91        // when counter reaches 0
92        int *counter = new int;
93        *counter = number_of_threads;
94        for (int i = 0; i < number_of_threads; ++i)
95            new CountedExitEvent(comInstEventQueue[i],
96                "all threads reached the max instruction count",
97                p->max_insts_all_threads, *counter);
98    }
99
100    // allocate per-thread load-based event queues
101    comLoadEventQueue = new EventQueue *[number_of_threads];
102    for (int i = 0; i < number_of_threads; ++i)
103        comLoadEventQueue[i] = new EventQueue("load-based event queue");
104
105    //
106    // set up instruction-count-based termination events, if any
107    //
108    if (p->max_loads_any_thread != 0)
109        for (int i = 0; i < number_of_threads; ++i)
110            new SimExitEvent(comLoadEventQueue[i], p->max_loads_any_thread,
111                "a thread reached the max load count");
112
113    if (p->max_loads_all_threads != 0) {
114        // allocate & initialize shared downcounter: each event will
115        // decrement this when triggered; simulation will terminate
116        // when counter reaches 0
117        int *counter = new int;
118        *counter = number_of_threads;
119        for (int i = 0; i < number_of_threads; ++i)
120            new CountedExitEvent(comLoadEventQueue[i],
121                "all threads reached the max load count",
122                p->max_loads_all_threads, *counter);
123    }
124
125#if FULL_SYSTEM
126    memset(interrupts, 0, sizeof(interrupts));
127    intstatus = 0;
128#endif
129
130    functionTracingEnabled = false;
131    if (p->functionTrace) {
132        functionTraceStream = simout.find(csprintf("ftrace.%s", name()));
133        currentFunctionStart = currentFunctionEnd = 0;
134        functionEntryTick = p->functionTraceStart;
135
136        if (p->functionTraceStart == 0) {
137            functionTracingEnabled = true;
138        } else {
139            Event *e =
140                new EventWrapper<BaseCPU, &BaseCPU::enableFunctionTrace>(this,
141                                                                         true);
142            e->schedule(p->functionTraceStart);
143        }
144    }
145#if FULL_SYSTEM
146    profileEvent = NULL;
147    if (params->profile)
148        profileEvent = new ProfileEvent(this, params->profile);
149#endif
150}
151
152BaseCPU::Params::Params()
153{
154#if FULL_SYSTEM
155    profile = false;
156#endif
157}
158
159void
160BaseCPU::enableFunctionTrace()
161{
162    functionTracingEnabled = true;
163}
164
165BaseCPU::~BaseCPU()
166{
167}
168
169void
170BaseCPU::init()
171{
172    if (!params->deferRegistration)
173        registerExecContexts();
174}
175
176void
177BaseCPU::startup()
178{
179#if FULL_SYSTEM
180    if (!params->deferRegistration && profileEvent)
181        profileEvent->schedule(curTick);
182#endif
183}
184
185
186void
187BaseCPU::regStats()
188{
189    using namespace Stats;
190
191    numCycles
192        .name(name() + ".numCycles")
193        .desc("number of cpu cycles simulated")
194        ;
195
196    int size = execContexts.size();
197    if (size > 1) {
198        for (int i = 0; i < size; ++i) {
199            stringstream namestr;
200            ccprintf(namestr, "%s.ctx%d", name(), i);
201            execContexts[i]->regStats(namestr.str());
202        }
203    } else if (size == 1)
204        execContexts[0]->regStats(name());
205}
206
207
208void
209BaseCPU::registerExecContexts()
210{
211    for (int i = 0; i < execContexts.size(); ++i) {
212        ExecContext *xc = execContexts[i];
213#if FULL_SYSTEM
214        int id = params->cpu_id;
215        if (id != -1)
216            id += i;
217
218        xc->cpu_id = system->registerExecContext(xc, id);
219#else
220        xc->cpu_id = xc->process->registerExecContext(xc);
221#endif
222    }
223}
224
225
226void
227BaseCPU::switchOut(Sampler *sampler)
228{
229    panic("This CPU doesn't support sampling!");
230}
231
232void
233BaseCPU::takeOverFrom(BaseCPU *oldCPU)
234{
235    assert(execContexts.size() == oldCPU->execContexts.size());
236
237    for (int i = 0; i < execContexts.size(); ++i) {
238        ExecContext *newXC = execContexts[i];
239        ExecContext *oldXC = oldCPU->execContexts[i];
240
241        newXC->takeOverFrom(oldXC);
242        assert(newXC->cpu_id == oldXC->cpu_id);
243#if FULL_SYSTEM
244        system->replaceExecContext(newXC, newXC->cpu_id);
245#else
246        assert(newXC->process == oldXC->process);
247        newXC->process->replaceExecContext(newXC, newXC->cpu_id);
248#endif
249    }
250
251#if FULL_SYSTEM
252    for (int i = 0; i < NumInterruptLevels; ++i)
253        interrupts[i] = oldCPU->interrupts[i];
254    intstatus = oldCPU->intstatus;
255
256    for (int i = 0; i < execContexts.size(); ++i)
257        execContexts[i]->profile->clear();
258
259    if (profileEvent)
260        profileEvent->schedule(curTick);
261#endif
262}
263
264
265#if FULL_SYSTEM
266BaseCPU::ProfileEvent::ProfileEvent(BaseCPU *_cpu, int _interval)
267    : Event(&mainEventQueue), cpu(_cpu), interval(_interval)
268{ }
269
270void
271BaseCPU::ProfileEvent::process()
272{
273    for (int i = 0, size = cpu->execContexts.size(); i < size; ++i) {
274        ExecContext *xc = cpu->execContexts[i];
275        xc->profile->sample(xc->profileNode, xc->profilePC);
276    }
277
278    schedule(curTick + interval);
279}
280
281void
282BaseCPU::post_interrupt(int int_num, int index)
283{
284    DPRINTF(Interrupt, "Interrupt %d:%d posted\n", int_num, index);
285
286    if (int_num < 0 || int_num >= NumInterruptLevels)
287        panic("int_num out of bounds\n");
288
289    if (index < 0 || index >= sizeof(uint64_t) * 8)
290        panic("int_num out of bounds\n");
291
292    checkInterrupts = true;
293    interrupts[int_num] |= 1 << index;
294    intstatus |= (ULL(1) << int_num);
295}
296
297void
298BaseCPU::clear_interrupt(int int_num, int index)
299{
300    DPRINTF(Interrupt, "Interrupt %d:%d cleared\n", int_num, index);
301
302    if (int_num < 0 || int_num >= NumInterruptLevels)
303        panic("int_num out of bounds\n");
304
305    if (index < 0 || index >= sizeof(uint64_t) * 8)
306        panic("int_num out of bounds\n");
307
308    interrupts[int_num] &= ~(1 << index);
309    if (interrupts[int_num] == 0)
310        intstatus &= ~(ULL(1) << int_num);
311}
312
313void
314BaseCPU::clear_interrupts()
315{
316    DPRINTF(Interrupt, "Interrupts all cleared\n");
317
318    memset(interrupts, 0, sizeof(interrupts));
319    intstatus = 0;
320}
321
322
323void
324BaseCPU::serialize(std::ostream &os)
325{
326    SERIALIZE_ARRAY(interrupts, NumInterruptLevels);
327    SERIALIZE_SCALAR(intstatus);
328}
329
330void
331BaseCPU::unserialize(Checkpoint *cp, const std::string &section)
332{
333    UNSERIALIZE_ARRAY(interrupts, NumInterruptLevels);
334    UNSERIALIZE_SCALAR(intstatus);
335}
336
337#endif // FULL_SYSTEM
338
339void
340BaseCPU::traceFunctionsInternal(Addr pc)
341{
342    if (!debugSymbolTable)
343        return;
344
345    // if pc enters different function, print new function symbol and
346    // update saved range.  Otherwise do nothing.
347    if (pc < currentFunctionStart || pc >= currentFunctionEnd) {
348        string sym_str;
349        bool found = debugSymbolTable->findNearestSymbol(pc, sym_str,
350                                                         currentFunctionStart,
351                                                         currentFunctionEnd);
352
353        if (!found) {
354            // no symbol found: use addr as label
355            sym_str = csprintf("0x%x", pc);
356            currentFunctionStart = pc;
357            currentFunctionEnd = pc + 1;
358        }
359
360        ccprintf(*functionTraceStream, " (%d)\n%d: %s",
361                 curTick - functionEntryTick, curTick, sym_str);
362        functionEntryTick = curTick;
363    }
364}
365
366
367DEFINE_SIM_OBJECT_CLASS_NAME("BaseCPU", BaseCPU)
368