base.cc revision 8779
12SN/A/* 21762SN/A * Copyright (c) 2002-2005 The Regents of The University of Michigan 37897Shestness@cs.utexas.edu * Copyright (c) 2011 Regents of the University of California 42SN/A * All rights reserved. 52SN/A * 62SN/A * Redistribution and use in source and binary forms, with or without 72SN/A * modification, are permitted provided that the following conditions are 82SN/A * met: redistributions of source code must retain the above copyright 92SN/A * notice, this list of conditions and the following disclaimer; 102SN/A * redistributions in binary form must reproduce the above copyright 112SN/A * notice, this list of conditions and the following disclaimer in the 122SN/A * documentation and/or other materials provided with the distribution; 132SN/A * neither the name of the copyright holders nor the names of its 142SN/A * contributors may be used to endorse or promote products derived from 152SN/A * this software without specific prior written permission. 162SN/A * 172SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 182SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 192SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 202SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 212SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 222SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 232SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 242SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 252SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 262SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 272SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 282665Ssaidi@eecs.umich.edu * 292665Ssaidi@eecs.umich.edu * Authors: Steve Reinhardt 302665Ssaidi@eecs.umich.edu * Nathan Binkert 317897Shestness@cs.utexas.edu * Rick Strong 322SN/A */ 332SN/A 341388SN/A#include <iostream> 358229Snate@binkert.org#include <sstream> 362SN/A#include <string> 372SN/A 387781SAli.Saidi@ARM.com#include "arch/tlb.hh" 398229Snate@binkert.org#include "base/loader/symtab.hh" 401191SN/A#include "base/cprintf.hh" 411191SN/A#include "base/misc.hh" 421388SN/A#include "base/output.hh" 435529Snate@binkert.org#include "base/trace.hh" 441717SN/A#include "cpu/base.hh" 452651Ssaidi@eecs.umich.edu#include "cpu/cpuevent.hh" 468229Snate@binkert.org#include "cpu/profile.hh" 472680Sktlim@umich.edu#include "cpu/thread_context.hh" 488232Snate@binkert.org#include "debug/SyscallVerbose.hh" 495529Snate@binkert.org#include "params/BaseCPU.hh" 508779Sgblack@eecs.umich.edu#include "sim/full_system.hh" 512190SN/A#include "sim/process.hh" 5256SN/A#include "sim/sim_events.hh" 538229Snate@binkert.org#include "sim/sim_exit.hh" 542190SN/A#include "sim/system.hh" 552SN/A 562359SN/A// Hack 572359SN/A#include "sim/stat_control.hh" 582359SN/A 592SN/Ausing namespace std; 602SN/A 612SN/Avector<BaseCPU *> BaseCPU::cpuList; 622SN/A 632SN/A// This variable reflects the max number of threads in any CPU. Be 642SN/A// careful to only use it once all the CPUs that you care about have 652SN/A// been initialized 662SN/Aint maxThreadsPerCPU = 1; 672SN/A 685606Snate@binkert.orgCPUProgressEvent::CPUProgressEvent(BaseCPU *_cpu, Tick ival) 696144Sksewell@umich.edu : Event(Event::Progress_Event_Pri), _interval(ival), lastNumInst(0), 706144Sksewell@umich.edu cpu(_cpu), _repeatEvent(true) 713126Sktlim@umich.edu{ 726144Sksewell@umich.edu if (_interval) 737823Ssteve.reinhardt@amd.com cpu->schedule(this, curTick() + _interval); 743126Sktlim@umich.edu} 753126Sktlim@umich.edu 762356SN/Avoid 772356SN/ACPUProgressEvent::process() 782356SN/A{ 792367SN/A Counter temp = cpu->totalInstructions(); 802356SN/A#ifndef NDEBUG 816144Sksewell@umich.edu double ipc = double(temp - lastNumInst) / (_interval / cpu->ticks(1)); 822367SN/A 836144Sksewell@umich.edu DPRINTFN("%s progress event, total committed:%i, progress insts committed: " 846144Sksewell@umich.edu "%lli, IPC: %0.8d\n", cpu->name(), temp, temp - lastNumInst, 856144Sksewell@umich.edu ipc); 862356SN/A ipc = 0.0; 872367SN/A#else 886144Sksewell@umich.edu cprintf("%lli: %s progress event, total committed:%i, progress insts " 897823Ssteve.reinhardt@amd.com "committed: %lli\n", curTick(), cpu->name(), temp, 906144Sksewell@umich.edu temp - lastNumInst); 912367SN/A#endif 922356SN/A lastNumInst = temp; 936144Sksewell@umich.edu 946144Sksewell@umich.edu if (_repeatEvent) 957823Ssteve.reinhardt@amd.com cpu->schedule(this, curTick() + _interval); 962356SN/A} 972356SN/A 982356SN/Aconst char * 995336Shines@cs.fsu.eduCPUProgressEvent::description() const 1002356SN/A{ 1014873Sstever@eecs.umich.edu return "CPU Progress"; 1022356SN/A} 1032356SN/A 1041400SN/ABaseCPU::BaseCPU(Params *p) 1055712Shsul@eecs.umich.edu : MemObject(p), clock(p->clock), instCnt(0), _cpuId(p->cpu_id), 1065712Shsul@eecs.umich.edu interrupts(p->interrupts), 1076221Snate@binkert.org numThreads(p->numThreads), system(p->system), 1083661Srdreslin@umich.edu phase(p->phase) 1092SN/A{ 1107823Ssteve.reinhardt@amd.com// currentTick = curTick(); 1111062SN/A 1125712Shsul@eecs.umich.edu // if Python did not provide a valid ID, do it here 1135712Shsul@eecs.umich.edu if (_cpuId == -1 ) { 1145712Shsul@eecs.umich.edu _cpuId = cpuList.size(); 1155712Shsul@eecs.umich.edu } 1165712Shsul@eecs.umich.edu 1172SN/A // add self to global list of CPUs 1182SN/A cpuList.push_back(this); 1192SN/A 1205712Shsul@eecs.umich.edu DPRINTF(SyscallVerbose, "Constructing CPU with id %d\n", _cpuId); 1215712Shsul@eecs.umich.edu 1226221Snate@binkert.org if (numThreads > maxThreadsPerCPU) 1236221Snate@binkert.org maxThreadsPerCPU = numThreads; 1242SN/A 1252SN/A // allocate per-thread instruction-based event queues 1266221Snate@binkert.org comInstEventQueue = new EventQueue *[numThreads]; 1276221Snate@binkert.org for (ThreadID tid = 0; tid < numThreads; ++tid) 1286221Snate@binkert.org comInstEventQueue[tid] = 1296221Snate@binkert.org new EventQueue("instruction-based event queue"); 1302SN/A 1312SN/A // 1322SN/A // set up instruction-count-based termination events, if any 1332SN/A // 1345606Snate@binkert.org if (p->max_insts_any_thread != 0) { 1355606Snate@binkert.org const char *cause = "a thread reached the max instruction count"; 1366221Snate@binkert.org for (ThreadID tid = 0; tid < numThreads; ++tid) { 1375606Snate@binkert.org Event *event = new SimLoopExitEvent(cause, 0); 1386221Snate@binkert.org comInstEventQueue[tid]->schedule(event, p->max_insts_any_thread); 1395606Snate@binkert.org } 1405606Snate@binkert.org } 1412SN/A 1421400SN/A if (p->max_insts_all_threads != 0) { 1435606Snate@binkert.org const char *cause = "all threads reached the max instruction count"; 1445606Snate@binkert.org 1452SN/A // allocate & initialize shared downcounter: each event will 1462SN/A // decrement this when triggered; simulation will terminate 1472SN/A // when counter reaches 0 1482SN/A int *counter = new int; 1496221Snate@binkert.org *counter = numThreads; 1506221Snate@binkert.org for (ThreadID tid = 0; tid < numThreads; ++tid) { 1515606Snate@binkert.org Event *event = new CountedExitEvent(cause, *counter); 1526670Shsul@eecs.umich.edu comInstEventQueue[tid]->schedule(event, p->max_insts_all_threads); 1535606Snate@binkert.org } 1542SN/A } 1552SN/A 156124SN/A // allocate per-thread load-based event queues 1576221Snate@binkert.org comLoadEventQueue = new EventQueue *[numThreads]; 1586221Snate@binkert.org for (ThreadID tid = 0; tid < numThreads; ++tid) 1596221Snate@binkert.org comLoadEventQueue[tid] = new EventQueue("load-based event queue"); 160124SN/A 161124SN/A // 162124SN/A // set up instruction-count-based termination events, if any 163124SN/A // 1645606Snate@binkert.org if (p->max_loads_any_thread != 0) { 1655606Snate@binkert.org const char *cause = "a thread reached the max load count"; 1666221Snate@binkert.org for (ThreadID tid = 0; tid < numThreads; ++tid) { 1675606Snate@binkert.org Event *event = new SimLoopExitEvent(cause, 0); 1686221Snate@binkert.org comLoadEventQueue[tid]->schedule(event, p->max_loads_any_thread); 1695606Snate@binkert.org } 1705606Snate@binkert.org } 171124SN/A 1721400SN/A if (p->max_loads_all_threads != 0) { 1735606Snate@binkert.org const char *cause = "all threads reached the max load count"; 174124SN/A // allocate & initialize shared downcounter: each event will 175124SN/A // decrement this when triggered; simulation will terminate 176124SN/A // when counter reaches 0 177124SN/A int *counter = new int; 1786221Snate@binkert.org *counter = numThreads; 1796221Snate@binkert.org for (ThreadID tid = 0; tid < numThreads; ++tid) { 1805606Snate@binkert.org Event *event = new CountedExitEvent(cause, *counter); 1816221Snate@binkert.org comLoadEventQueue[tid]->schedule(event, p->max_loads_all_threads); 1825606Snate@binkert.org } 183124SN/A } 184124SN/A 1851191SN/A functionTracingEnabled = false; 1865529Snate@binkert.org if (p->function_trace) { 1871388SN/A functionTraceStream = simout.find(csprintf("ftrace.%s", name())); 1881191SN/A currentFunctionStart = currentFunctionEnd = 0; 1895529Snate@binkert.org functionEntryTick = p->function_trace_start; 1901191SN/A 1915529Snate@binkert.org if (p->function_trace_start == 0) { 1921191SN/A functionTracingEnabled = true; 1931191SN/A } else { 1945606Snate@binkert.org typedef EventWrapper<BaseCPU, &BaseCPU::enableFunctionTrace> wrap; 1955606Snate@binkert.org Event *event = new wrap(this, true); 1965606Snate@binkert.org schedule(event, p->function_trace_start); 1971191SN/A } 1981191SN/A } 1995810Sgblack@eecs.umich.edu interrupts->setCPU(this); 2005810Sgblack@eecs.umich.edu 2018779Sgblack@eecs.umich.edu if (FullSystem) { 2028745Sgblack@eecs.umich.edu#if FULL_SYSTEM 2038779Sgblack@eecs.umich.edu profileEvent = NULL; 2048779Sgblack@eecs.umich.edu if (params()->profile) 2058779Sgblack@eecs.umich.edu profileEvent = new ProfileEvent(this, params()->profile); 2061917SN/A#endif 2078779Sgblack@eecs.umich.edu } 2085529Snate@binkert.org tracer = params()->tracer; 2091917SN/A} 2101191SN/A 2111191SN/Avoid 2121191SN/ABaseCPU::enableFunctionTrace() 2131191SN/A{ 2141191SN/A functionTracingEnabled = true; 2151191SN/A} 2161191SN/A 2171191SN/ABaseCPU::~BaseCPU() 2181191SN/A{ 2191191SN/A} 2201191SN/A 2211129SN/Avoid 2221129SN/ABaseCPU::init() 2231129SN/A{ 2245529Snate@binkert.org if (!params()->defer_registration) 2252680Sktlim@umich.edu registerThreadContexts(); 2261129SN/A} 227180SN/A 2282SN/Avoid 2291917SN/ABaseCPU::startup() 2301917SN/A{ 2318779Sgblack@eecs.umich.edu if (FullSystem) { 2328779Sgblack@eecs.umich.edu if (!params()->defer_registration && profileEvent) 2338779Sgblack@eecs.umich.edu schedule(profileEvent, curTick()); 2348779Sgblack@eecs.umich.edu } 2352356SN/A 2365529Snate@binkert.org if (params()->progress_interval) { 2375606Snate@binkert.org Tick num_ticks = ticks(params()->progress_interval); 2386144Sksewell@umich.edu 2396144Sksewell@umich.edu Event *event; 2406144Sksewell@umich.edu event = new CPUProgressEvent(this, num_ticks); 2412356SN/A } 2421917SN/A} 2431917SN/A 2441917SN/A 2451917SN/Avoid 2462SN/ABaseCPU::regStats() 2472SN/A{ 248729SN/A using namespace Stats; 249707SN/A 250707SN/A numCycles 251707SN/A .name(name() + ".numCycles") 252707SN/A .desc("number of cpu cycles simulated") 253707SN/A ; 254707SN/A 2557914SBrad.Beckmann@amd.com numWorkItemsStarted 2567914SBrad.Beckmann@amd.com .name(name() + ".numWorkItemsStarted") 2577914SBrad.Beckmann@amd.com .desc("number of work items this cpu started") 2587914SBrad.Beckmann@amd.com ; 2597914SBrad.Beckmann@amd.com 2607914SBrad.Beckmann@amd.com numWorkItemsCompleted 2617914SBrad.Beckmann@amd.com .name(name() + ".numWorkItemsCompleted") 2627914SBrad.Beckmann@amd.com .desc("number of work items this cpu completed") 2637914SBrad.Beckmann@amd.com ; 2647914SBrad.Beckmann@amd.com 2652680Sktlim@umich.edu int size = threadContexts.size(); 2662SN/A if (size > 1) { 2672SN/A for (int i = 0; i < size; ++i) { 2682SN/A stringstream namestr; 2692SN/A ccprintf(namestr, "%s.ctx%d", name(), i); 2702680Sktlim@umich.edu threadContexts[i]->regStats(namestr.str()); 2712SN/A } 2722SN/A } else if (size == 1) 2732680Sktlim@umich.edu threadContexts[0]->regStats(name()); 2742SN/A} 2752SN/A 2763495Sktlim@umich.eduTick 2773495Sktlim@umich.eduBaseCPU::nextCycle() 2783495Sktlim@umich.edu{ 2797823Ssteve.reinhardt@amd.com Tick next_tick = curTick() - phase + clock - 1; 2803495Sktlim@umich.edu next_tick -= (next_tick % clock); 2813661Srdreslin@umich.edu next_tick += phase; 2823495Sktlim@umich.edu return next_tick; 2833495Sktlim@umich.edu} 2843495Sktlim@umich.edu 2853495Sktlim@umich.eduTick 2863495Sktlim@umich.eduBaseCPU::nextCycle(Tick begin_tick) 2873495Sktlim@umich.edu{ 2883495Sktlim@umich.edu Tick next_tick = begin_tick; 2894599Sacolyte@umich.edu if (next_tick % clock != 0) 2904599Sacolyte@umich.edu next_tick = next_tick - (next_tick % clock) + clock; 2913661Srdreslin@umich.edu next_tick += phase; 2923495Sktlim@umich.edu 2937823Ssteve.reinhardt@amd.com assert(next_tick >= curTick()); 2943495Sktlim@umich.edu return next_tick; 2953495Sktlim@umich.edu} 296180SN/A 297180SN/Avoid 2982680Sktlim@umich.eduBaseCPU::registerThreadContexts() 299180SN/A{ 3006221Snate@binkert.org ThreadID size = threadContexts.size(); 3016221Snate@binkert.org for (ThreadID tid = 0; tid < size; ++tid) { 3026221Snate@binkert.org ThreadContext *tc = threadContexts[tid]; 3032378SN/A 3045718Shsul@eecs.umich.edu /** This is so that contextId and cpuId match where there is a 3055718Shsul@eecs.umich.edu * 1cpu:1context relationship. Otherwise, the order of registration 3065718Shsul@eecs.umich.edu * could affect the assignment and cpu 1 could have context id 3, for 3075718Shsul@eecs.umich.edu * example. We may even want to do something like this for SMT so that 3085718Shsul@eecs.umich.edu * cpu 0 has the lowest thread contexts and cpu N has the highest, but 3095718Shsul@eecs.umich.edu * I'll just do this for now 3105718Shsul@eecs.umich.edu */ 3116221Snate@binkert.org if (numThreads == 1) 3125718Shsul@eecs.umich.edu tc->setContextId(system->registerThreadContext(tc, _cpuId)); 3135718Shsul@eecs.umich.edu else 3145718Shsul@eecs.umich.edu tc->setContextId(system->registerThreadContext(tc)); 3158779Sgblack@eecs.umich.edu 3168779Sgblack@eecs.umich.edu if (!FullSystem) 3178779Sgblack@eecs.umich.edu tc->getProcessPtr()->assignThreadContext(tc->contextId()); 318180SN/A } 319180SN/A} 320180SN/A 321180SN/A 3224000Ssaidi@eecs.umich.eduint 3234000Ssaidi@eecs.umich.eduBaseCPU::findContext(ThreadContext *tc) 3244000Ssaidi@eecs.umich.edu{ 3256221Snate@binkert.org ThreadID size = threadContexts.size(); 3266221Snate@binkert.org for (ThreadID tid = 0; tid < size; ++tid) { 3276221Snate@binkert.org if (tc == threadContexts[tid]) 3286221Snate@binkert.org return tid; 3294000Ssaidi@eecs.umich.edu } 3304000Ssaidi@eecs.umich.edu return 0; 3314000Ssaidi@eecs.umich.edu} 3324000Ssaidi@eecs.umich.edu 333180SN/Avoid 3342798Sktlim@umich.eduBaseCPU::switchOut() 335180SN/A{ 3362359SN/A if (profileEvent && profileEvent->scheduled()) 3375606Snate@binkert.org deschedule(profileEvent); 338180SN/A} 339180SN/A 340180SN/Avoid 3414192Sktlim@umich.eduBaseCPU::takeOverFrom(BaseCPU *oldCPU, Port *ic, Port *dc) 342180SN/A{ 3432680Sktlim@umich.edu assert(threadContexts.size() == oldCPU->threadContexts.size()); 344180SN/A 3455712Shsul@eecs.umich.edu _cpuId = oldCPU->cpuId(); 3465712Shsul@eecs.umich.edu 3476221Snate@binkert.org ThreadID size = threadContexts.size(); 3486221Snate@binkert.org for (ThreadID i = 0; i < size; ++i) { 3492680Sktlim@umich.edu ThreadContext *newTC = threadContexts[i]; 3502680Sktlim@umich.edu ThreadContext *oldTC = oldCPU->threadContexts[i]; 351180SN/A 3522680Sktlim@umich.edu newTC->takeOverFrom(oldTC); 3532651Ssaidi@eecs.umich.edu 3542680Sktlim@umich.edu CpuEvent::replaceThreadContext(oldTC, newTC); 3552651Ssaidi@eecs.umich.edu 3565714Shsul@eecs.umich.edu assert(newTC->contextId() == oldTC->contextId()); 3575715Shsul@eecs.umich.edu assert(newTC->threadId() == oldTC->threadId()); 3585714Shsul@eecs.umich.edu system->replaceThreadContext(newTC, newTC->contextId()); 3592359SN/A 3605875Ssteve.reinhardt@amd.com /* This code no longer works since the zero register (e.g., 3615875Ssteve.reinhardt@amd.com * r31 on Alpha) doesn't necessarily contain zero at this 3625875Ssteve.reinhardt@amd.com * point. 3635875Ssteve.reinhardt@amd.com if (DTRACE(Context)) 3645217Ssaidi@eecs.umich.edu ThreadContext::compare(oldTC, newTC); 3655875Ssteve.reinhardt@amd.com */ 3667781SAli.Saidi@ARM.com 3677781SAli.Saidi@ARM.com Port *old_itb_port, *old_dtb_port, *new_itb_port, *new_dtb_port; 3687781SAli.Saidi@ARM.com old_itb_port = oldTC->getITBPtr()->getPort(); 3697781SAli.Saidi@ARM.com old_dtb_port = oldTC->getDTBPtr()->getPort(); 3707781SAli.Saidi@ARM.com new_itb_port = newTC->getITBPtr()->getPort(); 3717781SAli.Saidi@ARM.com new_dtb_port = newTC->getDTBPtr()->getPort(); 3727781SAli.Saidi@ARM.com 3737781SAli.Saidi@ARM.com // Move over any table walker ports if they exist 3747781SAli.Saidi@ARM.com if (new_itb_port && !new_itb_port->isConnected()) { 3757781SAli.Saidi@ARM.com assert(old_itb_port); 3767781SAli.Saidi@ARM.com Port *peer = old_itb_port->getPeer();; 3777781SAli.Saidi@ARM.com new_itb_port->setPeer(peer); 3787781SAli.Saidi@ARM.com peer->setPeer(new_itb_port); 3797781SAli.Saidi@ARM.com } 3807781SAli.Saidi@ARM.com if (new_dtb_port && !new_dtb_port->isConnected()) { 3817781SAli.Saidi@ARM.com assert(old_dtb_port); 3827781SAli.Saidi@ARM.com Port *peer = old_dtb_port->getPeer();; 3837781SAli.Saidi@ARM.com new_dtb_port->setPeer(peer); 3847781SAli.Saidi@ARM.com peer->setPeer(new_dtb_port); 3857781SAli.Saidi@ARM.com } 386180SN/A } 387605SN/A 3883520Sgblack@eecs.umich.edu interrupts = oldCPU->interrupts; 3895810Sgblack@eecs.umich.edu interrupts->setCPU(this); 3902254SN/A 3918779Sgblack@eecs.umich.edu if (FullSystem) { 3928779Sgblack@eecs.umich.edu for (ThreadID i = 0; i < size; ++i) 3938779Sgblack@eecs.umich.edu threadContexts[i]->profileClear(); 3942254SN/A 3958779Sgblack@eecs.umich.edu if (profileEvent) 3968779Sgblack@eecs.umich.edu schedule(profileEvent, curTick()); 3978779Sgblack@eecs.umich.edu } 3984192Sktlim@umich.edu 3994192Sktlim@umich.edu // Connect new CPU to old CPU's memory only if new CPU isn't 4004192Sktlim@umich.edu // connected to anything. Also connect old CPU's memory to new 4014192Sktlim@umich.edu // CPU. 4025476Snate@binkert.org if (!ic->isConnected()) { 4035476Snate@binkert.org Port *peer = oldCPU->getPort("icache_port")->getPeer(); 4044192Sktlim@umich.edu ic->setPeer(peer); 4055476Snate@binkert.org peer->setPeer(ic); 4064192Sktlim@umich.edu } 4074192Sktlim@umich.edu 4085476Snate@binkert.org if (!dc->isConnected()) { 4095476Snate@binkert.org Port *peer = oldCPU->getPort("dcache_port")->getPeer(); 4104192Sktlim@umich.edu dc->setPeer(peer); 4115476Snate@binkert.org peer->setPeer(dc); 4124192Sktlim@umich.edu } 413180SN/A} 414180SN/A 415180SN/A 4165536Srstrong@hp.comBaseCPU::ProfileEvent::ProfileEvent(BaseCPU *_cpu, Tick _interval) 4175606Snate@binkert.org : cpu(_cpu), interval(_interval) 4181917SN/A{ } 4191917SN/A 4201917SN/Avoid 4211917SN/ABaseCPU::ProfileEvent::process() 4221917SN/A{ 4236221Snate@binkert.org ThreadID size = cpu->threadContexts.size(); 4246221Snate@binkert.org for (ThreadID i = 0; i < size; ++i) { 4252680Sktlim@umich.edu ThreadContext *tc = cpu->threadContexts[i]; 4262680Sktlim@umich.edu tc->profileSample(); 4271917SN/A } 4282254SN/A 4297823Ssteve.reinhardt@amd.com cpu->schedule(this, curTick() + interval); 4301917SN/A} 4311917SN/A 4322SN/Avoid 433921SN/ABaseCPU::serialize(std::ostream &os) 434921SN/A{ 4354000Ssaidi@eecs.umich.edu SERIALIZE_SCALAR(instCnt); 4365647Sgblack@eecs.umich.edu interrupts->serialize(os); 437921SN/A} 438921SN/A 439921SN/Avoid 440921SN/ABaseCPU::unserialize(Checkpoint *cp, const std::string §ion) 441921SN/A{ 4424000Ssaidi@eecs.umich.edu UNSERIALIZE_SCALAR(instCnt); 4435647Sgblack@eecs.umich.edu interrupts->unserialize(cp, section); 444921SN/A} 445921SN/A 4461191SN/Avoid 4471191SN/ABaseCPU::traceFunctionsInternal(Addr pc) 4481191SN/A{ 4491191SN/A if (!debugSymbolTable) 4501191SN/A return; 4511191SN/A 4521191SN/A // if pc enters different function, print new function symbol and 4531191SN/A // update saved range. Otherwise do nothing. 4541191SN/A if (pc < currentFunctionStart || pc >= currentFunctionEnd) { 4551191SN/A string sym_str; 4561191SN/A bool found = debugSymbolTable->findNearestSymbol(pc, sym_str, 4571191SN/A currentFunctionStart, 4581191SN/A currentFunctionEnd); 4591191SN/A 4601191SN/A if (!found) { 4611191SN/A // no symbol found: use addr as label 4621191SN/A sym_str = csprintf("0x%x", pc); 4631191SN/A currentFunctionStart = pc; 4641191SN/A currentFunctionEnd = pc + 1; 4651191SN/A } 4661191SN/A 4671191SN/A ccprintf(*functionTraceStream, " (%d)\n%d: %s", 4687823Ssteve.reinhardt@amd.com curTick() - functionEntryTick, curTick(), sym_str); 4697823Ssteve.reinhardt@amd.com functionEntryTick = curTick(); 4701191SN/A } 4711191SN/A} 472