base.cc revision 6216
12SN/A/* 21762SN/A * Copyright (c) 2002-2005 The Regents of The University of Michigan 32SN/A * All rights reserved. 42SN/A * 52SN/A * Redistribution and use in source and binary forms, with or without 62SN/A * modification, are permitted provided that the following conditions are 72SN/A * met: redistributions of source code must retain the above copyright 82SN/A * notice, this list of conditions and the following disclaimer; 92SN/A * redistributions in binary form must reproduce the above copyright 102SN/A * notice, this list of conditions and the following disclaimer in the 112SN/A * documentation and/or other materials provided with the distribution; 122SN/A * neither the name of the copyright holders nor the names of its 132SN/A * contributors may be used to endorse or promote products derived from 142SN/A * this software without specific prior written permission. 152SN/A * 162SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu * 282665Ssaidi@eecs.umich.edu * Authors: Steve Reinhardt 292665Ssaidi@eecs.umich.edu * Nathan Binkert 302SN/A */ 312SN/A 321388SN/A#include <iostream> 332SN/A#include <string> 342SN/A#include <sstream> 352SN/A 361191SN/A#include "base/cprintf.hh" 371191SN/A#include "base/loader/symtab.hh" 381191SN/A#include "base/misc.hh" 391388SN/A#include "base/output.hh" 405529Snate@binkert.org#include "base/trace.hh" 411717SN/A#include "cpu/base.hh" 422651Ssaidi@eecs.umich.edu#include "cpu/cpuevent.hh" 432680Sktlim@umich.edu#include "cpu/thread_context.hh" 441977SN/A#include "cpu/profile.hh" 455529Snate@binkert.org#include "params/BaseCPU.hh" 463144Shsul@eecs.umich.edu#include "sim/sim_exit.hh" 472190SN/A#include "sim/process.hh" 4856SN/A#include "sim/sim_events.hh" 492190SN/A#include "sim/system.hh" 502SN/A 512359SN/A// Hack 522359SN/A#include "sim/stat_control.hh" 532359SN/A 542SN/Ausing namespace std; 552SN/A 562SN/Avector<BaseCPU *> BaseCPU::cpuList; 572SN/A 582SN/A// This variable reflects the max number of threads in any CPU. Be 592SN/A// careful to only use it once all the CPUs that you care about have 602SN/A// been initialized 612SN/Aint maxThreadsPerCPU = 1; 622SN/A 635606Snate@binkert.orgCPUProgressEvent::CPUProgressEvent(BaseCPU *_cpu, Tick ival) 646144Sksewell@umich.edu : Event(Event::Progress_Event_Pri), _interval(ival), lastNumInst(0), 656144Sksewell@umich.edu cpu(_cpu), _repeatEvent(true) 663126Sktlim@umich.edu{ 676144Sksewell@umich.edu if (_interval) 686144Sksewell@umich.edu cpu->schedule(this, curTick + _interval); 693126Sktlim@umich.edu} 703126Sktlim@umich.edu 712356SN/Avoid 722356SN/ACPUProgressEvent::process() 732356SN/A{ 742367SN/A Counter temp = cpu->totalInstructions(); 752356SN/A#ifndef NDEBUG 766144Sksewell@umich.edu double ipc = double(temp - lastNumInst) / (_interval / cpu->ticks(1)); 772367SN/A 786144Sksewell@umich.edu DPRINTFN("%s progress event, total committed:%i, progress insts committed: " 796144Sksewell@umich.edu "%lli, IPC: %0.8d\n", cpu->name(), temp, temp - lastNumInst, 806144Sksewell@umich.edu ipc); 812356SN/A ipc = 0.0; 822367SN/A#else 836144Sksewell@umich.edu cprintf("%lli: %s progress event, total committed:%i, progress insts " 846144Sksewell@umich.edu "committed: %lli\n", curTick, cpu->name(), temp, 856144Sksewell@umich.edu temp - lastNumInst); 862367SN/A#endif 872356SN/A lastNumInst = temp; 886144Sksewell@umich.edu 896144Sksewell@umich.edu if (_repeatEvent) 906144Sksewell@umich.edu cpu->schedule(this, curTick + _interval); 912356SN/A} 922356SN/A 932356SN/Aconst char * 945336Shines@cs.fsu.eduCPUProgressEvent::description() const 952356SN/A{ 964873Sstever@eecs.umich.edu return "CPU Progress"; 972356SN/A} 982356SN/A 991858SN/A#if FULL_SYSTEM 1001400SN/ABaseCPU::BaseCPU(Params *p) 1015712Shsul@eecs.umich.edu : MemObject(p), clock(p->clock), instCnt(0), _cpuId(p->cpu_id), 1025712Shsul@eecs.umich.edu interrupts(p->interrupts), 1035529Snate@binkert.org number_of_threads(p->numThreads), system(p->system), 1043661Srdreslin@umich.edu phase(p->phase) 1052SN/A#else 1061400SN/ABaseCPU::BaseCPU(Params *p) 1075712Shsul@eecs.umich.edu : MemObject(p), clock(p->clock), _cpuId(p->cpu_id), 1085529Snate@binkert.org number_of_threads(p->numThreads), system(p->system), 1093661Srdreslin@umich.edu phase(p->phase) 1102SN/A#endif 1112SN/A{ 1122359SN/A// currentTick = curTick; 1131062SN/A 1145712Shsul@eecs.umich.edu // if Python did not provide a valid ID, do it here 1155712Shsul@eecs.umich.edu if (_cpuId == -1 ) { 1165712Shsul@eecs.umich.edu _cpuId = cpuList.size(); 1175712Shsul@eecs.umich.edu } 1185712Shsul@eecs.umich.edu 1192SN/A // add self to global list of CPUs 1202SN/A cpuList.push_back(this); 1212SN/A 1225712Shsul@eecs.umich.edu DPRINTF(SyscallVerbose, "Constructing CPU with id %d\n", _cpuId); 1235712Shsul@eecs.umich.edu 1242SN/A if (number_of_threads > maxThreadsPerCPU) 1252SN/A maxThreadsPerCPU = number_of_threads; 1262SN/A 1272SN/A // allocate per-thread instruction-based event queues 1281354SN/A comInstEventQueue = new EventQueue *[number_of_threads]; 1292SN/A for (int i = 0; i < number_of_threads; ++i) 130503SN/A comInstEventQueue[i] = new EventQueue("instruction-based event queue"); 1312SN/A 1322SN/A // 1332SN/A // set up instruction-count-based termination events, if any 1342SN/A // 1355606Snate@binkert.org if (p->max_insts_any_thread != 0) { 1365606Snate@binkert.org const char *cause = "a thread reached the max instruction count"; 1375606Snate@binkert.org for (int i = 0; i < number_of_threads; ++i) { 1385606Snate@binkert.org Event *event = new SimLoopExitEvent(cause, 0); 1395606Snate@binkert.org comInstEventQueue[i]->schedule(event, p->max_insts_any_thread); 1405606Snate@binkert.org } 1415606Snate@binkert.org } 1422SN/A 1431400SN/A if (p->max_insts_all_threads != 0) { 1445606Snate@binkert.org const char *cause = "all threads reached the max instruction count"; 1455606Snate@binkert.org 1462SN/A // allocate & initialize shared downcounter: each event will 1472SN/A // decrement this when triggered; simulation will terminate 1482SN/A // when counter reaches 0 1492SN/A int *counter = new int; 1502SN/A *counter = number_of_threads; 1515606Snate@binkert.org for (int i = 0; i < number_of_threads; ++i) { 1525606Snate@binkert.org Event *event = new CountedExitEvent(cause, *counter); 1535606Snate@binkert.org comInstEventQueue[i]->schedule(event, p->max_insts_any_thread); 1545606Snate@binkert.org } 1552SN/A } 1562SN/A 157124SN/A // allocate per-thread load-based event queues 1581354SN/A comLoadEventQueue = new EventQueue *[number_of_threads]; 159124SN/A for (int i = 0; i < number_of_threads; ++i) 160124SN/A comLoadEventQueue[i] = new EventQueue("load-based event queue"); 161124SN/A 162124SN/A // 163124SN/A // set up instruction-count-based termination events, if any 164124SN/A // 1655606Snate@binkert.org if (p->max_loads_any_thread != 0) { 1665606Snate@binkert.org const char *cause = "a thread reached the max load count"; 1675606Snate@binkert.org for (int i = 0; i < number_of_threads; ++i) { 1685606Snate@binkert.org Event *event = new SimLoopExitEvent(cause, 0); 1695606Snate@binkert.org comLoadEventQueue[i]->schedule(event, p->max_loads_any_thread); 1705606Snate@binkert.org } 1715606Snate@binkert.org } 172124SN/A 1731400SN/A if (p->max_loads_all_threads != 0) { 1745606Snate@binkert.org const char *cause = "all threads reached the max load count"; 175124SN/A // allocate & initialize shared downcounter: each event will 176124SN/A // decrement this when triggered; simulation will terminate 177124SN/A // when counter reaches 0 178124SN/A int *counter = new int; 179124SN/A *counter = number_of_threads; 1805606Snate@binkert.org for (int i = 0; i < number_of_threads; ++i) { 1815606Snate@binkert.org Event *event = new CountedExitEvent(cause, *counter); 1825606Snate@binkert.org comLoadEventQueue[i]->schedule(event, p->max_loads_all_threads); 1835606Snate@binkert.org } 184124SN/A } 185124SN/A 1861191SN/A functionTracingEnabled = false; 1875529Snate@binkert.org if (p->function_trace) { 1881388SN/A functionTraceStream = simout.find(csprintf("ftrace.%s", name())); 1891191SN/A currentFunctionStart = currentFunctionEnd = 0; 1905529Snate@binkert.org functionEntryTick = p->function_trace_start; 1911191SN/A 1925529Snate@binkert.org if (p->function_trace_start == 0) { 1931191SN/A functionTracingEnabled = true; 1941191SN/A } else { 1955606Snate@binkert.org typedef EventWrapper<BaseCPU, &BaseCPU::enableFunctionTrace> wrap; 1965606Snate@binkert.org Event *event = new wrap(this, true); 1975606Snate@binkert.org schedule(event, p->function_trace_start); 1981191SN/A } 1991191SN/A } 2001917SN/A#if FULL_SYSTEM 2015810Sgblack@eecs.umich.edu interrupts->setCPU(this); 2025810Sgblack@eecs.umich.edu 2031917SN/A profileEvent = NULL; 2045529Snate@binkert.org if (params()->profile) 2055529Snate@binkert.org profileEvent = new ProfileEvent(this, params()->profile); 2061917SN/A#endif 2075529Snate@binkert.org tracer = params()->tracer; 2081917SN/A} 2091191SN/A 2101191SN/Avoid 2111191SN/ABaseCPU::enableFunctionTrace() 2121191SN/A{ 2131191SN/A functionTracingEnabled = true; 2141191SN/A} 2151191SN/A 2161191SN/ABaseCPU::~BaseCPU() 2171191SN/A{ 2181191SN/A} 2191191SN/A 2201129SN/Avoid 2211129SN/ABaseCPU::init() 2221129SN/A{ 2235529Snate@binkert.org if (!params()->defer_registration) 2242680Sktlim@umich.edu registerThreadContexts(); 2251129SN/A} 226180SN/A 2272SN/Avoid 2281917SN/ABaseCPU::startup() 2291917SN/A{ 2301917SN/A#if FULL_SYSTEM 2315529Snate@binkert.org if (!params()->defer_registration && profileEvent) 2325606Snate@binkert.org schedule(profileEvent, curTick); 2331917SN/A#endif 2342356SN/A 2355529Snate@binkert.org if (params()->progress_interval) { 2365606Snate@binkert.org Tick num_ticks = ticks(params()->progress_interval); 2376144Sksewell@umich.edu 2386144Sksewell@umich.edu Event *event; 2396144Sksewell@umich.edu event = new CPUProgressEvent(this, num_ticks); 2402356SN/A } 2411917SN/A} 2421917SN/A 2431917SN/A 2441917SN/Avoid 2452SN/ABaseCPU::regStats() 2462SN/A{ 247729SN/A using namespace Stats; 248707SN/A 249707SN/A numCycles 250707SN/A .name(name() + ".numCycles") 251707SN/A .desc("number of cpu cycles simulated") 252707SN/A ; 253707SN/A 2542680Sktlim@umich.edu int size = threadContexts.size(); 2552SN/A if (size > 1) { 2562SN/A for (int i = 0; i < size; ++i) { 2572SN/A stringstream namestr; 2582SN/A ccprintf(namestr, "%s.ctx%d", name(), i); 2592680Sktlim@umich.edu threadContexts[i]->regStats(namestr.str()); 2602SN/A } 2612SN/A } else if (size == 1) 2622680Sktlim@umich.edu threadContexts[0]->regStats(name()); 2632190SN/A 2642190SN/A#if FULL_SYSTEM 2652190SN/A#endif 2662SN/A} 2672SN/A 2683495Sktlim@umich.eduTick 2693495Sktlim@umich.eduBaseCPU::nextCycle() 2703495Sktlim@umich.edu{ 2713661Srdreslin@umich.edu Tick next_tick = curTick - phase + clock - 1; 2723495Sktlim@umich.edu next_tick -= (next_tick % clock); 2733661Srdreslin@umich.edu next_tick += phase; 2743495Sktlim@umich.edu return next_tick; 2753495Sktlim@umich.edu} 2763495Sktlim@umich.edu 2773495Sktlim@umich.eduTick 2783495Sktlim@umich.eduBaseCPU::nextCycle(Tick begin_tick) 2793495Sktlim@umich.edu{ 2803495Sktlim@umich.edu Tick next_tick = begin_tick; 2814599Sacolyte@umich.edu if (next_tick % clock != 0) 2824599Sacolyte@umich.edu next_tick = next_tick - (next_tick % clock) + clock; 2833661Srdreslin@umich.edu next_tick += phase; 2843495Sktlim@umich.edu 2853495Sktlim@umich.edu assert(next_tick >= curTick); 2863495Sktlim@umich.edu return next_tick; 2873495Sktlim@umich.edu} 288180SN/A 289180SN/Avoid 2902680Sktlim@umich.eduBaseCPU::registerThreadContexts() 291180SN/A{ 2922680Sktlim@umich.edu for (int i = 0; i < threadContexts.size(); ++i) { 2932680Sktlim@umich.edu ThreadContext *tc = threadContexts[i]; 2942378SN/A 2955718Shsul@eecs.umich.edu /** This is so that contextId and cpuId match where there is a 2965718Shsul@eecs.umich.edu * 1cpu:1context relationship. Otherwise, the order of registration 2975718Shsul@eecs.umich.edu * could affect the assignment and cpu 1 could have context id 3, for 2985718Shsul@eecs.umich.edu * example. We may even want to do something like this for SMT so that 2995718Shsul@eecs.umich.edu * cpu 0 has the lowest thread contexts and cpu N has the highest, but 3005718Shsul@eecs.umich.edu * I'll just do this for now 3015718Shsul@eecs.umich.edu */ 3025718Shsul@eecs.umich.edu if (number_of_threads == 1) 3035718Shsul@eecs.umich.edu tc->setContextId(system->registerThreadContext(tc, _cpuId)); 3045718Shsul@eecs.umich.edu else 3055718Shsul@eecs.umich.edu tc->setContextId(system->registerThreadContext(tc)); 3065713Shsul@eecs.umich.edu#if !FULL_SYSTEM 3075714Shsul@eecs.umich.edu tc->getProcessPtr()->assignThreadContext(tc->contextId()); 308180SN/A#endif 309180SN/A } 310180SN/A} 311180SN/A 312180SN/A 3134000Ssaidi@eecs.umich.eduint 3144000Ssaidi@eecs.umich.eduBaseCPU::findContext(ThreadContext *tc) 3154000Ssaidi@eecs.umich.edu{ 3164000Ssaidi@eecs.umich.edu for (int i = 0; i < threadContexts.size(); ++i) { 3174000Ssaidi@eecs.umich.edu if (tc == threadContexts[i]) 3184000Ssaidi@eecs.umich.edu return i; 3194000Ssaidi@eecs.umich.edu } 3204000Ssaidi@eecs.umich.edu return 0; 3214000Ssaidi@eecs.umich.edu} 3224000Ssaidi@eecs.umich.edu 323180SN/Avoid 3242798Sktlim@umich.eduBaseCPU::switchOut() 325180SN/A{ 3262359SN/A// panic("This CPU doesn't support sampling!"); 3272359SN/A#if FULL_SYSTEM 3282359SN/A if (profileEvent && profileEvent->scheduled()) 3295606Snate@binkert.org deschedule(profileEvent); 3302359SN/A#endif 331180SN/A} 332180SN/A 333180SN/Avoid 3344192Sktlim@umich.eduBaseCPU::takeOverFrom(BaseCPU *oldCPU, Port *ic, Port *dc) 335180SN/A{ 3362680Sktlim@umich.edu assert(threadContexts.size() == oldCPU->threadContexts.size()); 337180SN/A 3385712Shsul@eecs.umich.edu _cpuId = oldCPU->cpuId(); 3395712Shsul@eecs.umich.edu 3402680Sktlim@umich.edu for (int i = 0; i < threadContexts.size(); ++i) { 3412680Sktlim@umich.edu ThreadContext *newTC = threadContexts[i]; 3422680Sktlim@umich.edu ThreadContext *oldTC = oldCPU->threadContexts[i]; 343180SN/A 3442680Sktlim@umich.edu newTC->takeOverFrom(oldTC); 3452651Ssaidi@eecs.umich.edu 3462680Sktlim@umich.edu CpuEvent::replaceThreadContext(oldTC, newTC); 3472651Ssaidi@eecs.umich.edu 3485714Shsul@eecs.umich.edu assert(newTC->contextId() == oldTC->contextId()); 3495715Shsul@eecs.umich.edu assert(newTC->threadId() == oldTC->threadId()); 3505714Shsul@eecs.umich.edu system->replaceThreadContext(newTC, newTC->contextId()); 3512359SN/A 3525875Ssteve.reinhardt@amd.com /* This code no longer works since the zero register (e.g., 3535875Ssteve.reinhardt@amd.com * r31 on Alpha) doesn't necessarily contain zero at this 3545875Ssteve.reinhardt@amd.com * point. 3555875Ssteve.reinhardt@amd.com if (DTRACE(Context)) 3565217Ssaidi@eecs.umich.edu ThreadContext::compare(oldTC, newTC); 3575875Ssteve.reinhardt@amd.com */ 358180SN/A } 359605SN/A 3601858SN/A#if FULL_SYSTEM 3613520Sgblack@eecs.umich.edu interrupts = oldCPU->interrupts; 3625810Sgblack@eecs.umich.edu interrupts->setCPU(this); 3632254SN/A 3642680Sktlim@umich.edu for (int i = 0; i < threadContexts.size(); ++i) 3652680Sktlim@umich.edu threadContexts[i]->profileClear(); 3662254SN/A 3674947Snate@binkert.org if (profileEvent) 3685606Snate@binkert.org schedule(profileEvent, curTick); 369612SN/A#endif 3704192Sktlim@umich.edu 3714192Sktlim@umich.edu // Connect new CPU to old CPU's memory only if new CPU isn't 3724192Sktlim@umich.edu // connected to anything. Also connect old CPU's memory to new 3734192Sktlim@umich.edu // CPU. 3745476Snate@binkert.org if (!ic->isConnected()) { 3755476Snate@binkert.org Port *peer = oldCPU->getPort("icache_port")->getPeer(); 3764192Sktlim@umich.edu ic->setPeer(peer); 3775476Snate@binkert.org peer->setPeer(ic); 3784192Sktlim@umich.edu } 3794192Sktlim@umich.edu 3805476Snate@binkert.org if (!dc->isConnected()) { 3815476Snate@binkert.org Port *peer = oldCPU->getPort("dcache_port")->getPeer(); 3824192Sktlim@umich.edu dc->setPeer(peer); 3835476Snate@binkert.org peer->setPeer(dc); 3844192Sktlim@umich.edu } 385180SN/A} 386180SN/A 387180SN/A 3881858SN/A#if FULL_SYSTEM 3895536Srstrong@hp.comBaseCPU::ProfileEvent::ProfileEvent(BaseCPU *_cpu, Tick _interval) 3905606Snate@binkert.org : cpu(_cpu), interval(_interval) 3911917SN/A{ } 3921917SN/A 3931917SN/Avoid 3941917SN/ABaseCPU::ProfileEvent::process() 3951917SN/A{ 3962680Sktlim@umich.edu for (int i = 0, size = cpu->threadContexts.size(); i < size; ++i) { 3972680Sktlim@umich.edu ThreadContext *tc = cpu->threadContexts[i]; 3982680Sktlim@umich.edu tc->profileSample(); 3991917SN/A } 4002254SN/A 4015606Snate@binkert.org cpu->schedule(this, curTick + interval); 4021917SN/A} 4031917SN/A 4042SN/Avoid 405921SN/ABaseCPU::serialize(std::ostream &os) 406921SN/A{ 4074000Ssaidi@eecs.umich.edu SERIALIZE_SCALAR(instCnt); 4085647Sgblack@eecs.umich.edu interrupts->serialize(os); 409921SN/A} 410921SN/A 411921SN/Avoid 412921SN/ABaseCPU::unserialize(Checkpoint *cp, const std::string §ion) 413921SN/A{ 4144000Ssaidi@eecs.umich.edu UNSERIALIZE_SCALAR(instCnt); 4155647Sgblack@eecs.umich.edu interrupts->unserialize(cp, section); 416921SN/A} 417921SN/A 4182SN/A#endif // FULL_SYSTEM 4192SN/A 4201191SN/Avoid 4211191SN/ABaseCPU::traceFunctionsInternal(Addr pc) 4221191SN/A{ 4231191SN/A if (!debugSymbolTable) 4241191SN/A return; 4251191SN/A 4261191SN/A // if pc enters different function, print new function symbol and 4271191SN/A // update saved range. Otherwise do nothing. 4281191SN/A if (pc < currentFunctionStart || pc >= currentFunctionEnd) { 4291191SN/A string sym_str; 4301191SN/A bool found = debugSymbolTable->findNearestSymbol(pc, sym_str, 4311191SN/A currentFunctionStart, 4321191SN/A currentFunctionEnd); 4331191SN/A 4341191SN/A if (!found) { 4351191SN/A // no symbol found: use addr as label 4361191SN/A sym_str = csprintf("0x%x", pc); 4371191SN/A currentFunctionStart = pc; 4381191SN/A currentFunctionEnd = pc + 1; 4391191SN/A } 4401191SN/A 4411191SN/A ccprintf(*functionTraceStream, " (%d)\n%d: %s", 4421191SN/A curTick - functionEntryTick, curTick, sym_str); 4431191SN/A functionEntryTick = curTick; 4441191SN/A } 4451191SN/A} 446