base.cc revision 4628
1545SN/A/* 21762SN/A * Copyright (c) 2002-2005 The Regents of The University of Michigan 3545SN/A * All rights reserved. 4545SN/A * 5545SN/A * Redistribution and use in source and binary forms, with or without 6545SN/A * modification, are permitted provided that the following conditions are 7545SN/A * met: redistributions of source code must retain the above copyright 8545SN/A * notice, this list of conditions and the following disclaimer; 9545SN/A * redistributions in binary form must reproduce the above copyright 10545SN/A * notice, this list of conditions and the following disclaimer in the 11545SN/A * documentation and/or other materials provided with the distribution; 12545SN/A * neither the name of the copyright holders nor the names of its 13545SN/A * contributors may be used to endorse or promote products derived from 14545SN/A * this software without specific prior written permission. 15545SN/A * 16545SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17545SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18545SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19545SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20545SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21545SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22545SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23545SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24545SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25545SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26545SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu * 282665Ssaidi@eecs.umich.edu * Authors: Steve Reinhardt 292665Ssaidi@eecs.umich.edu * Nathan Binkert 30545SN/A */ 31545SN/A 321310SN/A#include <iostream> 331310SN/A#include <string> 34545SN/A#include <sstream> 355386Sstever@gmail.com 362542SN/A#include "base/cprintf.hh" 373348Sbinkertn@umich.edu#include "base/loader/symtab.hh" 383348Sbinkertn@umich.edu#include "base/misc.hh" 394762Snate@binkert.org#include "base/output.hh" 404762Snate@binkert.org#include "cpu/base.hh" 414762Snate@binkert.org#include "cpu/cpuevent.hh" 422489SN/A#include "cpu/thread_context.hh" 43545SN/A#include "cpu/profile.hh" 443090Sstever@eecs.umich.edu#include "sim/sim_exit.hh" 451310SN/A#include "sim/param.hh" 462384SN/A#include "sim/process.hh" 472489SN/A#include "sim/sim_events.hh" 482522SN/A#include "sim/system.hh" 49545SN/A 502489SN/A#include "base/trace.hh" 512489SN/A 522489SN/A// Hack 532489SN/A#include "sim/stat_control.hh" 542489SN/A 553090Sstever@eecs.umich.eduusing namespace std; 563090Sstever@eecs.umich.edu 572914Ssaidi@eecs.umich.eduvector<BaseCPU *> BaseCPU::cpuList; 58545SN/A 59545SN/A// This variable reflects the max number of threads in any CPU. Be 602489SN/A// careful to only use it once all the CPUs that you care about have 612384SN/A// been initialized 622384SN/Aint maxThreadsPerCPU = 1; 633349Sbinkertn@umich.edu 642384SN/ACPUProgressEvent::CPUProgressEvent(EventQueue *q, Tick ival, 653090Sstever@eecs.umich.edu BaseCPU *_cpu) 664475Sstever@eecs.umich.edu : Event(q, Event::Progress_Event_Pri), interval(ival), 672384SN/A lastNumInst(0), cpu(_cpu) 682384SN/A{ 693091Sstever@eecs.umich.edu if (interval) 702901Ssaidi@eecs.umich.edu schedule(curTick + interval); 712384SN/A} 722384SN/A 732565SN/Avoid 742384SN/ACPUProgressEvent::process() 752384SN/A{ 762384SN/A Counter temp = cpu->totalInstructions(); 775386Sstever@gmail.com#ifndef NDEBUG 782784Ssaidi@eecs.umich.edu double ipc = double(temp - lastNumInst) / (interval / cpu->cycles(1)); 792784Ssaidi@eecs.umich.edu 802784Ssaidi@eecs.umich.edu DPRINTFN("%s progress event, instructions committed: %lli, IPC: %0.8d\n", 812784Ssaidi@eecs.umich.edu cpu->name(), temp - lastNumInst, ipc); 822784Ssaidi@eecs.umich.edu ipc = 0.0; 832784Ssaidi@eecs.umich.edu#else 842784Ssaidi@eecs.umich.edu cprintf("%lli: %s progress event, instructions committed: %lli\n", 852784Ssaidi@eecs.umich.edu curTick, cpu->name(), temp - lastNumInst); 862784Ssaidi@eecs.umich.edu#endif 872784Ssaidi@eecs.umich.edu lastNumInst = temp; 882784Ssaidi@eecs.umich.edu schedule(curTick + interval); 892784Ssaidi@eecs.umich.edu} 902784Ssaidi@eecs.umich.edu 912784Ssaidi@eecs.umich.educonst char * 925534Ssaidi@eecs.umich.eduCPUProgressEvent::description() 935534Ssaidi@eecs.umich.edu{ 945534Ssaidi@eecs.umich.edu return "CPU Progress event"; 955534Ssaidi@eecs.umich.edu} 965534Ssaidi@eecs.umich.edu 975534Ssaidi@eecs.umich.edu#if FULL_SYSTEM 982784Ssaidi@eecs.umich.eduBaseCPU::BaseCPU(Params *p) 992784Ssaidi@eecs.umich.edu : MemObject(p->name), clock(p->clock), instCnt(0), 1002784Ssaidi@eecs.umich.edu params(p), number_of_threads(p->numberOfThreads), system(p->system), 1012565SN/A phase(p->phase) 1023349Sbinkertn@umich.edu#else 1032384SN/ABaseCPU::BaseCPU(Params *p) 1042901Ssaidi@eecs.umich.edu : MemObject(p->name), clock(p->clock), params(p), 1052565SN/A number_of_threads(p->numberOfThreads), system(p->system), 1062901Ssaidi@eecs.umich.edu phase(p->phase) 1072565SN/A#endif 1082565SN/A{ 1092565SN/A// currentTick = curTick; 1102384SN/A DPRINTF(FullCPU, "BaseCPU: Creating object, mem address %#x.\n", this); 1112901Ssaidi@eecs.umich.edu 1122901Ssaidi@eecs.umich.edu // add self to global list of CPUs 1132901Ssaidi@eecs.umich.edu cpuList.push_back(this); 1142901Ssaidi@eecs.umich.edu 1152901Ssaidi@eecs.umich.edu DPRINTF(FullCPU, "BaseCPU: CPU added to cpuList, mem address %#x.\n", 1162901Ssaidi@eecs.umich.edu this); 1172901Ssaidi@eecs.umich.edu 1184435Ssaidi@eecs.umich.edu if (number_of_threads > maxThreadsPerCPU) 1194435Ssaidi@eecs.umich.edu maxThreadsPerCPU = number_of_threads; 1204435Ssaidi@eecs.umich.edu 1214435Ssaidi@eecs.umich.edu // allocate per-thread instruction-based event queues 1224435Ssaidi@eecs.umich.edu comInstEventQueue = new EventQueue *[number_of_threads]; 1234435Ssaidi@eecs.umich.edu for (int i = 0; i < number_of_threads; ++i) 1244435Ssaidi@eecs.umich.edu comInstEventQueue[i] = new EventQueue("instruction-based event queue"); 1254435Ssaidi@eecs.umich.edu 1263349Sbinkertn@umich.edu // 1273349Sbinkertn@umich.edu // set up instruction-count-based termination events, if any 1283918Ssaidi@eecs.umich.edu // 1293349Sbinkertn@umich.edu if (p->max_insts_any_thread != 0) 1302384SN/A for (int i = 0; i < number_of_threads; ++i) 1312384SN/A schedExitSimLoop("a thread reached the max instruction count", 1322384SN/A p->max_insts_any_thread, 0, 1332384SN/A comInstEventQueue[i]); 1342384SN/A 1352657Ssaidi@eecs.umich.edu if (p->max_insts_all_threads != 0) { 1362384SN/A // allocate & initialize shared downcounter: each event will 1373090Sstever@eecs.umich.edu // decrement this when triggered; simulation will terminate 1384475Sstever@eecs.umich.edu // when counter reaches 0 1394475Sstever@eecs.umich.edu int *counter = new int; 1402384SN/A *counter = number_of_threads; 1414435Ssaidi@eecs.umich.edu for (int i = 0; i < number_of_threads; ++i) 1424435Ssaidi@eecs.umich.edu new CountedExitEvent(comInstEventQueue[i], 1434435Ssaidi@eecs.umich.edu "all threads reached the max instruction count", 1444435Ssaidi@eecs.umich.edu p->max_insts_all_threads, *counter); 1454435Ssaidi@eecs.umich.edu } 1462489SN/A 1472384SN/A // allocate per-thread load-based event queues 1482901Ssaidi@eecs.umich.edu comLoadEventQueue = new EventQueue *[number_of_threads]; 1492565SN/A for (int i = 0; i < number_of_threads; ++i) 1502641Sstever@eecs.umich.edu comLoadEventQueue[i] = new EventQueue("load-based event queue"); 1515534Ssaidi@eecs.umich.edu 1522565SN/A // 1532565SN/A // set up instruction-count-based termination events, if any 1542384SN/A // 1554263Ssaidi@eecs.umich.edu if (p->max_loads_any_thread != 0) 1562901Ssaidi@eecs.umich.edu for (int i = 0; i < number_of_threads; ++i) 1572384SN/A schedExitSimLoop("a thread reached the max load count", 1582384SN/A p->max_loads_any_thread, 0, 1592489SN/A comLoadEventQueue[i]); 1602489SN/A 1612489SN/A if (p->max_loads_all_threads != 0) { 1622489SN/A // allocate & initialize shared downcounter: each event will 1632489SN/A // decrement this when triggered; simulation will terminate 1642489SN/A // when counter reaches 0 1652489SN/A int *counter = new int; 1662542SN/A *counter = number_of_threads; 1672384SN/A for (int i = 0; i < number_of_threads; ++i) 1682384SN/A new CountedExitEvent(comLoadEventQueue[i], 1692384SN/A "all threads reached the max load count", 1702489SN/A p->max_loads_all_threads, *counter); 1712489SN/A } 1721310SN/A 1732384SN/A functionTracingEnabled = false; 1742901Ssaidi@eecs.umich.edu if (p->functionTrace) { 1752901Ssaidi@eecs.umich.edu functionTraceStream = simout.find(csprintf("ftrace.%s", name())); 1762489SN/A currentFunctionStart = currentFunctionEnd = 0; 1772489SN/A functionEntryTick = p->functionTraceStart; 1782384SN/A 1792384SN/A if (p->functionTraceStart == 0) { 1802521SN/A functionTracingEnabled = true; 1812384SN/A } else { 1823090Sstever@eecs.umich.edu new EventWrapper<BaseCPU, &BaseCPU::enableFunctionTrace>(this, 1833090Sstever@eecs.umich.edu p->functionTraceStart, 1842523SN/A true); 1852523SN/A } 1862523SN/A } 1873349Sbinkertn@umich.edu#if FULL_SYSTEM 1882384SN/A profileEvent = NULL; 1892489SN/A if (params->profile) 1902523SN/A profileEvent = new ProfileEvent(this, params->profile); 1912523SN/A#endif 1922523SN/A} 1932523SN/A 1943349Sbinkertn@umich.eduBaseCPU::Params::Params() 195545SN/A{ 196545SN/A#if FULL_SYSTEM 1974762Snate@binkert.org profile = false; 1984762Snate@binkert.org#endif 1994762Snate@binkert.org checker = NULL; 2004762Snate@binkert.org} 2014762Snate@binkert.org 2024762Snate@binkert.orgvoid 2032512SN/ABaseCPU::enableFunctionTrace() 2044762Snate@binkert.org{ 2054762Snate@binkert.org functionTracingEnabled = true; 2062384SN/A} 2072541SN/A 2082541SN/ABaseCPU::~BaseCPU() 2092901Ssaidi@eecs.umich.edu{ 2102901Ssaidi@eecs.umich.edu} 2112738Sstever@eecs.umich.edu 2122384SN/Avoid 2132521SN/ABaseCPU::init() 2142512SN/A{ 2152512SN/A if (!params->deferRegistration) 2162901Ssaidi@eecs.umich.edu registerThreadContexts(); 2172384SN/A} 2182521SN/A 2192384SN/Avoid 2202384SN/ABaseCPU::startup() 2212489SN/A{ 2222489SN/A#if FULL_SYSTEM 223545SN/A if (!params->deferRegistration && profileEvent) 224545SN/A profileEvent->schedule(curTick); 2252512SN/A#endif 2262512SN/A 2272512SN/A if (params->progress_interval) { 2282512SN/A new CPUProgressEvent(&mainEventQueue, 2292512SN/A cycles(params->progress_interval), 2302512SN/A this); 2312512SN/A } 2322521SN/A} 2332512SN/A 2342512SN/A 2352512SN/Avoid 2362512SN/ABaseCPU::regStats() 2372512SN/A{ 2384762Snate@binkert.org using namespace Stats; 2394762Snate@binkert.org 2404762Snate@binkert.org numCycles 2414762Snate@binkert.org .name(name() + ".numCycles") 2424762Snate@binkert.org .desc("number of cpu cycles simulated") 2434762Snate@binkert.org ; 2444762Snate@binkert.org 2454762Snate@binkert.org int size = threadContexts.size(); 2462512SN/A if (size > 1) { 2472539SN/A for (int i = 0; i < size; ++i) { 2482982Sstever@eecs.umich.edu stringstream namestr; 2492539SN/A ccprintf(namestr, "%s.ctx%d", name(), i); 2502542SN/A threadContexts[i]->regStats(namestr.str()); 2512539SN/A } 2522512SN/A } else if (size == 1) 2532512SN/A threadContexts[0]->regStats(name()); 254545SN/A 255545SN/A#if FULL_SYSTEM 2564435Ssaidi@eecs.umich.edu#endif 2572384SN/A} 2584435Ssaidi@eecs.umich.edu 2594435Ssaidi@eecs.umich.eduTick 260545SN/ABaseCPU::nextCycle() 261545SN/A{ 2624762Snate@binkert.org Tick next_tick = curTick - phase + clock - 1; 2634762Snate@binkert.org next_tick -= (next_tick % clock); 264545SN/A next_tick += phase; 2652384SN/A return next_tick; 2664762Snate@binkert.org} 2674762Snate@binkert.org 2684762Snate@binkert.orgTick 2694762Snate@binkert.orgBaseCPU::nextCycle(Tick begin_tick) 2704762Snate@binkert.org{ 2714762Snate@binkert.org Tick next_tick = begin_tick; 2725534Ssaidi@eecs.umich.edu next_tick -= (next_tick % clock); 2734022Sstever@eecs.umich.edu next_tick += phase; 2745534Ssaidi@eecs.umich.edu 2754022Sstever@eecs.umich.edu while (next_tick < curTick) 2762565SN/A next_tick += clock; 2775534Ssaidi@eecs.umich.edu 2784263Ssaidi@eecs.umich.edu assert(next_tick >= curTick); 2795534Ssaidi@eecs.umich.edu return next_tick; 2804263Ssaidi@eecs.umich.edu} 2812565SN/A 2822565SN/Avoid 2832565SN/ABaseCPU::registerThreadContexts() 2842901Ssaidi@eecs.umich.edu{ 2852901Ssaidi@eecs.umich.edu for (int i = 0; i < threadContexts.size(); ++i) { 2864263Ssaidi@eecs.umich.edu ThreadContext *tc = threadContexts[i]; 2874263Ssaidi@eecs.umich.edu 2882738Sstever@eecs.umich.edu#if FULL_SYSTEM 2892384SN/A int id = params->cpu_id; 2902565SN/A if (id != -1) 2912565SN/A id += i; 2922565SN/A 2932901Ssaidi@eecs.umich.edu tc->setCpuId(system->registerThreadContext(tc, id)); 2942384SN/A#else 2952565SN/A tc->setCpuId(tc->getProcessPtr()->registerThreadContext(tc)); 2962565SN/A#endif 2972565SN/A } 2982901Ssaidi@eecs.umich.edu} 2992384SN/A 3002565SN/A 3012384SN/Aint 3022384SN/ABaseCPU::findContext(ThreadContext *tc) 3032489SN/A{ 3042489SN/A for (int i = 0; i < threadContexts.size(); ++i) { 305545SN/A if (tc == threadContexts[i]) 306545SN/A return i; 3072384SN/A } 3081310SN/A return 0; 309} 310 311void 312BaseCPU::switchOut() 313{ 314// panic("This CPU doesn't support sampling!"); 315#if FULL_SYSTEM 316 if (profileEvent && profileEvent->scheduled()) 317 profileEvent->deschedule(); 318#endif 319} 320 321void 322BaseCPU::takeOverFrom(BaseCPU *oldCPU, Port *ic, Port *dc) 323{ 324 assert(threadContexts.size() == oldCPU->threadContexts.size()); 325 326 for (int i = 0; i < threadContexts.size(); ++i) { 327 ThreadContext *newTC = threadContexts[i]; 328 ThreadContext *oldTC = oldCPU->threadContexts[i]; 329 330 newTC->takeOverFrom(oldTC); 331 332 CpuEvent::replaceThreadContext(oldTC, newTC); 333 334 assert(newTC->readCpuId() == oldTC->readCpuId()); 335#if FULL_SYSTEM 336 system->replaceThreadContext(newTC, newTC->readCpuId()); 337#else 338 assert(newTC->getProcessPtr() == oldTC->getProcessPtr()); 339 newTC->getProcessPtr()->replaceThreadContext(newTC, newTC->readCpuId()); 340#endif 341 342// TheISA::compareXCs(oldXC, newXC); 343 } 344 345#if FULL_SYSTEM 346 interrupts = oldCPU->interrupts; 347 348 for (int i = 0; i < threadContexts.size(); ++i) 349 threadContexts[i]->profileClear(); 350 351 // The Sampler must take care of this! 352// if (profileEvent) 353// profileEvent->schedule(curTick); 354#endif 355 356 // Connect new CPU to old CPU's memory only if new CPU isn't 357 // connected to anything. Also connect old CPU's memory to new 358 // CPU. 359 Port *peer; 360 if (ic->getPeer() == NULL) { 361 peer = oldCPU->getPort("icache_port")->getPeer(); 362 ic->setPeer(peer); 363 } else { 364 peer = ic->getPeer(); 365 } 366 peer->setPeer(ic); 367 368 if (dc->getPeer() == NULL) { 369 peer = oldCPU->getPort("dcache_port")->getPeer(); 370 dc->setPeer(peer); 371 } else { 372 peer = dc->getPeer(); 373 } 374 peer->setPeer(dc); 375} 376 377 378#if FULL_SYSTEM 379BaseCPU::ProfileEvent::ProfileEvent(BaseCPU *_cpu, int _interval) 380 : Event(&mainEventQueue), cpu(_cpu), interval(_interval) 381{ } 382 383void 384BaseCPU::ProfileEvent::process() 385{ 386 for (int i = 0, size = cpu->threadContexts.size(); i < size; ++i) { 387 ThreadContext *tc = cpu->threadContexts[i]; 388 tc->profileSample(); 389 } 390 391 schedule(curTick + interval); 392} 393 394void 395BaseCPU::post_interrupt(int int_num, int index) 396{ 397 interrupts.post(int_num, index); 398} 399 400void 401BaseCPU::clear_interrupt(int int_num, int index) 402{ 403 interrupts.clear(int_num, index); 404} 405 406void 407BaseCPU::clear_interrupts() 408{ 409 interrupts.clear_all(); 410} 411 412uint64_t 413BaseCPU::get_interrupts(int int_num) 414{ 415 return interrupts.get_vec(int_num); 416} 417 418void 419BaseCPU::serialize(std::ostream &os) 420{ 421 SERIALIZE_SCALAR(instCnt); 422 interrupts.serialize(os); 423} 424 425void 426BaseCPU::unserialize(Checkpoint *cp, const std::string §ion) 427{ 428 UNSERIALIZE_SCALAR(instCnt); 429 interrupts.unserialize(cp, section); 430} 431 432#endif // FULL_SYSTEM 433 434void 435BaseCPU::traceFunctionsInternal(Addr pc) 436{ 437 if (!debugSymbolTable) 438 return; 439 440 // if pc enters different function, print new function symbol and 441 // update saved range. Otherwise do nothing. 442 if (pc < currentFunctionStart || pc >= currentFunctionEnd) { 443 string sym_str; 444 bool found = debugSymbolTable->findNearestSymbol(pc, sym_str, 445 currentFunctionStart, 446 currentFunctionEnd); 447 448 if (!found) { 449 // no symbol found: use addr as label 450 sym_str = csprintf("0x%x", pc); 451 currentFunctionStart = pc; 452 currentFunctionEnd = pc + 1; 453 } 454 455 ccprintf(*functionTraceStream, " (%d)\n%d: %s", 456 curTick - functionEntryTick, curTick, sym_str); 457 functionEntryTick = curTick; 458 } 459} 460 461 462DEFINE_SIM_OBJECT_CLASS_NAME("BaseCPU", BaseCPU) 463