base.cc revision 2651
12SN/A/*
21762SN/A * Copyright (c) 2002-2005 The Regents of The University of Michigan
32SN/A * All rights reserved.
42SN/A *
52SN/A * Redistribution and use in source and binary forms, with or without
62SN/A * modification, are permitted provided that the following conditions are
72SN/A * met: redistributions of source code must retain the above copyright
82SN/A * notice, this list of conditions and the following disclaimer;
92SN/A * redistributions in binary form must reproduce the above copyright
102SN/A * notice, this list of conditions and the following disclaimer in the
112SN/A * documentation and/or other materials provided with the distribution;
122SN/A * neither the name of the copyright holders nor the names of its
132SN/A * contributors may be used to endorse or promote products derived from
142SN/A * this software without specific prior written permission.
152SN/A *
162SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
172SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
182SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
192SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
202SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
222SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
232SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
242SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
252SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
262SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272SN/A */
282SN/A
291388SN/A#include <iostream>
302SN/A#include <string>
312SN/A#include <sstream>
322SN/A
331191SN/A#include "base/cprintf.hh"
341191SN/A#include "base/loader/symtab.hh"
351191SN/A#include "base/misc.hh"
361388SN/A#include "base/output.hh"
371717SN/A#include "cpu/base.hh"
382651Ssaidi@eecs.umich.edu#include "cpu/cpuevent.hh"
3956SN/A#include "cpu/exec_context.hh"
401977SN/A#include "cpu/profile.hh"
411717SN/A#include "cpu/sampler/sampler.hh"
42161SN/A#include "sim/param.hh"
432190SN/A#include "sim/process.hh"
4456SN/A#include "sim/sim_events.hh"
452190SN/A#include "sim/system.hh"
462SN/A
471062SN/A#include "base/trace.hh"
481062SN/A
492190SN/A#if FULL_SYSTEM
502190SN/A#include "kern/kernel_stats.hh"
512190SN/A#endif
522190SN/A
532SN/Ausing namespace std;
542SN/A
552SN/Avector<BaseCPU *> BaseCPU::cpuList;
562SN/A
572SN/A// This variable reflects the max number of threads in any CPU.  Be
582SN/A// careful to only use it once all the CPUs that you care about have
592SN/A// been initialized
602SN/Aint maxThreadsPerCPU = 1;
612SN/A
621858SN/A#if FULL_SYSTEM
631400SN/ABaseCPU::BaseCPU(Params *p)
641695SN/A    : SimObject(p->name), clock(p->clock), checkInterrupts(true),
651400SN/A      params(p), number_of_threads(p->numberOfThreads), system(p->system)
662SN/A#else
671400SN/ABaseCPU::BaseCPU(Params *p)
681695SN/A    : SimObject(p->name), clock(p->clock), params(p),
692378SN/A      number_of_threads(p->numberOfThreads), system(p->system)
702SN/A#endif
712SN/A{
721062SN/A    DPRINTF(FullCPU, "BaseCPU: Creating object, mem address %#x.\n", this);
731062SN/A
742SN/A    // add self to global list of CPUs
752SN/A    cpuList.push_back(this);
762SN/A
771062SN/A    DPRINTF(FullCPU, "BaseCPU: CPU added to cpuList, mem address %#x.\n",
781062SN/A            this);
791062SN/A
802SN/A    if (number_of_threads > maxThreadsPerCPU)
812SN/A        maxThreadsPerCPU = number_of_threads;
822SN/A
832SN/A    // allocate per-thread instruction-based event queues
841354SN/A    comInstEventQueue = new EventQueue *[number_of_threads];
852SN/A    for (int i = 0; i < number_of_threads; ++i)
86503SN/A        comInstEventQueue[i] = new EventQueue("instruction-based event queue");
872SN/A
882SN/A    //
892SN/A    // set up instruction-count-based termination events, if any
902SN/A    //
911400SN/A    if (p->max_insts_any_thread != 0)
922SN/A        for (int i = 0; i < number_of_threads; ++i)
931400SN/A            new SimExitEvent(comInstEventQueue[i], p->max_insts_any_thread,
942SN/A                "a thread reached the max instruction count");
952SN/A
961400SN/A    if (p->max_insts_all_threads != 0) {
972SN/A        // allocate & initialize shared downcounter: each event will
982SN/A        // decrement this when triggered; simulation will terminate
992SN/A        // when counter reaches 0
1002SN/A        int *counter = new int;
1012SN/A        *counter = number_of_threads;
1022SN/A        for (int i = 0; i < number_of_threads; ++i)
103503SN/A            new CountedExitEvent(comInstEventQueue[i],
1042SN/A                "all threads reached the max instruction count",
1051400SN/A                p->max_insts_all_threads, *counter);
1062SN/A    }
1072SN/A
108124SN/A    // allocate per-thread load-based event queues
1091354SN/A    comLoadEventQueue = new EventQueue *[number_of_threads];
110124SN/A    for (int i = 0; i < number_of_threads; ++i)
111124SN/A        comLoadEventQueue[i] = new EventQueue("load-based event queue");
112124SN/A
113124SN/A    //
114124SN/A    // set up instruction-count-based termination events, if any
115124SN/A    //
1161400SN/A    if (p->max_loads_any_thread != 0)
117124SN/A        for (int i = 0; i < number_of_threads; ++i)
1181400SN/A            new SimExitEvent(comLoadEventQueue[i], p->max_loads_any_thread,
119124SN/A                "a thread reached the max load count");
120124SN/A
1211400SN/A    if (p->max_loads_all_threads != 0) {
122124SN/A        // allocate & initialize shared downcounter: each event will
123124SN/A        // decrement this when triggered; simulation will terminate
124124SN/A        // when counter reaches 0
125124SN/A        int *counter = new int;
126124SN/A        *counter = number_of_threads;
127124SN/A        for (int i = 0; i < number_of_threads; ++i)
128124SN/A            new CountedExitEvent(comLoadEventQueue[i],
129124SN/A                "all threads reached the max load count",
1301400SN/A                p->max_loads_all_threads, *counter);
131124SN/A    }
132124SN/A
1331858SN/A#if FULL_SYSTEM
1342SN/A    memset(interrupts, 0, sizeof(interrupts));
1352SN/A    intstatus = 0;
1362SN/A#endif
1371191SN/A
1381191SN/A    functionTracingEnabled = false;
1391400SN/A    if (p->functionTrace) {
1401388SN/A        functionTraceStream = simout.find(csprintf("ftrace.%s", name()));
1411191SN/A        currentFunctionStart = currentFunctionEnd = 0;
1421400SN/A        functionEntryTick = p->functionTraceStart;
1431191SN/A
1441400SN/A        if (p->functionTraceStart == 0) {
1451191SN/A            functionTracingEnabled = true;
1461191SN/A        } else {
1471191SN/A            Event *e =
1481191SN/A                new EventWrapper<BaseCPU, &BaseCPU::enableFunctionTrace>(this,
1491191SN/A                                                                         true);
1501400SN/A            e->schedule(p->functionTraceStart);
1511191SN/A        }
1521191SN/A    }
1531917SN/A#if FULL_SYSTEM
1541917SN/A    profileEvent = NULL;
1551917SN/A    if (params->profile)
1561917SN/A        profileEvent = new ProfileEvent(this, params->profile);
1572190SN/A
1582190SN/A    kernelStats = new Kernel::Statistics(system);
1591917SN/A#endif
1602190SN/A
1612SN/A}
1622SN/A
1631917SN/ABaseCPU::Params::Params()
1641917SN/A{
1651917SN/A#if FULL_SYSTEM
1661917SN/A    profile = false;
1671917SN/A#endif
1681917SN/A}
1691191SN/A
1701191SN/Avoid
1711191SN/ABaseCPU::enableFunctionTrace()
1721191SN/A{
1731191SN/A    functionTracingEnabled = true;
1741191SN/A}
1751191SN/A
1761191SN/ABaseCPU::~BaseCPU()
1771191SN/A{
1782190SN/A#if FULL_SYSTEM
1792190SN/A    if (kernelStats)
1802190SN/A        delete kernelStats;
1812190SN/A#endif
1821191SN/A}
1831191SN/A
1841129SN/Avoid
1851129SN/ABaseCPU::init()
1861129SN/A{
1871400SN/A    if (!params->deferRegistration)
1881129SN/A        registerExecContexts();
1891129SN/A}
190180SN/A
1912SN/Avoid
1921917SN/ABaseCPU::startup()
1931917SN/A{
1941917SN/A#if FULL_SYSTEM
1951917SN/A    if (!params->deferRegistration && profileEvent)
1961917SN/A        profileEvent->schedule(curTick);
1971917SN/A#endif
1981917SN/A}
1991917SN/A
2001917SN/A
2011917SN/Avoid
2022SN/ABaseCPU::regStats()
2032SN/A{
204729SN/A    using namespace Stats;
205707SN/A
206707SN/A    numCycles
207707SN/A        .name(name() + ".numCycles")
208707SN/A        .desc("number of cpu cycles simulated")
209707SN/A        ;
210707SN/A
211180SN/A    int size = execContexts.size();
2122SN/A    if (size > 1) {
2132SN/A        for (int i = 0; i < size; ++i) {
2142SN/A            stringstream namestr;
2152SN/A            ccprintf(namestr, "%s.ctx%d", name(), i);
216180SN/A            execContexts[i]->regStats(namestr.str());
2172SN/A        }
2182SN/A    } else if (size == 1)
219180SN/A        execContexts[0]->regStats(name());
2202190SN/A
2212190SN/A#if FULL_SYSTEM
2222190SN/A    if (kernelStats)
2232190SN/A        kernelStats->regStats(name() + ".kern");
2242190SN/A#endif
2252SN/A}
2262SN/A
227180SN/A
228180SN/Avoid
229180SN/ABaseCPU::registerExecContexts()
230180SN/A{
231180SN/A    for (int i = 0; i < execContexts.size(); ++i) {
232180SN/A        ExecContext *xc = execContexts[i];
2332378SN/A
2341858SN/A#if FULL_SYSTEM
2351806SN/A        int id = params->cpu_id;
2361806SN/A        if (id != -1)
2371806SN/A            id += i;
238180SN/A
2392190SN/A        xc->setCpuId(system->registerExecContext(xc, id));
240180SN/A#else
2412190SN/A        xc->setCpuId(xc->getProcessPtr()->registerExecContext(xc));
242180SN/A#endif
243180SN/A    }
244180SN/A}
245180SN/A
246180SN/A
247180SN/Avoid
2481752SN/ABaseCPU::switchOut(Sampler *sampler)
249180SN/A{
2501545SN/A    panic("This CPU doesn't support sampling!");
251180SN/A}
252180SN/A
253180SN/Avoid
254180SN/ABaseCPU::takeOverFrom(BaseCPU *oldCPU)
255180SN/A{
256180SN/A    assert(execContexts.size() == oldCPU->execContexts.size());
257180SN/A
258180SN/A    for (int i = 0; i < execContexts.size(); ++i) {
259180SN/A        ExecContext *newXC = execContexts[i];
260180SN/A        ExecContext *oldXC = oldCPU->execContexts[i];
261180SN/A
262180SN/A        newXC->takeOverFrom(oldXC);
2632651Ssaidi@eecs.umich.edu
2642651Ssaidi@eecs.umich.edu        CpuEvent::replaceExecContext(oldXC, newXC);
2652651Ssaidi@eecs.umich.edu
2662190SN/A        assert(newXC->readCpuId() == oldXC->readCpuId());
2671858SN/A#if FULL_SYSTEM
2682190SN/A        system->replaceExecContext(newXC, newXC->readCpuId());
269180SN/A#else
2702190SN/A        assert(newXC->getProcessPtr() == oldXC->getProcessPtr());
2712190SN/A        newXC->getProcessPtr()->replaceExecContext(newXC, newXC->readCpuId());
272180SN/A#endif
273180SN/A    }
274605SN/A
2751858SN/A#if FULL_SYSTEM
2762107SN/A    for (int i = 0; i < TheISA::NumInterruptLevels; ++i)
277605SN/A        interrupts[i] = oldCPU->interrupts[i];
278605SN/A    intstatus = oldCPU->intstatus;
2792254SN/A
2801917SN/A    for (int i = 0; i < execContexts.size(); ++i)
2812254SN/A        execContexts[i]->profileClear();
2822254SN/A
2831917SN/A    if (profileEvent)
2841917SN/A        profileEvent->schedule(curTick);
285612SN/A#endif
286180SN/A}
287180SN/A
288180SN/A
2891858SN/A#if FULL_SYSTEM
2901917SN/ABaseCPU::ProfileEvent::ProfileEvent(BaseCPU *_cpu, int _interval)
2911917SN/A    : Event(&mainEventQueue), cpu(_cpu), interval(_interval)
2921917SN/A{ }
2931917SN/A
2941917SN/Avoid
2951917SN/ABaseCPU::ProfileEvent::process()
2961917SN/A{
2972254SN/A    for (int i = 0, size = cpu->execContexts.size(); i < size; ++i) {
2981917SN/A        ExecContext *xc = cpu->execContexts[i];
2992254SN/A        xc->profileSample();
3001917SN/A    }
3012254SN/A
3021917SN/A    schedule(curTick + interval);
3031917SN/A}
3041917SN/A
3052SN/Avoid
3062SN/ABaseCPU::post_interrupt(int int_num, int index)
3072SN/A{
3082SN/A    DPRINTF(Interrupt, "Interrupt %d:%d posted\n", int_num, index);
3092SN/A
3102107SN/A    if (int_num < 0 || int_num >= TheISA::NumInterruptLevels)
3112SN/A        panic("int_num out of bounds\n");
3122SN/A
313822SN/A    if (index < 0 || index >= sizeof(uint64_t) * 8)
3142SN/A        panic("int_num out of bounds\n");
3152SN/A
3161133SN/A    checkInterrupts = true;
3172SN/A    interrupts[int_num] |= 1 << index;
3182SN/A    intstatus |= (ULL(1) << int_num);
3192SN/A}
3202SN/A
3212SN/Avoid
3222SN/ABaseCPU::clear_interrupt(int int_num, int index)
3232SN/A{
3242SN/A    DPRINTF(Interrupt, "Interrupt %d:%d cleared\n", int_num, index);
3252SN/A
3262107SN/A    if (int_num < 0 || int_num >= TheISA::NumInterruptLevels)
3272SN/A        panic("int_num out of bounds\n");
3282SN/A
329822SN/A    if (index < 0 || index >= sizeof(uint64_t) * 8)
3302SN/A        panic("int_num out of bounds\n");
3312SN/A
3322SN/A    interrupts[int_num] &= ~(1 << index);
3332SN/A    if (interrupts[int_num] == 0)
3342SN/A        intstatus &= ~(ULL(1) << int_num);
3352SN/A}
3362SN/A
3372SN/Avoid
3382SN/ABaseCPU::clear_interrupts()
3392SN/A{
3402SN/A    DPRINTF(Interrupt, "Interrupts all cleared\n");
3412SN/A
3422SN/A    memset(interrupts, 0, sizeof(interrupts));
3432SN/A    intstatus = 0;
3442SN/A}
3452SN/A
346921SN/A
347921SN/Avoid
348921SN/ABaseCPU::serialize(std::ostream &os)
349921SN/A{
3502107SN/A    SERIALIZE_ARRAY(interrupts, TheISA::NumInterruptLevels);
351921SN/A    SERIALIZE_SCALAR(intstatus);
3522190SN/A
3532190SN/A#if FULL_SYSTEM
3542190SN/A    if (kernelStats)
3552190SN/A        kernelStats->serialize(os);
3562190SN/A#endif
3572190SN/A
358921SN/A}
359921SN/A
360921SN/Avoid
361921SN/ABaseCPU::unserialize(Checkpoint *cp, const std::string &section)
362921SN/A{
3632107SN/A    UNSERIALIZE_ARRAY(interrupts, TheISA::NumInterruptLevels);
364921SN/A    UNSERIALIZE_SCALAR(intstatus);
3652190SN/A
3662190SN/A#if FULL_SYSTEM
3672190SN/A    if (kernelStats)
3682190SN/A        kernelStats->unserialize(cp, section);
3692190SN/A#endif
370921SN/A}
371921SN/A
3722SN/A#endif // FULL_SYSTEM
3732SN/A
3741191SN/Avoid
3751191SN/ABaseCPU::traceFunctionsInternal(Addr pc)
3761191SN/A{
3771191SN/A    if (!debugSymbolTable)
3781191SN/A        return;
3791191SN/A
3801191SN/A    // if pc enters different function, print new function symbol and
3811191SN/A    // update saved range.  Otherwise do nothing.
3821191SN/A    if (pc < currentFunctionStart || pc >= currentFunctionEnd) {
3831191SN/A        string sym_str;
3841191SN/A        bool found = debugSymbolTable->findNearestSymbol(pc, sym_str,
3851191SN/A                                                         currentFunctionStart,
3861191SN/A                                                         currentFunctionEnd);
3871191SN/A
3881191SN/A        if (!found) {
3891191SN/A            // no symbol found: use addr as label
3901191SN/A            sym_str = csprintf("0x%x", pc);
3911191SN/A            currentFunctionStart = pc;
3921191SN/A            currentFunctionEnd = pc + 1;
3931191SN/A        }
3941191SN/A
3951191SN/A        ccprintf(*functionTraceStream, " (%d)\n%d: %s",
3961191SN/A                 curTick - functionEntryTick, curTick, sym_str);
3971191SN/A        functionEntryTick = curTick;
3981191SN/A    }
3991191SN/A}
4001191SN/A
4011191SN/A
4022SN/ADEFINE_SIM_OBJECT_CLASS_NAME("BaseCPU", BaseCPU)
403