base.cc revision 2644
12SN/A/*
21762SN/A * Copyright (c) 2002-2005 The Regents of The University of Michigan
32SN/A * All rights reserved.
42SN/A *
52SN/A * Redistribution and use in source and binary forms, with or without
62SN/A * modification, are permitted provided that the following conditions are
72SN/A * met: redistributions of source code must retain the above copyright
82SN/A * notice, this list of conditions and the following disclaimer;
92SN/A * redistributions in binary form must reproduce the above copyright
102SN/A * notice, this list of conditions and the following disclaimer in the
112SN/A * documentation and/or other materials provided with the distribution;
122SN/A * neither the name of the copyright holders nor the names of its
132SN/A * contributors may be used to endorse or promote products derived from
142SN/A * this software without specific prior written permission.
152SN/A *
162SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
172SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
182SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
192SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
202SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
222SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
232SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
242SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
252SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
262SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272SN/A */
282SN/A
291388SN/A#include <iostream>
302SN/A#include <string>
312SN/A#include <sstream>
322SN/A
331191SN/A#include "base/cprintf.hh"
341191SN/A#include "base/loader/symtab.hh"
351191SN/A#include "base/misc.hh"
361388SN/A#include "base/output.hh"
371717SN/A#include "cpu/base.hh"
3856SN/A#include "cpu/exec_context.hh"
391977SN/A#include "cpu/profile.hh"
401717SN/A#include "cpu/sampler/sampler.hh"
41161SN/A#include "sim/param.hh"
422190SN/A#include "sim/process.hh"
4356SN/A#include "sim/sim_events.hh"
442190SN/A#include "sim/system.hh"
452SN/A
461062SN/A#include "base/trace.hh"
471062SN/A
482190SN/A#if FULL_SYSTEM
492190SN/A#include "kern/kernel_stats.hh"
502190SN/A#endif
512190SN/A
522SN/Ausing namespace std;
532SN/A
542SN/Avector<BaseCPU *> BaseCPU::cpuList;
552SN/A
562SN/A// This variable reflects the max number of threads in any CPU.  Be
572SN/A// careful to only use it once all the CPUs that you care about have
582SN/A// been initialized
592SN/Aint maxThreadsPerCPU = 1;
602SN/A
611858SN/A#if FULL_SYSTEM
621400SN/ABaseCPU::BaseCPU(Params *p)
631695SN/A    : SimObject(p->name), clock(p->clock), checkInterrupts(true),
641400SN/A      params(p), number_of_threads(p->numberOfThreads), system(p->system)
652SN/A#else
661400SN/ABaseCPU::BaseCPU(Params *p)
671695SN/A    : SimObject(p->name), clock(p->clock), params(p),
682378SN/A      number_of_threads(p->numberOfThreads), system(p->system)
692SN/A#endif
702SN/A{
711062SN/A    DPRINTF(FullCPU, "BaseCPU: Creating object, mem address %#x.\n", this);
721062SN/A
732SN/A    // add self to global list of CPUs
742SN/A    cpuList.push_back(this);
752SN/A
761062SN/A    DPRINTF(FullCPU, "BaseCPU: CPU added to cpuList, mem address %#x.\n",
771062SN/A            this);
781062SN/A
792SN/A    if (number_of_threads > maxThreadsPerCPU)
802SN/A        maxThreadsPerCPU = number_of_threads;
812SN/A
822SN/A    // allocate per-thread instruction-based event queues
831354SN/A    comInstEventQueue = new EventQueue *[number_of_threads];
842SN/A    for (int i = 0; i < number_of_threads; ++i)
85503SN/A        comInstEventQueue[i] = new EventQueue("instruction-based event queue");
862SN/A
872SN/A    //
882SN/A    // set up instruction-count-based termination events, if any
892SN/A    //
901400SN/A    if (p->max_insts_any_thread != 0)
912SN/A        for (int i = 0; i < number_of_threads; ++i)
921400SN/A            new SimExitEvent(comInstEventQueue[i], p->max_insts_any_thread,
932SN/A                "a thread reached the max instruction count");
942SN/A
951400SN/A    if (p->max_insts_all_threads != 0) {
962SN/A        // allocate & initialize shared downcounter: each event will
972SN/A        // decrement this when triggered; simulation will terminate
982SN/A        // when counter reaches 0
992SN/A        int *counter = new int;
1002SN/A        *counter = number_of_threads;
1012SN/A        for (int i = 0; i < number_of_threads; ++i)
102503SN/A            new CountedExitEvent(comInstEventQueue[i],
1032SN/A                "all threads reached the max instruction count",
1041400SN/A                p->max_insts_all_threads, *counter);
1052SN/A    }
1062SN/A
107124SN/A    // allocate per-thread load-based event queues
1081354SN/A    comLoadEventQueue = new EventQueue *[number_of_threads];
109124SN/A    for (int i = 0; i < number_of_threads; ++i)
110124SN/A        comLoadEventQueue[i] = new EventQueue("load-based event queue");
111124SN/A
112124SN/A    //
113124SN/A    // set up instruction-count-based termination events, if any
114124SN/A    //
1151400SN/A    if (p->max_loads_any_thread != 0)
116124SN/A        for (int i = 0; i < number_of_threads; ++i)
1171400SN/A            new SimExitEvent(comLoadEventQueue[i], p->max_loads_any_thread,
118124SN/A                "a thread reached the max load count");
119124SN/A
1201400SN/A    if (p->max_loads_all_threads != 0) {
121124SN/A        // allocate & initialize shared downcounter: each event will
122124SN/A        // decrement this when triggered; simulation will terminate
123124SN/A        // when counter reaches 0
124124SN/A        int *counter = new int;
125124SN/A        *counter = number_of_threads;
126124SN/A        for (int i = 0; i < number_of_threads; ++i)
127124SN/A            new CountedExitEvent(comLoadEventQueue[i],
128124SN/A                "all threads reached the max load count",
1291400SN/A                p->max_loads_all_threads, *counter);
130124SN/A    }
131124SN/A
1321858SN/A#if FULL_SYSTEM
1332SN/A    memset(interrupts, 0, sizeof(interrupts));
1342SN/A    intstatus = 0;
1352SN/A#endif
1361191SN/A
1371191SN/A    functionTracingEnabled = false;
1381400SN/A    if (p->functionTrace) {
1391388SN/A        functionTraceStream = simout.find(csprintf("ftrace.%s", name()));
1401191SN/A        currentFunctionStart = currentFunctionEnd = 0;
1411400SN/A        functionEntryTick = p->functionTraceStart;
1421191SN/A
1431400SN/A        if (p->functionTraceStart == 0) {
1441191SN/A            functionTracingEnabled = true;
1451191SN/A        } else {
1461191SN/A            Event *e =
1471191SN/A                new EventWrapper<BaseCPU, &BaseCPU::enableFunctionTrace>(this,
1481191SN/A                                                                         true);
1491400SN/A            e->schedule(p->functionTraceStart);
1501191SN/A        }
1511191SN/A    }
1521917SN/A#if FULL_SYSTEM
1531917SN/A    profileEvent = NULL;
1541917SN/A    if (params->profile)
1551917SN/A        profileEvent = new ProfileEvent(this, params->profile);
1562190SN/A
1572190SN/A    kernelStats = new Kernel::Statistics(system);
1581917SN/A#endif
1592190SN/A
1602SN/A}
1612SN/A
1621917SN/ABaseCPU::Params::Params()
1631917SN/A{
1641917SN/A#if FULL_SYSTEM
1651917SN/A    profile = false;
1661917SN/A#endif
1671917SN/A}
1681191SN/A
1691191SN/Avoid
1701191SN/ABaseCPU::enableFunctionTrace()
1711191SN/A{
1721191SN/A    functionTracingEnabled = true;
1731191SN/A}
1741191SN/A
1751191SN/ABaseCPU::~BaseCPU()
1761191SN/A{
1772190SN/A#if FULL_SYSTEM
1782190SN/A    if (kernelStats)
1792190SN/A        delete kernelStats;
1802190SN/A#endif
1811191SN/A}
1821191SN/A
1831129SN/Avoid
1841129SN/ABaseCPU::init()
1851129SN/A{
1861400SN/A    if (!params->deferRegistration)
1871129SN/A        registerExecContexts();
1881129SN/A}
189180SN/A
1902SN/Avoid
1911917SN/ABaseCPU::startup()
1921917SN/A{
1931917SN/A#if FULL_SYSTEM
1941917SN/A    if (!params->deferRegistration && profileEvent)
1951917SN/A        profileEvent->schedule(curTick);
1961917SN/A#endif
1971917SN/A}
1981917SN/A
1991917SN/A
2001917SN/Avoid
2012SN/ABaseCPU::regStats()
2022SN/A{
203729SN/A    using namespace Stats;
204707SN/A
205707SN/A    numCycles
206707SN/A        .name(name() + ".numCycles")
207707SN/A        .desc("number of cpu cycles simulated")
208707SN/A        ;
209707SN/A
210180SN/A    int size = execContexts.size();
2112SN/A    if (size > 1) {
2122SN/A        for (int i = 0; i < size; ++i) {
2132SN/A            stringstream namestr;
2142SN/A            ccprintf(namestr, "%s.ctx%d", name(), i);
215180SN/A            execContexts[i]->regStats(namestr.str());
2162SN/A        }
2172SN/A    } else if (size == 1)
218180SN/A        execContexts[0]->regStats(name());
2192190SN/A
2202190SN/A#if FULL_SYSTEM
2212190SN/A    if (kernelStats)
2222190SN/A        kernelStats->regStats(name() + ".kern");
2232190SN/A#endif
2242SN/A}
2252SN/A
226180SN/A
227180SN/Avoid
228180SN/ABaseCPU::registerExecContexts()
229180SN/A{
230180SN/A    for (int i = 0; i < execContexts.size(); ++i) {
231180SN/A        ExecContext *xc = execContexts[i];
2322378SN/A
2331858SN/A#if FULL_SYSTEM
2341806SN/A        int id = params->cpu_id;
2351806SN/A        if (id != -1)
2361806SN/A            id += i;
237180SN/A
2382190SN/A        xc->setCpuId(system->registerExecContext(xc, id));
239180SN/A#else
2402190SN/A        xc->setCpuId(xc->getProcessPtr()->registerExecContext(xc));
241180SN/A#endif
242180SN/A    }
243180SN/A}
244180SN/A
245180SN/A
246180SN/Avoid
2471752SN/ABaseCPU::switchOut(Sampler *sampler)
248180SN/A{
2491545SN/A    panic("This CPU doesn't support sampling!");
250180SN/A}
251180SN/A
252180SN/Avoid
253180SN/ABaseCPU::takeOverFrom(BaseCPU *oldCPU)
254180SN/A{
255180SN/A    assert(execContexts.size() == oldCPU->execContexts.size());
256180SN/A
257180SN/A    for (int i = 0; i < execContexts.size(); ++i) {
258180SN/A        ExecContext *newXC = execContexts[i];
259180SN/A        ExecContext *oldXC = oldCPU->execContexts[i];
260180SN/A
261180SN/A        newXC->takeOverFrom(oldXC);
2622190SN/A        assert(newXC->readCpuId() == oldXC->readCpuId());
2631858SN/A#if FULL_SYSTEM
2642190SN/A        system->replaceExecContext(newXC, newXC->readCpuId());
265180SN/A#else
2662190SN/A        assert(newXC->getProcessPtr() == oldXC->getProcessPtr());
2672190SN/A        newXC->getProcessPtr()->replaceExecContext(newXC, newXC->readCpuId());
268180SN/A#endif
269180SN/A    }
270605SN/A
2711858SN/A#if FULL_SYSTEM
2722107SN/A    for (int i = 0; i < TheISA::NumInterruptLevels; ++i)
273605SN/A        interrupts[i] = oldCPU->interrupts[i];
274605SN/A    intstatus = oldCPU->intstatus;
2752254SN/A
2761917SN/A    for (int i = 0; i < execContexts.size(); ++i)
2772254SN/A        execContexts[i]->profileClear();
2782254SN/A
2791917SN/A    if (profileEvent)
2801917SN/A        profileEvent->schedule(curTick);
281612SN/A#endif
282180SN/A}
283180SN/A
284180SN/A
2851858SN/A#if FULL_SYSTEM
2861917SN/ABaseCPU::ProfileEvent::ProfileEvent(BaseCPU *_cpu, int _interval)
2871917SN/A    : Event(&mainEventQueue), cpu(_cpu), interval(_interval)
2881917SN/A{ }
2891917SN/A
2901917SN/Avoid
2911917SN/ABaseCPU::ProfileEvent::process()
2921917SN/A{
2932254SN/A    for (int i = 0, size = cpu->execContexts.size(); i < size; ++i) {
2941917SN/A        ExecContext *xc = cpu->execContexts[i];
2952254SN/A        xc->profileSample();
2961917SN/A    }
2972254SN/A
2981917SN/A    schedule(curTick + interval);
2991917SN/A}
3001917SN/A
3012SN/Avoid
3022SN/ABaseCPU::post_interrupt(int int_num, int index)
3032SN/A{
3042SN/A    DPRINTF(Interrupt, "Interrupt %d:%d posted\n", int_num, index);
3052SN/A
3062107SN/A    if (int_num < 0 || int_num >= TheISA::NumInterruptLevels)
3072SN/A        panic("int_num out of bounds\n");
3082SN/A
309822SN/A    if (index < 0 || index >= sizeof(uint64_t) * 8)
3102SN/A        panic("int_num out of bounds\n");
3112SN/A
3121133SN/A    checkInterrupts = true;
3132SN/A    interrupts[int_num] |= 1 << index;
3142SN/A    intstatus |= (ULL(1) << int_num);
3152SN/A}
3162SN/A
3172SN/Avoid
3182SN/ABaseCPU::clear_interrupt(int int_num, int index)
3192SN/A{
3202SN/A    DPRINTF(Interrupt, "Interrupt %d:%d cleared\n", int_num, index);
3212SN/A
3222107SN/A    if (int_num < 0 || int_num >= TheISA::NumInterruptLevels)
3232SN/A        panic("int_num out of bounds\n");
3242SN/A
325822SN/A    if (index < 0 || index >= sizeof(uint64_t) * 8)
3262SN/A        panic("int_num out of bounds\n");
3272SN/A
3282SN/A    interrupts[int_num] &= ~(1 << index);
3292SN/A    if (interrupts[int_num] == 0)
3302SN/A        intstatus &= ~(ULL(1) << int_num);
3312SN/A}
3322SN/A
3332SN/Avoid
3342SN/ABaseCPU::clear_interrupts()
3352SN/A{
3362SN/A    DPRINTF(Interrupt, "Interrupts all cleared\n");
3372SN/A
3382SN/A    memset(interrupts, 0, sizeof(interrupts));
3392SN/A    intstatus = 0;
3402SN/A}
3412SN/A
342921SN/A
343921SN/Avoid
344921SN/ABaseCPU::serialize(std::ostream &os)
345921SN/A{
3462107SN/A    SERIALIZE_ARRAY(interrupts, TheISA::NumInterruptLevels);
347921SN/A    SERIALIZE_SCALAR(intstatus);
3482190SN/A
3492190SN/A#if FULL_SYSTEM
3502190SN/A    if (kernelStats)
3512190SN/A        kernelStats->serialize(os);
3522190SN/A#endif
3532190SN/A
354921SN/A}
355921SN/A
356921SN/Avoid
357921SN/ABaseCPU::unserialize(Checkpoint *cp, const std::string &section)
358921SN/A{
3592107SN/A    UNSERIALIZE_ARRAY(interrupts, TheISA::NumInterruptLevels);
360921SN/A    UNSERIALIZE_SCALAR(intstatus);
3612190SN/A
3622190SN/A#if FULL_SYSTEM
3632190SN/A    if (kernelStats)
3642190SN/A        kernelStats->unserialize(cp, section);
3652190SN/A#endif
366921SN/A}
367921SN/A
3682SN/A#endif // FULL_SYSTEM
3692SN/A
3701191SN/Avoid
3711191SN/ABaseCPU::traceFunctionsInternal(Addr pc)
3721191SN/A{
3731191SN/A    if (!debugSymbolTable)
3741191SN/A        return;
3751191SN/A
3761191SN/A    // if pc enters different function, print new function symbol and
3771191SN/A    // update saved range.  Otherwise do nothing.
3781191SN/A    if (pc < currentFunctionStart || pc >= currentFunctionEnd) {
3791191SN/A        string sym_str;
3801191SN/A        bool found = debugSymbolTable->findNearestSymbol(pc, sym_str,
3811191SN/A                                                         currentFunctionStart,
3821191SN/A                                                         currentFunctionEnd);
3831191SN/A
3841191SN/A        if (!found) {
3851191SN/A            // no symbol found: use addr as label
3861191SN/A            sym_str = csprintf("0x%x", pc);
3871191SN/A            currentFunctionStart = pc;
3881191SN/A            currentFunctionEnd = pc + 1;
3891191SN/A        }
3901191SN/A
3911191SN/A        ccprintf(*functionTraceStream, " (%d)\n%d: %s",
3921191SN/A                 curTick - functionEntryTick, curTick, sym_str);
3931191SN/A        functionEntryTick = curTick;
3941191SN/A    }
3951191SN/A}
3961191SN/A
3971191SN/A
3982SN/ADEFINE_SIM_OBJECT_CLASS_NAME("BaseCPU", BaseCPU)
399