base.cc revision 2205 
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <iostream>
30#include <string>
31#include <sstream>
32
33#include "base/cprintf.hh"
34#include "base/loader/symtab.hh"
35#include "base/misc.hh"
36#include "base/output.hh"
37#include "cpu/base.hh"
38#include "cpu/exec_context.hh"
39#include "cpu/profile.hh"
40#include "cpu/sampler/sampler.hh"
41#include "sim/param.hh"
42#include "sim/sim_events.hh"
43
44#include "base/trace.hh"
45
46using namespace std;
47
48vector<BaseCPU *> BaseCPU::cpuList;
49
50// This variable reflects the max number of threads in any CPU.  Be
51// careful to only use it once all the CPUs that you care about have
52// been initialized
53int maxThreadsPerCPU = 1;
54
55#if FULL_SYSTEM
56BaseCPU::BaseCPU(Params *p)
57    : SimObject(p->name), clock(p->clock), checkInterrupts(true),
58      params(p), number_of_threads(p->numberOfThreads), system(p->system)
59#else
60BaseCPU::BaseCPU(Params *p)
61    : SimObject(p->name), clock(p->clock), params(p),
62      number_of_threads(p->numberOfThreads)
63#endif
64{
65    DPRINTF(FullCPU, "BaseCPU: Creating object, mem address %#x.\n", this);
66
67    // add self to global list of CPUs
68    cpuList.push_back(this);
69
70    DPRINTF(FullCPU, "BaseCPU: CPU added to cpuList, mem address %#x.\n",
71            this);
72
73    if (number_of_threads > maxThreadsPerCPU)
74        maxThreadsPerCPU = number_of_threads;
75
76    // allocate per-thread instruction-based event queues
77    comInstEventQueue = new EventQueue *[number_of_threads];
78    for (int i = 0; i < number_of_threads; ++i)
79        comInstEventQueue[i] = new EventQueue("instruction-based event queue");
80
81    //
82    // set up instruction-count-based termination events, if any
83    //
84    if (p->max_insts_any_thread != 0)
85        for (int i = 0; i < number_of_threads; ++i)
86            new SimExitEvent(comInstEventQueue[i], p->max_insts_any_thread,
87                "a thread reached the max instruction count");
88
89    if (p->max_insts_all_threads != 0) {
90        // allocate & initialize shared downcounter: each event will
91        // decrement this when triggered; simulation will terminate
92        // when counter reaches 0
93        int *counter = new int;
94        *counter = number_of_threads;
95        for (int i = 0; i < number_of_threads; ++i)
96            new CountedExitEvent(comInstEventQueue[i],
97                "all threads reached the max instruction count",
98                p->max_insts_all_threads, *counter);
99    }
100
101    // allocate per-thread load-based event queues
102    comLoadEventQueue = new EventQueue *[number_of_threads];
103    for (int i = 0; i < number_of_threads; ++i)
104        comLoadEventQueue[i] = new EventQueue("load-based event queue");
105
106    //
107    // set up instruction-count-based termination events, if any
108    //
109    if (p->max_loads_any_thread != 0)
110        for (int i = 0; i < number_of_threads; ++i)
111            new SimExitEvent(comLoadEventQueue[i], p->max_loads_any_thread,
112                "a thread reached the max load count");
113
114    if (p->max_loads_all_threads != 0) {
115        // allocate & initialize shared downcounter: each event will
116        // decrement this when triggered; simulation will terminate
117        // when counter reaches 0
118        int *counter = new int;
119        *counter = number_of_threads;
120        for (int i = 0; i < number_of_threads; ++i)
121            new CountedExitEvent(comLoadEventQueue[i],
122                "all threads reached the max load count",
123                p->max_loads_all_threads, *counter);
124    }
125
126#if FULL_SYSTEM
127    memset(interrupts, 0, sizeof(interrupts));
128    intstatus = 0;
129#endif
130
131    functionTracingEnabled = false;
132    if (p->functionTrace) {
133        functionTraceStream = simout.find(csprintf("ftrace.%s", name()));
134        currentFunctionStart = currentFunctionEnd = 0;
135        functionEntryTick = p->functionTraceStart;
136
137        if (p->functionTraceStart == 0) {
138            functionTracingEnabled = true;
139        } else {
140            Event *e =
141                new EventWrapper<BaseCPU, &BaseCPU::enableFunctionTrace>(this,
142                                                                         true);
143            e->schedule(p->functionTraceStart);
144        }
145    }
146#if FULL_SYSTEM
147    profileEvent = NULL;
148    if (params->profile)
149        profileEvent = new ProfileEvent(this, params->profile);
150#endif
151}
152
153BaseCPU::Params::Params()
154{
155#if FULL_SYSTEM
156    profile = false;
157#endif
158}
159
160void
161BaseCPU::enableFunctionTrace()
162{
163    functionTracingEnabled = true;
164}
165
166BaseCPU::~BaseCPU()
167{
168}
169
170void
171BaseCPU::init()
172{
173    if (!params->deferRegistration)
174        registerExecContexts();
175}
176
177void
178BaseCPU::startup()
179{
180#if FULL_SYSTEM
181    if (!params->deferRegistration && profileEvent)
182        profileEvent->schedule(curTick);
183#endif
184}
185
186
187void
188BaseCPU::regStats()
189{
190    using namespace Stats;
191
192    numCycles
193        .name(name() + ".numCycles")
194        .desc("number of cpu cycles simulated")
195        ;
196
197    int size = execContexts.size();
198    if (size > 1) {
199        for (int i = 0; i < size; ++i) {
200            stringstream namestr;
201            ccprintf(namestr, "%s.ctx%d", name(), i);
202            execContexts[i]->regStats(namestr.str());
203        }
204    } else if (size == 1)
205        execContexts[0]->regStats(name());
206}
207
208
209void
210BaseCPU::registerExecContexts()
211{
212    for (int i = 0; i < execContexts.size(); ++i) {
213        ExecContext *xc = execContexts[i];
214#if FULL_SYSTEM
215        int id = params->cpu_id;
216        if (id != -1)
217            id += i;
218
219        xc->cpu_id = system->registerExecContext(xc, id);
220#else
221        xc->cpu_id = xc->process->registerExecContext(xc);
222#endif
223    }
224}
225
226
227void
228BaseCPU::switchOut(Sampler *sampler)
229{
230    panic("This CPU doesn't support sampling!");
231}
232
233void
234BaseCPU::takeOverFrom(BaseCPU *oldCPU)
235{
236    assert(execContexts.size() == oldCPU->execContexts.size());
237
238    for (int i = 0; i < execContexts.size(); ++i) {
239        ExecContext *newXC = execContexts[i];
240        ExecContext *oldXC = oldCPU->execContexts[i];
241
242        newXC->takeOverFrom(oldXC);
243        assert(newXC->cpu_id == oldXC->cpu_id);
244#if FULL_SYSTEM
245        system->replaceExecContext(newXC, newXC->cpu_id);
246#else
247        assert(newXC->process == oldXC->process);
248        newXC->process->replaceExecContext(newXC, newXC->cpu_id);
249#endif
250    }
251
252#if FULL_SYSTEM
253    for (int i = 0; i < TheISA::NumInterruptLevels; ++i)
254        interrupts[i] = oldCPU->interrupts[i];
255    intstatus = oldCPU->intstatus;
256
257    for (int i = 0; i < execContexts.size(); ++i)
258        if (execContexts[i]->profile)
259            execContexts[i]->profile->clear();
260
261    if (profileEvent)
262        profileEvent->schedule(curTick);
263#endif
264}
265
266
267#if FULL_SYSTEM
268BaseCPU::ProfileEvent::ProfileEvent(BaseCPU *_cpu, int _interval)
269    : Event(&mainEventQueue), cpu(_cpu), interval(_interval)
270{ }
271
272void
273BaseCPU::ProfileEvent::process()
274{
275    for (int i = 0, size = cpu->execContexts.size(); i < size; ++i) {
276        ExecContext *xc = cpu->execContexts[i];
277        xc->profile->sample(xc->profileNode, xc->profilePC);
278    }
279
280    schedule(curTick + interval);
281}
282
283void
284BaseCPU::post_interrupt(int int_num, int index)
285{
286    DPRINTF(Interrupt, "Interrupt %d:%d posted\n", int_num, index);
287
288    if (int_num < 0 || int_num >= TheISA::NumInterruptLevels)
289        panic("int_num out of bounds\n");
290
291    if (index < 0 || index >= sizeof(uint64_t) * 8)
292        panic("int_num out of bounds\n");
293
294    checkInterrupts = true;
295    interrupts[int_num] |= 1 << index;
296    intstatus |= (ULL(1) << int_num);
297}
298
299void
300BaseCPU::clear_interrupt(int int_num, int index)
301{
302    DPRINTF(Interrupt, "Interrupt %d:%d cleared\n", int_num, index);
303
304    if (int_num < 0 || int_num >= TheISA::NumInterruptLevels)
305        panic("int_num out of bounds\n");
306
307    if (index < 0 || index >= sizeof(uint64_t) * 8)
308        panic("int_num out of bounds\n");
309
310    interrupts[int_num] &= ~(1 << index);
311    if (interrupts[int_num] == 0)
312        intstatus &= ~(ULL(1) << int_num);
313}
314
315void
316BaseCPU::clear_interrupts()
317{
318    DPRINTF(Interrupt, "Interrupts all cleared\n");
319
320    memset(interrupts, 0, sizeof(interrupts));
321    intstatus = 0;
322}
323
324
325void
326BaseCPU::serialize(std::ostream &os)
327{
328    SERIALIZE_ARRAY(interrupts, TheISA::NumInterruptLevels);
329    SERIALIZE_SCALAR(intstatus);
330}
331
332void
333BaseCPU::unserialize(Checkpoint *cp, const std::string &section)
334{
335    UNSERIALIZE_ARRAY(interrupts, TheISA::NumInterruptLevels);
336    UNSERIALIZE_SCALAR(intstatus);
337}
338
339#endif // FULL_SYSTEM
340
341void
342BaseCPU::traceFunctionsInternal(Addr pc)
343{
344    if (!debugSymbolTable)
345        return;
346
347    // if pc enters different function, print new function symbol and
348    // update saved range.  Otherwise do nothing.
349    if (pc < currentFunctionStart || pc >= currentFunctionEnd) {
350        string sym_str;
351        bool found = debugSymbolTable->findNearestSymbol(pc, sym_str,
352                                                         currentFunctionStart,
353                                                         currentFunctionEnd);
354
355        if (!found) {
356            // no symbol found: use addr as label
357            sym_str = csprintf("0x%x", pc);
358            currentFunctionStart = pc;
359            currentFunctionEnd = pc + 1;
360        }
361
362        ccprintf(*functionTraceStream, " (%d)\n%d: %s",
363                 curTick - functionEntryTick, curTick, sym_str);
364        functionEntryTick = curTick;
365    }
366}
367
368
369DEFINE_SIM_OBJECT_CLASS_NAME("BaseCPU", BaseCPU)
370