SConscript revision 2788:73f724ff348f
16313Sgblack@eecs.umich.edu# -*- mode:python -*-
212529Sgiacomo.travaglini@arm.com
37093Sgblack@eecs.umich.edu# Copyright (c) 2006 The Regents of The University of Michigan
47093Sgblack@eecs.umich.edu# All rights reserved.
57093Sgblack@eecs.umich.edu#
67093Sgblack@eecs.umich.edu# Redistribution and use in source and binary forms, with or without
77093Sgblack@eecs.umich.edu# modification, are permitted provided that the following conditions are
87093Sgblack@eecs.umich.edu# met: redistributions of source code must retain the above copyright
97093Sgblack@eecs.umich.edu# notice, this list of conditions and the following disclaimer;
107093Sgblack@eecs.umich.edu# redistributions in binary form must reproduce the above copyright
117093Sgblack@eecs.umich.edu# notice, this list of conditions and the following disclaimer in the
127093Sgblack@eecs.umich.edu# documentation and/or other materials provided with the distribution;
137093Sgblack@eecs.umich.edu# neither the name of the copyright holders nor the names of its
146313Sgblack@eecs.umich.edu# contributors may be used to endorse or promote products derived from
156313Sgblack@eecs.umich.edu# this software without specific prior written permission.
166313Sgblack@eecs.umich.edu#
176313Sgblack@eecs.umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
186313Sgblack@eecs.umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
196313Sgblack@eecs.umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
206313Sgblack@eecs.umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
216313Sgblack@eecs.umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
226313Sgblack@eecs.umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
236313Sgblack@eecs.umich.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
246313Sgblack@eecs.umich.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
256313Sgblack@eecs.umich.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
266313Sgblack@eecs.umich.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
276313Sgblack@eecs.umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
286313Sgblack@eecs.umich.edu#
296313Sgblack@eecs.umich.edu# Authors: Steve Reinhardt
306313Sgblack@eecs.umich.edu
316313Sgblack@eecs.umich.eduimport os
326313Sgblack@eecs.umich.eduimport os.path
336313Sgblack@eecs.umich.edu
346313Sgblack@eecs.umich.edu# Import build environment variable from SConstruct.
356313Sgblack@eecs.umich.eduImport('env')
366313Sgblack@eecs.umich.edu
376313Sgblack@eecs.umich.edu#################################################################
386313Sgblack@eecs.umich.edu#
396313Sgblack@eecs.umich.edu# Generate StaticInst execute() method signatures.
406313Sgblack@eecs.umich.edu#
416313Sgblack@eecs.umich.edu# There must be one signature for each CPU model compiled in.
426313Sgblack@eecs.umich.edu# Since the set of compiled-in models is flexible, we generate a
436313Sgblack@eecs.umich.edu# header containing the appropriate set of signatures on the fly.
447404SAli.Saidi@ARM.com#
456313Sgblack@eecs.umich.edu#################################################################
4610461SAndreas.Sandberg@ARM.com
4712479SCurtis.Dunham@arm.com# CPU model-specific data is contained in cpu_models.py
486333Sgblack@eecs.umich.edu# Convert to SCons File node to get path handling
4910037SARM gem5 Developersmodels_db = File('cpu_models.py')
507404SAli.Saidi@ARM.com# slurp in contents of file
516313Sgblack@eecs.umich.eduexecfile(models_db.srcnode().abspath)
5212109SRekai.GonzalezAlberquilla@arm.com
538232Snate@binkert.org# Template for execute() signature.
5412109SRekai.GonzalezAlberquilla@arm.comexec_sig_template = '''
559384SAndreas.Sandberg@arm.comvirtual Fault execute(%s *xc, Trace::InstRecord *traceData) const = 0;
5611165SRekai.GonzalezAlberquilla@arm.comvirtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const
576313Sgblack@eecs.umich.edu{ panic("initiateAcc not defined!"); };
589384SAndreas.Sandberg@arm.comvirtual Fault completeAcc(Packet *pkt, %s *xc,
5910461SAndreas.Sandberg@ARM.com                          Trace::InstRecord *traceData) const
606333Sgblack@eecs.umich.edu{ panic("completeAcc not defined!"); };
616313Sgblack@eecs.umich.edu'''
626313Sgblack@eecs.umich.edu
636313Sgblack@eecs.umich.edumem_ini_sig_template = '''
646313Sgblack@eecs.umich.eduvirtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); };
656313Sgblack@eecs.umich.edu'''
669384SAndreas.Sandberg@arm.com
676313Sgblack@eecs.umich.edumem_comp_sig_template = '''
686313Sgblack@eecs.umich.eduvirtual Fault completeAcc(uint8_t *data, %s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); return NoFault; };
6910037SARM gem5 Developers'''
7010037SARM gem5 Developers
7110037SARM gem5 Developers# Generate a temporary CPU list, including the CheckerCPU if
7211165SRekai.GonzalezAlberquilla@arm.com# it's enabled.  This isn't used for anything else other than StaticInst
7311165SRekai.GonzalezAlberquilla@arm.com# headers.
7412109SRekai.GonzalezAlberquilla@arm.comtemp_cpu_list = env['CPU_MODELS']
7511165SRekai.GonzalezAlberquilla@arm.comif env['USE_CHECKER']:
7610461SAndreas.Sandberg@ARM.com    temp_cpu_list.append('CheckerCPU')
7710461SAndreas.Sandberg@ARM.com
7810461SAndreas.Sandberg@ARM.com# Generate header.  
7910461SAndreas.Sandberg@ARM.comdef gen_cpu_exec_signatures(target, source, env):
8010461SAndreas.Sandberg@ARM.com    f = open(str(target[0]), 'w')
8110461SAndreas.Sandberg@ARM.com    print >> f, '''
8210844Sandreas.sandberg@arm.com#ifndef __CPU_STATIC_INST_EXEC_SIGS_HH__
8310844Sandreas.sandberg@arm.com#define __CPU_STATIC_INST_EXEC_SIGS_HH__
8410844Sandreas.sandberg@arm.com'''
8513531Sjairo.balart@metempsy.com    for cpu in temp_cpu_list:
8613531Sjairo.balart@metempsy.com        xc_type = CpuModel.dict[cpu].strings['CPU_exec_context']
8713531Sjairo.balart@metempsy.com        print >> f, exec_sig_template % (xc_type, xc_type, xc_type)
8810037SARM gem5 Developers    print >> f, '''
8911771SCurtis.Dunham@arm.com#endif  // __CPU_STATIC_INST_EXEC_SIGS_HH__
9010037SARM gem5 Developers'''
9110037SARM gem5 Developers
9210037SARM gem5 Developers# Generate string that gets printed when header is rebuilt
9313173Sgiacomo.travaglini@arm.comdef gen_sigs_string(target, source, env):
9410037SARM gem5 Developers    return "Generating static_inst_exec_sigs.hh: " \
9513531Sjairo.balart@metempsy.com           + ', '.join(temp_cpu_list)
9613114Sgiacomo.travaglini@arm.com
9710037SARM gem5 Developers# Add command to generate header to environment.
9812714Sgiacomo.travaglini@arm.comenv.Command('static_inst_exec_sigs.hh', models_db,
9912714Sgiacomo.travaglini@arm.com            Action(gen_cpu_exec_signatures, gen_sigs_string,
10012714Sgiacomo.travaglini@arm.com                   varlist = temp_cpu_list))
10112714Sgiacomo.travaglini@arm.com
10212714Sgiacomo.travaglini@arm.comenv.Depends('static_inst_exec_sigs.hh', Value(env['USE_CHECKER']))
10312714Sgiacomo.travaglini@arm.comenv.Depends('static_inst_exec_sigs.hh', Value(env['CPU_MODELS']))
10412478SCurtis.Dunham@arm.com
10510037SARM gem5 Developers# List of suppported CPUs by the Checker.  Errors out if USE_CHECKER=True
10612477SCurtis.Dunham@arm.com# and one of these are not being used.
10712477SCurtis.Dunham@arm.comCheckerSupportedCPUList = ['AlphaO3CPU', 'OzoneCPU']
10812478SCurtis.Dunham@arm.com
10912478SCurtis.Dunham@arm.com#################################################################
11012478SCurtis.Dunham@arm.com#
11112478SCurtis.Dunham@arm.com# Include CPU-model-specific files based on set of models
11212478SCurtis.Dunham@arm.com# specified in CPU_MODELS build option.
11312478SCurtis.Dunham@arm.com#
11412478SCurtis.Dunham@arm.com#################################################################
11512478SCurtis.Dunham@arm.com
11612478SCurtis.Dunham@arm.comsources = []
11712478SCurtis.Dunham@arm.com
11812478SCurtis.Dunham@arm.comneed_simple_base = False
11912478SCurtis.Dunham@arm.comif 'AtomicSimpleCPU' in env['CPU_MODELS']:
12012478SCurtis.Dunham@arm.com    need_simple_base = True
12112478SCurtis.Dunham@arm.com    sources += Split('simple/atomic.cc')
12212478SCurtis.Dunham@arm.com
12312478SCurtis.Dunham@arm.comif 'TimingSimpleCPU' in env['CPU_MODELS']:
12410037SARM gem5 Developers    need_simple_base = True
12510037SARM gem5 Developers    sources += Split('simple/timing.cc')
12612477SCurtis.Dunham@arm.com
12712479SCurtis.Dunham@arm.comif need_simple_base:
12812477SCurtis.Dunham@arm.com    sources += Split('simple/base.cc')
12912477SCurtis.Dunham@arm.com
13012477SCurtis.Dunham@arm.comif 'FastCPU' in env['CPU_MODELS']:
13112479SCurtis.Dunham@arm.com    sources += Split('fast/cpu.cc')
13212477SCurtis.Dunham@arm.com
13312477SCurtis.Dunham@arm.comif 'AlphaO3CPU' in env['CPU_MODELS']:
13412477SCurtis.Dunham@arm.com    sources += Split('''
13512477SCurtis.Dunham@arm.com        o3/2bit_local_pred.cc
13612477SCurtis.Dunham@arm.com        o3/alpha_dyn_inst.cc
13712477SCurtis.Dunham@arm.com        o3/alpha_cpu.cc
13812477SCurtis.Dunham@arm.com        o3/alpha_cpu_builder.cc
13912478SCurtis.Dunham@arm.com        o3/base_dyn_inst.cc
14012478SCurtis.Dunham@arm.com        o3/bpred_unit.cc
14112478SCurtis.Dunham@arm.com        o3/btb.cc
14212478SCurtis.Dunham@arm.com        o3/commit.cc
14312478SCurtis.Dunham@arm.com        o3/decode.cc
14412478SCurtis.Dunham@arm.com        o3/fetch.cc
14512478SCurtis.Dunham@arm.com        o3/free_list.cc
14612478SCurtis.Dunham@arm.com        o3/fu_pool.cc
14712478SCurtis.Dunham@arm.com        o3/cpu.cc
14812478SCurtis.Dunham@arm.com        o3/iew.cc
14912478SCurtis.Dunham@arm.com        o3/inst_queue.cc
15012478SCurtis.Dunham@arm.com        o3/lsq_unit.cc
15112478SCurtis.Dunham@arm.com        o3/lsq.cc
15212478SCurtis.Dunham@arm.com        o3/mem_dep_unit.cc
15312478SCurtis.Dunham@arm.com        o3/ras.cc
15412478SCurtis.Dunham@arm.com        o3/rename.cc
15512479SCurtis.Dunham@arm.com        o3/rename_map.cc
15612479SCurtis.Dunham@arm.com        o3/rob.cc
15712479SCurtis.Dunham@arm.com        o3/scoreboard.cc
15812479SCurtis.Dunham@arm.com        o3/store_set.cc
15912479SCurtis.Dunham@arm.com        o3/tournament_pred.cc
16012479SCurtis.Dunham@arm.com        ''')
16112479SCurtis.Dunham@arm.com    if env['USE_CHECKER']:
16212479SCurtis.Dunham@arm.com        sources += Split('o3/checker_builder.cc')
16312479SCurtis.Dunham@arm.com
16412479SCurtis.Dunham@arm.comif 'OzoneSimpleCPU' in env['CPU_MODELS']:
16512479SCurtis.Dunham@arm.com    sources += Split('''
16612479SCurtis.Dunham@arm.com        ozone/cpu.cc
16712479SCurtis.Dunham@arm.com        ozone/cpu_builder.cc
16812479SCurtis.Dunham@arm.com        ozone/dyn_inst.cc
16912479SCurtis.Dunham@arm.com        ozone/front_end.cc
17012479SCurtis.Dunham@arm.com        ozone/inorder_back_end.cc
17112479SCurtis.Dunham@arm.com        ozone/inst_queue.cc
17212479SCurtis.Dunham@arm.com        ozone/rename_table.cc
17312479SCurtis.Dunham@arm.com        ''')
17412479SCurtis.Dunham@arm.com
17512479SCurtis.Dunham@arm.comif 'OzoneCPU' in env['CPU_MODELS']:
17612479SCurtis.Dunham@arm.com    sources += Split('''
17712479SCurtis.Dunham@arm.com        ozone/base_dyn_inst.cc
17812479SCurtis.Dunham@arm.com        ozone/bpred_unit.cc
17912479SCurtis.Dunham@arm.com        ozone/lsq_unit.cc
18012479SCurtis.Dunham@arm.com        ozone/lw_back_end.cc
18112479SCurtis.Dunham@arm.com        ozone/lw_lsq.cc
18212479SCurtis.Dunham@arm.com        ''')
18312479SCurtis.Dunham@arm.com    if env['USE_CHECKER']:
18412479SCurtis.Dunham@arm.com        sources += Split('ozone/checker_builder.cc')
18512479SCurtis.Dunham@arm.com
18612479SCurtis.Dunham@arm.comif env['USE_CHECKER']:
18712479SCurtis.Dunham@arm.com    checker_supports = False
18812479SCurtis.Dunham@arm.com    for i in CheckerSupportedCPUList:
18912479SCurtis.Dunham@arm.com        if i in env['CPU_MODELS']:
19012479SCurtis.Dunham@arm.com            checker_supports = True
19112479SCurtis.Dunham@arm.com    if not checker_supports:
19212479SCurtis.Dunham@arm.com        print "Checker only supports CPU models %s, please " \
19312479SCurtis.Dunham@arm.com              "set USE_CHECKER=False or use one of those CPU models" \
19412479SCurtis.Dunham@arm.com              % CheckerSupportedCPUList
19512479SCurtis.Dunham@arm.com        Exit(1)
19612479SCurtis.Dunham@arm.com
19712479SCurtis.Dunham@arm.com
19812479SCurtis.Dunham@arm.com# FullCPU sources are included from src/SConscript since they're not
19912479SCurtis.Dunham@arm.com# below this point in the file hierarchy.
20012479SCurtis.Dunham@arm.com
20112479SCurtis.Dunham@arm.com# Convert file names to SCons File objects.  This takes care of the
20212479SCurtis.Dunham@arm.com# path relative to the top of the directory tree.
20312479SCurtis.Dunham@arm.comsources = [File(s) for s in sources]
20412479SCurtis.Dunham@arm.com
20512479SCurtis.Dunham@arm.comReturn('sources')
20612479SCurtis.Dunham@arm.com
20712479SCurtis.Dunham@arm.com