SConscript revision 10259:ebb376f73dd2
112027Sjungma@eit.uni-kl.de# -*- mode:python -*-
212027Sjungma@eit.uni-kl.de
312027Sjungma@eit.uni-kl.de# Copyright (c) 2006 The Regents of The University of Michigan
412027Sjungma@eit.uni-kl.de# All rights reserved.
512027Sjungma@eit.uni-kl.de#
612027Sjungma@eit.uni-kl.de# Redistribution and use in source and binary forms, with or without
712027Sjungma@eit.uni-kl.de# modification, are permitted provided that the following conditions are
812027Sjungma@eit.uni-kl.de# met: redistributions of source code must retain the above copyright
912027Sjungma@eit.uni-kl.de# notice, this list of conditions and the following disclaimer;
1012027Sjungma@eit.uni-kl.de# redistributions in binary form must reproduce the above copyright
1112027Sjungma@eit.uni-kl.de# notice, this list of conditions and the following disclaimer in the
1212027Sjungma@eit.uni-kl.de# documentation and/or other materials provided with the distribution;
1312027Sjungma@eit.uni-kl.de# neither the name of the copyright holders nor the names of its
1412027Sjungma@eit.uni-kl.de# contributors may be used to endorse or promote products derived from
1512027Sjungma@eit.uni-kl.de# this software without specific prior written permission.
1612027Sjungma@eit.uni-kl.de#
1712027Sjungma@eit.uni-kl.de# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
1812027Sjungma@eit.uni-kl.de# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
1912027Sjungma@eit.uni-kl.de# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
2012027Sjungma@eit.uni-kl.de# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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2212027Sjungma@eit.uni-kl.de# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
2312027Sjungma@eit.uni-kl.de# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
2412027Sjungma@eit.uni-kl.de# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
2512027Sjungma@eit.uni-kl.de# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2612027Sjungma@eit.uni-kl.de# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
2712027Sjungma@eit.uni-kl.de# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2812027Sjungma@eit.uni-kl.de#
2912027Sjungma@eit.uni-kl.de# Authors: Steve Reinhardt
3012027Sjungma@eit.uni-kl.de
3112027Sjungma@eit.uni-kl.deImport('*')
3212027Sjungma@eit.uni-kl.de
3312027Sjungma@eit.uni-kl.deif env['TARGET_ISA'] == 'null':
3412027Sjungma@eit.uni-kl.de    SimObject('IntrControl.py')
3512027Sjungma@eit.uni-kl.de    Source('intr_control_noisa.cc')
3612027Sjungma@eit.uni-kl.de    Return()
3712027Sjungma@eit.uni-kl.de
3812027Sjungma@eit.uni-kl.de#################################################################
3912027Sjungma@eit.uni-kl.de#
4012027Sjungma@eit.uni-kl.de# Generate StaticInst execute() method signatures.
4112027Sjungma@eit.uni-kl.de#
4212027Sjungma@eit.uni-kl.de# There must be one signature for each CPU model compiled in.
4312027Sjungma@eit.uni-kl.de# Since the set of compiled-in models is flexible, we generate a
4412027Sjungma@eit.uni-kl.de# header containing the appropriate set of signatures on the fly.
4512027Sjungma@eit.uni-kl.de#
4612027Sjungma@eit.uni-kl.de#################################################################
4712027Sjungma@eit.uni-kl.de
4812027Sjungma@eit.uni-kl.de# Template for execute() signature.
4912027Sjungma@eit.uni-kl.deexec_sig_template = '''
5012027Sjungma@eit.uni-kl.devirtual Fault execute(%(type)s *xc, Trace::InstRecord *traceData) const = 0;
5112027Sjungma@eit.uni-kl.devirtual Fault eaComp(%(type)s *xc, Trace::InstRecord *traceData) const
52{ panic("eaComp not defined!"); M5_DUMMY_RETURN };
53virtual Fault initiateAcc(%(type)s *xc, Trace::InstRecord *traceData) const
54{ panic("initiateAcc not defined!"); M5_DUMMY_RETURN };
55virtual Fault completeAcc(Packet *pkt, %(type)s *xc,
56                          Trace::InstRecord *traceData) const
57{ panic("completeAcc not defined!"); M5_DUMMY_RETURN };
58'''
59
60mem_ini_sig_template = '''
61virtual Fault eaComp(%(type)s *xc, Trace::InstRecord *traceData) const
62{ panic("eaComp not defined!"); M5_DUMMY_RETURN };
63virtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); M5_DUMMY_RETURN };
64'''
65
66mem_comp_sig_template = '''
67virtual Fault completeAcc(uint8_t *data, %s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); return NoFault; M5_DUMMY_RETURN };
68'''
69
70# Generate a temporary CPU list, including the CheckerCPU if
71# it's enabled.  This isn't used for anything else other than StaticInst
72# headers.
73temp_cpu_list = env['CPU_MODELS'][:]
74temp_cpu_list.append('CheckerCPU')
75SimObject('CheckerCPU.py')
76
77# Generate header.
78def gen_cpu_exec_signatures(target, source, env):
79    f = open(str(target[0]), 'w')
80    print >> f, '''
81#ifndef __CPU_STATIC_INST_EXEC_SIGS_HH__
82#define __CPU_STATIC_INST_EXEC_SIGS_HH__
83'''
84    for cpu in temp_cpu_list:
85        xc_type = CpuModel.dict[cpu].strings['CPU_exec_context']
86        print >> f, exec_sig_template % { 'type' : xc_type }
87    print >> f, '''
88#endif  // __CPU_STATIC_INST_EXEC_SIGS_HH__
89'''
90
91# Generate string that gets printed when header is rebuilt
92def gen_sigs_string(target, source, env):
93    return " [GENERATE] static_inst_exec_sigs.hh: " \
94           + ', '.join(temp_cpu_list)
95
96# Add command to generate header to environment.
97env.Command('static_inst_exec_sigs.hh', (),
98            Action(gen_cpu_exec_signatures, gen_sigs_string,
99                   varlist = temp_cpu_list))
100
101env.Depends('static_inst_exec_sigs.hh', Value(env['CPU_MODELS']))
102
103SimObject('BaseCPU.py')
104SimObject('FuncUnit.py')
105SimObject('ExeTracer.py')
106SimObject('IntelTrace.py')
107SimObject('IntrControl.py')
108SimObject('NativeTrace.py')
109SimObject('TimingExpr.py')
110
111Source('activity.cc')
112Source('base.cc')
113Source('cpuevent.cc')
114Source('exetrace.cc')
115Source('func_unit.cc')
116Source('inteltrace.cc')
117Source('intr_control.cc')
118Source('nativetrace.cc')
119Source('pc_event.cc')
120Source('profile.cc')
121Source('quiesce_event.cc')
122Source('reg_class.cc')
123Source('static_inst.cc')
124Source('simple_thread.cc')
125Source('thread_context.cc')
126Source('thread_state.cc')
127Source('timing_expr.cc')
128
129if env['TARGET_ISA'] == 'sparc':
130    SimObject('LegionTrace.py')
131    Source('legiontrace.cc')
132
133SimObject('DummyChecker.py')
134SimObject('StaticInstFlags.py')
135Source('checker/cpu.cc')
136Source('dummy_checker.cc')
137DebugFlag('Checker')
138
139DebugFlag('Activity')
140DebugFlag('Commit')
141DebugFlag('Context')
142DebugFlag('Decode')
143DebugFlag('DynInst')
144DebugFlag('ExecEnable', 'Filter: Enable exec tracing (no tracing without this)')
145DebugFlag('ExecCPSeq', 'Format: Instruction sequence number')
146DebugFlag('ExecEffAddr', 'Format: Include effective address')
147DebugFlag('ExecFaulting', 'Trace faulting instructions')
148DebugFlag('ExecFetchSeq', 'Format: Fetch sequence number')
149DebugFlag('ExecOpClass', 'Format: Include operand class')
150DebugFlag('ExecRegDelta')
151DebugFlag('ExecResult', 'Format: Include results from execution')
152DebugFlag('ExecSpeculative', 'Format: Include a miss-/speculation flag (-/+)')
153DebugFlag('ExecSymbol', 'Format: Try to include symbol names')
154DebugFlag('ExecThread', 'Format: Include thread ID in trace')
155DebugFlag('ExecTicks', 'Format: Include tick count')
156DebugFlag('ExecMicro', 'Filter: Include microops')
157DebugFlag('ExecMacro', 'Filter: Include macroops')
158DebugFlag('ExecUser', 'Filter: Trace user mode instructions')
159DebugFlag('ExecKernel', 'Filter: Trace kernel mode instructions')
160DebugFlag('ExecAsid', 'Format: Include ASID in trace')
161DebugFlag('Fetch')
162DebugFlag('IntrControl')
163DebugFlag('O3PipeView')
164DebugFlag('PCEvent')
165DebugFlag('Quiesce')
166
167CompoundFlag('ExecAll', [ 'ExecEnable', 'ExecCPSeq', 'ExecEffAddr',
168    'ExecFaulting', 'ExecFetchSeq', 'ExecOpClass', 'ExecRegDelta',
169    'ExecResult', 'ExecSpeculative', 'ExecSymbol', 'ExecThread',
170    'ExecTicks', 'ExecMicro', 'ExecMacro', 'ExecUser', 'ExecKernel',
171    'ExecAsid' ])
172CompoundFlag('Exec', [ 'ExecEnable', 'ExecTicks', 'ExecOpClass', 'ExecThread',
173    'ExecEffAddr', 'ExecResult', 'ExecSymbol', 'ExecMicro', 'ExecFaulting',
174    'ExecUser', 'ExecKernel' ])
175CompoundFlag('ExecNoTicks', [ 'ExecEnable', 'ExecOpClass', 'ExecThread',
176    'ExecEffAddr', 'ExecResult', 'ExecMicro', 'ExecFaulting',
177    'ExecUser', 'ExecKernel' ])
178