SConscript revision 6994
1955SN/A# -*- mode:python -*- 2955SN/A 31762SN/A# Copyright (c) 2006 The Regents of The University of Michigan 4955SN/A# All rights reserved. 5955SN/A# 6955SN/A# Redistribution and use in source and binary forms, with or without 7955SN/A# modification, are permitted provided that the following conditions are 8955SN/A# met: redistributions of source code must retain the above copyright 9955SN/A# notice, this list of conditions and the following disclaimer; 10955SN/A# redistributions in binary form must reproduce the above copyright 11955SN/A# notice, this list of conditions and the following disclaimer in the 12955SN/A# documentation and/or other materials provided with the distribution; 13955SN/A# neither the name of the copyright holders nor the names of its 14955SN/A# contributors may be used to endorse or promote products derived from 15955SN/A# this software without specific prior written permission. 16955SN/A# 17955SN/A# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18955SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19955SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20955SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21955SN/A# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22955SN/A# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23955SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24955SN/A# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25955SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26955SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27955SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 282665Ssaidi@eecs.umich.edu# 294762Snate@binkert.org# Authors: Steve Reinhardt 30955SN/A 315522Snate@binkert.orgImport('*') 326143Snate@binkert.org 334762Snate@binkert.org################################################################# 345522Snate@binkert.org# 35955SN/A# Generate StaticInst execute() method signatures. 365522Snate@binkert.org# 37955SN/A# There must be one signature for each CPU model compiled in. 385522Snate@binkert.org# Since the set of compiled-in models is flexible, we generate a 394202Sbinkertn@umich.edu# header containing the appropriate set of signatures on the fly. 405742Snate@binkert.org# 41955SN/A################################################################# 424381Sbinkertn@umich.edu 434381Sbinkertn@umich.edu# Template for execute() signature. 448334Snate@binkert.orgexec_sig_template = ''' 45955SN/Avirtual Fault execute(%(type)s *xc, Trace::InstRecord *traceData) const = 0; 46955SN/Avirtual Fault eaComp(%(type)s *xc, Trace::InstRecord *traceData) const 474202Sbinkertn@umich.edu{ panic("eaComp not defined!"); M5_DUMMY_RETURN }; 48955SN/Avirtual Fault initiateAcc(%(type)s *xc, Trace::InstRecord *traceData) const 494382Sbinkertn@umich.edu{ panic("initiateAcc not defined!"); M5_DUMMY_RETURN }; 504382Sbinkertn@umich.eduvirtual Fault completeAcc(Packet *pkt, %(type)s *xc, 514382Sbinkertn@umich.edu Trace::InstRecord *traceData) const 526654Snate@binkert.org{ panic("completeAcc not defined!"); M5_DUMMY_RETURN }; 535517Snate@binkert.org''' 548614Sgblack@eecs.umich.edu 557674Snate@binkert.orgmem_ini_sig_template = ''' 566143Snate@binkert.orgvirtual Fault eaComp(%(type)s *xc, Trace::InstRecord *traceData) const 576143Snate@binkert.org{ panic("eaComp not defined!"); M5_DUMMY_RETURN }; 586143Snate@binkert.orgvirtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); M5_DUMMY_RETURN }; 598233Snate@binkert.org''' 608233Snate@binkert.org 618233Snate@binkert.orgmem_comp_sig_template = ''' 628233Snate@binkert.orgvirtual Fault completeAcc(uint8_t *data, %s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); return NoFault; M5_DUMMY_RETURN }; 638233Snate@binkert.org''' 648334Snate@binkert.org 658334Snate@binkert.org# Generate a temporary CPU list, including the CheckerCPU if 668233Snate@binkert.org# it's enabled. This isn't used for anything else other than StaticInst 678233Snate@binkert.org# headers. 688233Snate@binkert.orgtemp_cpu_list = env['CPU_MODELS'][:] 698233Snate@binkert.org 708233Snate@binkert.orgif env['USE_CHECKER']: 718233Snate@binkert.org temp_cpu_list.append('CheckerCPU') 726143Snate@binkert.org SimObject('CheckerCPU.py') 738233Snate@binkert.org 748233Snate@binkert.org# Generate header. 758233Snate@binkert.orgdef gen_cpu_exec_signatures(target, source, env): 766143Snate@binkert.org f = open(str(target[0]), 'w') 776143Snate@binkert.org print >> f, ''' 786143Snate@binkert.org#ifndef __CPU_STATIC_INST_EXEC_SIGS_HH__ 796143Snate@binkert.org#define __CPU_STATIC_INST_EXEC_SIGS_HH__ 808233Snate@binkert.org''' 818233Snate@binkert.org for cpu in temp_cpu_list: 828233Snate@binkert.org xc_type = CpuModel.dict[cpu].strings['CPU_exec_context'] 836143Snate@binkert.org print >> f, exec_sig_template % { 'type' : xc_type } 848233Snate@binkert.org print >> f, ''' 858233Snate@binkert.org#endif // __CPU_STATIC_INST_EXEC_SIGS_HH__ 868233Snate@binkert.org''' 878233Snate@binkert.org 886143Snate@binkert.org# Generate string that gets printed when header is rebuilt 896143Snate@binkert.orgdef gen_sigs_string(target, source, env): 906143Snate@binkert.org return "Generating static_inst_exec_sigs.hh: " \ 914762Snate@binkert.org + ', '.join(temp_cpu_list) 926143Snate@binkert.org 938233Snate@binkert.org# Add command to generate header to environment. 948233Snate@binkert.orgenv.Command('static_inst_exec_sigs.hh', (), 958233Snate@binkert.org Action(gen_cpu_exec_signatures, gen_sigs_string, 968233Snate@binkert.org varlist = temp_cpu_list)) 978233Snate@binkert.org 986143Snate@binkert.orgenv.Depends('static_inst_exec_sigs.hh', Value(env['USE_CHECKER'])) 998233Snate@binkert.orgenv.Depends('static_inst_exec_sigs.hh', Value(env['CPU_MODELS'])) 1008233Snate@binkert.org 1018233Snate@binkert.org# List of suppported CPUs by the Checker. Errors out if USE_CHECKER=True 1028233Snate@binkert.org# and one of these are not being used. 1036143Snate@binkert.orgCheckerSupportedCPUList = ['O3CPU', 'OzoneCPU'] 1046143Snate@binkert.org 1056143Snate@binkert.orgSimObject('BaseCPU.py') 1066143Snate@binkert.orgSimObject('FuncUnit.py') 1076143Snate@binkert.orgSimObject('ExeTracer.py') 1086143Snate@binkert.orgSimObject('IntelTrace.py') 1096143Snate@binkert.orgSimObject('NativeTrace.py') 1106143Snate@binkert.org 1116143Snate@binkert.orgSource('activity.cc') 1127065Snate@binkert.orgSource('base.cc') 1136143Snate@binkert.orgSource('cpuevent.cc') 1148233Snate@binkert.orgSource('exetrace.cc') 1158233Snate@binkert.orgSource('func_unit.cc') 1168233Snate@binkert.orgSource('inteltrace.cc') 1178233Snate@binkert.orgSource('nativetrace.cc') 1188233Snate@binkert.orgSource('pc_event.cc') 1198233Snate@binkert.orgSource('quiesce_event.cc') 1208233Snate@binkert.orgSource('static_inst.cc') 1218233Snate@binkert.orgSource('simple_thread.cc') 1228233Snate@binkert.orgSource('thread_context.cc') 1238233Snate@binkert.orgSource('thread_state.cc') 1248233Snate@binkert.org 1258233Snate@binkert.orgif env['FULL_SYSTEM']: 1268233Snate@binkert.org SimObject('IntrControl.py') 1278233Snate@binkert.org 1288233Snate@binkert.org Source('intr_control.cc') 1298233Snate@binkert.org Source('profile.cc') 1308233Snate@binkert.org 1318233Snate@binkert.org if env['TARGET_ISA'] == 'sparc': 1328233Snate@binkert.org SimObject('LegionTrace.py') 1338233Snate@binkert.org Source('legiontrace.cc') 1348233Snate@binkert.org 1358233Snate@binkert.orgif env['USE_CHECKER']: 1368233Snate@binkert.org Source('checker/cpu.cc') 1378233Snate@binkert.org TraceFlag('Checker') 1388233Snate@binkert.org checker_supports = False 1398233Snate@binkert.org for i in CheckerSupportedCPUList: 1408233Snate@binkert.org if i in env['CPU_MODELS']: 1418233Snate@binkert.org checker_supports = True 1428233Snate@binkert.org if not checker_supports: 1438233Snate@binkert.org print "Checker only supports CPU models", 1448233Snate@binkert.org for i in CheckerSupportedCPUList: 1456143Snate@binkert.org print i, 1466143Snate@binkert.org print ", please set USE_CHECKER=False or use one of those CPU models" 1476143Snate@binkert.org Exit(1) 1486143Snate@binkert.org 1496143Snate@binkert.orgTraceFlag('Activity') 1506143Snate@binkert.orgTraceFlag('Commit') 1516143Snate@binkert.orgTraceFlag('Context') 1526143Snate@binkert.orgTraceFlag('Decode') 1536143Snate@binkert.orgTraceFlag('DynInst') 1548945Ssteve.reinhardt@amd.comTraceFlag('ExecEnable') 1558233Snate@binkert.orgTraceFlag('ExecCPSeq') 1568233Snate@binkert.orgTraceFlag('ExecEffAddr') 1576143Snate@binkert.orgTraceFlag('ExecFaulting', 'Trace faulting instructions') 1588945Ssteve.reinhardt@amd.comTraceFlag('ExecFetchSeq') 1596143Snate@binkert.orgTraceFlag('ExecOpClass') 1606143Snate@binkert.orgTraceFlag('ExecRegDelta') 1616143Snate@binkert.orgTraceFlag('ExecResult') 1626143Snate@binkert.orgTraceFlag('ExecSpeculative') 1635522Snate@binkert.orgTraceFlag('ExecSymbol') 1646143Snate@binkert.orgTraceFlag('ExecThread') 1656143Snate@binkert.orgTraceFlag('ExecTicks') 1666143Snate@binkert.orgTraceFlag('ExecMicro') 1676143Snate@binkert.orgTraceFlag('ExecMacro') 1688233Snate@binkert.orgTraceFlag('Fetch') 1698233Snate@binkert.orgTraceFlag('IntrControl') 1708233Snate@binkert.orgTraceFlag('PCEvent') 1716143Snate@binkert.orgTraceFlag('Quiesce') 1726143Snate@binkert.org 1736143Snate@binkert.orgCompoundFlag('Exec', [ 'ExecEnable', 'ExecTicks', 'ExecOpClass', 'ExecThread', 1746143Snate@binkert.org 'ExecEffAddr', 'ExecResult', 'ExecSymbol', 'ExecMicro', 'ExecFaulting' ]) 1755522Snate@binkert.orgCompoundFlag('ExecNoTicks', [ 'ExecEnable', 'ExecOpClass', 'ExecThread', 1765522Snate@binkert.org 'ExecEffAddr', 'ExecResult', 'ExecMicro', 'ExecFaulting' ]) 1775522Snate@binkert.org