SConscript revision 5597
1955SN/A# -*- mode:python -*- 2955SN/A 31762SN/A# Copyright (c) 2006 The Regents of The University of Michigan 4955SN/A# All rights reserved. 5955SN/A# 6955SN/A# Redistribution and use in source and binary forms, with or without 7955SN/A# modification, are permitted provided that the following conditions are 8955SN/A# met: redistributions of source code must retain the above copyright 9955SN/A# notice, this list of conditions and the following disclaimer; 10955SN/A# redistributions in binary form must reproduce the above copyright 11955SN/A# notice, this list of conditions and the following disclaimer in the 12955SN/A# documentation and/or other materials provided with the distribution; 13955SN/A# neither the name of the copyright holders nor the names of its 14955SN/A# contributors may be used to endorse or promote products derived from 15955SN/A# this software without specific prior written permission. 16955SN/A# 17955SN/A# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18955SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19955SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20955SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21955SN/A# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22955SN/A# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23955SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24955SN/A# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25955SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26955SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27955SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 282665Ssaidi@eecs.umich.edu# 294762Snate@binkert.org# Authors: Steve Reinhardt 30955SN/A 314762Snate@binkert.orgImport('*') 32955SN/A 33955SN/A################################################################# 344202Sbinkertn@umich.edu# 354382Sbinkertn@umich.edu# Generate StaticInst execute() method signatures. 364202Sbinkertn@umich.edu# 374762Snate@binkert.org# There must be one signature for each CPU model compiled in. 384762Snate@binkert.org# Since the set of compiled-in models is flexible, we generate a 394762Snate@binkert.org# header containing the appropriate set of signatures on the fly. 40955SN/A# 414381Sbinkertn@umich.edu################################################################# 424381Sbinkertn@umich.edu 43955SN/A# CPU model-specific data is contained in cpu_models.py 44955SN/A# Convert to SCons File node to get path handling 45955SN/Amodels_db = File('cpu_models.py') 464202Sbinkertn@umich.edu# slurp in contents of file 47955SN/Aexecfile(models_db.srcnode().abspath) 484382Sbinkertn@umich.edu 494382Sbinkertn@umich.edu# Template for execute() signature. 504382Sbinkertn@umich.eduexec_sig_template = ''' 514762Snate@binkert.orgvirtual Fault execute(%s *xc, Trace::InstRecord *traceData) const = 0; 524762Snate@binkert.orgvirtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const 534762Snate@binkert.org{ panic("initiateAcc not defined!"); M5_DUMMY_RETURN }; 544762Snate@binkert.orgvirtual Fault completeAcc(Packet *pkt, %s *xc, 554762Snate@binkert.org Trace::InstRecord *traceData) const 564762Snate@binkert.org{ panic("completeAcc not defined!"); M5_DUMMY_RETURN }; 574762Snate@binkert.org''' 584762Snate@binkert.org 594762Snate@binkert.orgmem_ini_sig_template = ''' 604762Snate@binkert.orgvirtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); M5_DUMMY_RETURN }; 614762Snate@binkert.org''' 624762Snate@binkert.org 634762Snate@binkert.orgmem_comp_sig_template = ''' 644762Snate@binkert.orgvirtual Fault completeAcc(uint8_t *data, %s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); return NoFault; M5_DUMMY_RETURN }; 654762Snate@binkert.org''' 664762Snate@binkert.org 674762Snate@binkert.org# Generate a temporary CPU list, including the CheckerCPU if 684762Snate@binkert.org# it's enabled. This isn't used for anything else other than StaticInst 694762Snate@binkert.org# headers. 704762Snate@binkert.orgtemp_cpu_list = env['CPU_MODELS'][:] 714762Snate@binkert.org 724762Snate@binkert.orgif env['USE_CHECKER']: 734762Snate@binkert.org temp_cpu_list.append('CheckerCPU') 744762Snate@binkert.org SimObject('CheckerCPU.py') 754762Snate@binkert.org 764762Snate@binkert.org# Generate header. 774762Snate@binkert.orgdef gen_cpu_exec_signatures(target, source, env): 784762Snate@binkert.org f = open(str(target[0]), 'w') 794762Snate@binkert.org print >> f, ''' 804762Snate@binkert.org#ifndef __CPU_STATIC_INST_EXEC_SIGS_HH__ 814762Snate@binkert.org#define __CPU_STATIC_INST_EXEC_SIGS_HH__ 824762Snate@binkert.org''' 834762Snate@binkert.org for cpu in temp_cpu_list: 844382Sbinkertn@umich.edu xc_type = CpuModel.dict[cpu].strings['CPU_exec_context'] 854762Snate@binkert.org print >> f, exec_sig_template % (xc_type, xc_type, xc_type) 864382Sbinkertn@umich.edu print >> f, ''' 874762Snate@binkert.org#endif // __CPU_STATIC_INST_EXEC_SIGS_HH__ 884381Sbinkertn@umich.edu''' 894762Snate@binkert.org 904762Snate@binkert.org# Generate string that gets printed when header is rebuilt 914762Snate@binkert.orgdef gen_sigs_string(target, source, env): 924762Snate@binkert.org return "Generating static_inst_exec_sigs.hh: " \ 934762Snate@binkert.org + ', '.join(temp_cpu_list) 944762Snate@binkert.org 954762Snate@binkert.org# Add command to generate header to environment. 964762Snate@binkert.orgenv.Command('static_inst_exec_sigs.hh', models_db, 974762Snate@binkert.org Action(gen_cpu_exec_signatures, gen_sigs_string, 984762Snate@binkert.org varlist = temp_cpu_list)) 994762Snate@binkert.org 1004762Snate@binkert.orgenv.Depends('static_inst_exec_sigs.hh', Value(env['USE_CHECKER'])) 1014762Snate@binkert.orgenv.Depends('static_inst_exec_sigs.hh', Value(env['CPU_MODELS'])) 1024762Snate@binkert.org 1034762Snate@binkert.org# List of suppported CPUs by the Checker. Errors out if USE_CHECKER=True 1044762Snate@binkert.org# and one of these are not being used. 1054762Snate@binkert.orgCheckerSupportedCPUList = ['O3CPU', 'OzoneCPU'] 1064762Snate@binkert.org 1074762Snate@binkert.orgSimObject('BaseCPU.py') 1084762Snate@binkert.orgSimObject('FuncUnit.py') 1094762Snate@binkert.orgSimObject('ExeTracer.py') 1104762Snate@binkert.orgSimObject('IntelTrace.py') 1114762Snate@binkert.org 1124762Snate@binkert.orgSource('activity.cc') 1134762Snate@binkert.orgSource('base.cc') 1144762Snate@binkert.orgSource('cpuevent.cc') 1154762Snate@binkert.orgSource('exetrace.cc') 1164762Snate@binkert.orgSource('func_unit.cc') 1174762Snate@binkert.orgSource('inteltrace.cc') 1184762Snate@binkert.orgSource('pc_event.cc') 1194762Snate@binkert.orgSource('quiesce_event.cc') 1204762Snate@binkert.orgSource('static_inst.cc') 1214762Snate@binkert.orgSource('simple_thread.cc') 1224762Snate@binkert.orgSource('thread_context.cc') 1234762Snate@binkert.orgSource('thread_state.cc') 1244762Snate@binkert.org 1254762Snate@binkert.orgif env['FULL_SYSTEM']: 1264762Snate@binkert.org SimObject('IntrControl.py') 1274762Snate@binkert.org 1284762Snate@binkert.org Source('intr_control.cc') 129955SN/A Source('profile.cc') 1304382Sbinkertn@umich.edu 1314202Sbinkertn@umich.edu if env['TARGET_ISA'] == 'sparc': 1324382Sbinkertn@umich.edu SimObject('LegionTrace.py') 1334382Sbinkertn@umich.edu Source('legiontrace.cc') 1344382Sbinkertn@umich.edu 1354382Sbinkertn@umich.eduif env['TARGET_ISA'] == 'x86': 1364382Sbinkertn@umich.edu SimObject('NativeTrace.py') 1374382Sbinkertn@umich.edu Source('nativetrace.cc') 1384382Sbinkertn@umich.edu 1394382Sbinkertn@umich.eduif env['USE_CHECKER']: 1404382Sbinkertn@umich.edu Source('checker/cpu.cc') 1412667Sstever@eecs.umich.edu TraceFlag('Checker') 1422667Sstever@eecs.umich.edu checker_supports = False 1432667Sstever@eecs.umich.edu for i in CheckerSupportedCPUList: 1442667Sstever@eecs.umich.edu if i in env['CPU_MODELS']: 1452667Sstever@eecs.umich.edu checker_supports = True 1462667Sstever@eecs.umich.edu if not checker_supports: 1472037SN/A print "Checker only supports CPU models", 1482037SN/A for i in CheckerSupportedCPUList: 1492037SN/A print i, 1504382Sbinkertn@umich.edu print ", please set USE_CHECKER=False or use one of those CPU models" 1514762Snate@binkert.org Exit(1) 1524202Sbinkertn@umich.edu# Workaround for bug in SCons version > 0.97d20071212 1534382Sbinkertn@umich.edu# Scons bug id: 2006 M5 Bug id: 308 1544202Sbinkertn@umich.eduelse: 1554202Sbinkertn@umich.edu Dir('checker') 1564202Sbinkertn@umich.edu 1574202Sbinkertn@umich.eduTraceFlag('Activity') 1584202Sbinkertn@umich.eduTraceFlag('Commit') 1594762Snate@binkert.orgTraceFlag('Context') 1604202Sbinkertn@umich.eduTraceFlag('Decode') 1614202Sbinkertn@umich.eduTraceFlag('DynInst') 1624202Sbinkertn@umich.eduTraceFlag('ExecEnable') 1634202Sbinkertn@umich.eduTraceFlag('ExecCPSeq') 1644202Sbinkertn@umich.eduTraceFlag('ExecEffAddr') 1651858SN/ATraceFlag('ExecFetchSeq') 1664773Snate@binkert.orgTraceFlag('ExecOpClass') 1674773Snate@binkert.orgTraceFlag('ExecRegDelta') 1684773Snate@binkert.orgTraceFlag('ExecResult') 1694773Snate@binkert.orgTraceFlag('ExecSpeculative') 1704773Snate@binkert.orgTraceFlag('ExecSymbol') 1714773Snate@binkert.orgTraceFlag('ExecThread') 1724773Snate@binkert.orgTraceFlag('ExecTicks') 1734773Snate@binkert.orgTraceFlag('Fetch') 1744773Snate@binkert.orgTraceFlag('IntrControl') 1751858SN/ATraceFlag('PCEvent') 1761858SN/ATraceFlag('Quiesce') 1771085SN/A 1784382Sbinkertn@umich.eduCompoundFlag('Exec', [ 'ExecEnable', 'ExecTicks', 'ExecOpClass', 'ExecThread', 1794382Sbinkertn@umich.edu 'ExecEffAddr', 'ExecResult', 'ExecSymbol' ]) 1804762Snate@binkert.org