SConscript revision 4218
1955SN/A# -*- mode:python -*- 2955SN/A 31762SN/A# Copyright (c) 2006 The Regents of The University of Michigan 4955SN/A# All rights reserved. 5955SN/A# 6955SN/A# Redistribution and use in source and binary forms, with or without 7955SN/A# modification, are permitted provided that the following conditions are 8955SN/A# met: redistributions of source code must retain the above copyright 9955SN/A# notice, this list of conditions and the following disclaimer; 10955SN/A# redistributions in binary form must reproduce the above copyright 11955SN/A# notice, this list of conditions and the following disclaimer in the 12955SN/A# documentation and/or other materials provided with the distribution; 13955SN/A# neither the name of the copyright holders nor the names of its 14955SN/A# contributors may be used to endorse or promote products derived from 15955SN/A# this software without specific prior written permission. 16955SN/A# 17955SN/A# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18955SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19955SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20955SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21955SN/A# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22955SN/A# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23955SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24955SN/A# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25955SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26955SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27955SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 282665Ssaidi@eecs.umich.edu# 292665Ssaidi@eecs.umich.edu# Authors: Steve Reinhardt 30955SN/A 31955SN/AImport('*') 32955SN/A 334202Sbinkertn@umich.edu################################################################# 344202Sbinkertn@umich.edu# 35955SN/A# Generate StaticInst execute() method signatures. 36955SN/A# 37955SN/A# There must be one signature for each CPU model compiled in. 38955SN/A# Since the set of compiled-in models is flexible, we generate a 394202Sbinkertn@umich.edu# header containing the appropriate set of signatures on the fly. 40955SN/A# 414202Sbinkertn@umich.edu################################################################# 424202Sbinkertn@umich.edu 434202Sbinkertn@umich.edu# CPU model-specific data is contained in cpu_models.py 444202Sbinkertn@umich.edu# Convert to SCons File node to get path handling 454202Sbinkertn@umich.edumodels_db = File('cpu_models.py') 464202Sbinkertn@umich.edu# slurp in contents of file 474202Sbinkertn@umich.eduexecfile(models_db.srcnode().abspath) 484202Sbinkertn@umich.edu 494202Sbinkertn@umich.edu# Template for execute() signature. 504202Sbinkertn@umich.eduexec_sig_template = ''' 51955SN/Avirtual Fault execute(%s *xc, Trace::InstRecord *traceData) const = 0; 524202Sbinkertn@umich.eduvirtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const 534202Sbinkertn@umich.edu{ panic("initiateAcc not defined!"); M5_DUMMY_RETURN }; 54955SN/Avirtual Fault completeAcc(Packet *pkt, %s *xc, 552667Sstever@eecs.umich.edu Trace::InstRecord *traceData) const 562667Sstever@eecs.umich.edu{ panic("completeAcc not defined!"); M5_DUMMY_RETURN }; 572667Sstever@eecs.umich.edu''' 582667Sstever@eecs.umich.edu 592667Sstever@eecs.umich.edumem_ini_sig_template = ''' 602667Sstever@eecs.umich.eduvirtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); M5_DUMMY_RETURN }; 612037SN/A''' 622037SN/A 632037SN/Amem_comp_sig_template = ''' 644202Sbinkertn@umich.eduvirtual Fault completeAcc(uint8_t *data, %s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); return NoFault; M5_DUMMY_RETURN }; 654202Sbinkertn@umich.edu''' 664202Sbinkertn@umich.edu 674202Sbinkertn@umich.edu# Generate a temporary CPU list, including the CheckerCPU if 684202Sbinkertn@umich.edu# it's enabled. This isn't used for anything else other than StaticInst 694202Sbinkertn@umich.edu# headers. 704202Sbinkertn@umich.edutemp_cpu_list = env['CPU_MODELS'][:] 714202Sbinkertn@umich.edu 724202Sbinkertn@umich.eduif env['USE_CHECKER']: 734202Sbinkertn@umich.edu temp_cpu_list.append('CheckerCPU') 744202Sbinkertn@umich.edu 754202Sbinkertn@umich.edu# Generate header. 764202Sbinkertn@umich.edudef gen_cpu_exec_signatures(target, source, env): 771858SN/A f = open(str(target[0]), 'w') 781858SN/A print >> f, ''' 791858SN/A#ifndef __CPU_STATIC_INST_EXEC_SIGS_HH__ 801085SN/A#define __CPU_STATIC_INST_EXEC_SIGS_HH__ 81955SN/A''' 82955SN/A for cpu in temp_cpu_list: 83955SN/A xc_type = CpuModel.dict[cpu].strings['CPU_exec_context'] 84955SN/A print >> f, exec_sig_template % (xc_type, xc_type, xc_type) 851108SN/A print >> f, ''' 86955SN/A#endif // __CPU_STATIC_INST_EXEC_SIGS_HH__ 87955SN/A''' 88955SN/A 89955SN/A# Generate string that gets printed when header is rebuilt 90955SN/Adef gen_sigs_string(target, source, env): 91955SN/A return "Generating static_inst_exec_sigs.hh: " \ 92955SN/A + ', '.join(temp_cpu_list) 93955SN/A 94955SN/A# Add command to generate header to environment. 95955SN/Aenv.Command('static_inst_exec_sigs.hh', models_db, 96955SN/A Action(gen_cpu_exec_signatures, gen_sigs_string, 97955SN/A varlist = temp_cpu_list)) 98955SN/A 99955SN/Aenv.Depends('static_inst_exec_sigs.hh', Value(env['USE_CHECKER'])) 100955SN/Aenv.Depends('static_inst_exec_sigs.hh', Value(env['CPU_MODELS'])) 101955SN/A 1022655Sstever@eecs.umich.edu# List of suppported CPUs by the Checker. Errors out if USE_CHECKER=True 1032655Sstever@eecs.umich.edu# and one of these are not being used. 1042655Sstever@eecs.umich.eduCheckerSupportedCPUList = ['O3CPU', 'OzoneCPU'] 1052655Sstever@eecs.umich.edu 1062655Sstever@eecs.umich.eduSource('activity.cc') 1072655Sstever@eecs.umich.eduSource('base.cc') 1082655Sstever@eecs.umich.eduSource('cpuevent.cc') 1092655Sstever@eecs.umich.eduSource('exetrace.cc') 1102655Sstever@eecs.umich.eduSource('func_unit.cc') 1112655Sstever@eecs.umich.eduSource('op_class.cc') 1122655Sstever@eecs.umich.eduSource('pc_event.cc') 1132655Sstever@eecs.umich.eduSource('quiesce_event.cc') 1142655Sstever@eecs.umich.eduSource('static_inst.cc') 1152655Sstever@eecs.umich.eduSource('simple_thread.cc') 1162655Sstever@eecs.umich.eduSource('thread_state.cc') 1172655Sstever@eecs.umich.edu 1184007Ssaidi@eecs.umich.eduif env['FULL_SYSTEM']: 1194007Ssaidi@eecs.umich.edu Source('intr_control.cc') 1204007Ssaidi@eecs.umich.edu Source('profile.cc') 1214007Ssaidi@eecs.umich.edu 1222655Sstever@eecs.umich.eduif env['USE_CHECKER']: 1232655Sstever@eecs.umich.edu Source('checker/cpu.cc') 1242655Sstever@eecs.umich.edu checker_supports = False 1252655Sstever@eecs.umich.edu for i in CheckerSupportedCPUList: 1262655Sstever@eecs.umich.edu if i in env['CPU_MODELS']: 127955SN/A checker_supports = True 1283918Ssaidi@eecs.umich.edu if not checker_supports: 1293918Ssaidi@eecs.umich.edu print "Checker only supports CPU models", 1303918Ssaidi@eecs.umich.edu for i in CheckerSupportedCPUList: 1313918Ssaidi@eecs.umich.edu print i, 1323918Ssaidi@eecs.umich.edu print ", please set USE_CHECKER=False or use one of those CPU models" 1333918Ssaidi@eecs.umich.edu Exit(1) 1343918Ssaidi@eecs.umich.edu