SConscript revision 10529
1955SN/A# -*- mode:python -*- 2955SN/A 31762SN/A# Copyright (c) 2006 The Regents of The University of Michigan 4955SN/A# All rights reserved. 5955SN/A# 6955SN/A# Redistribution and use in source and binary forms, with or without 7955SN/A# modification, are permitted provided that the following conditions are 8955SN/A# met: redistributions of source code must retain the above copyright 9955SN/A# notice, this list of conditions and the following disclaimer; 10955SN/A# redistributions in binary form must reproduce the above copyright 11955SN/A# notice, this list of conditions and the following disclaimer in the 12955SN/A# documentation and/or other materials provided with the distribution; 13955SN/A# neither the name of the copyright holders nor the names of its 14955SN/A# contributors may be used to endorse or promote products derived from 15955SN/A# this software without specific prior written permission. 16955SN/A# 17955SN/A# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18955SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19955SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20955SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21955SN/A# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22955SN/A# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23955SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24955SN/A# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25955SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26955SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27955SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 282665Ssaidi@eecs.umich.edu# 292665Ssaidi@eecs.umich.edu# Authors: Steve Reinhardt 30955SN/A 31955SN/AImport('*') 32955SN/A 331608SN/Aif env['TARGET_ISA'] == 'null': 34955SN/A SimObject('IntrControl.py') 35955SN/A Source('intr_control_noisa.cc') 36955SN/A Return() 37955SN/A 38955SN/ASimObject('CheckerCPU.py') 39955SN/A 40955SN/ASimObject('BaseCPU.py') 41955SN/ASimObject('FuncUnit.py') 42955SN/ASimObject('ExeTracer.py') 43955SN/ASimObject('IntelTrace.py') 44955SN/ASimObject('IntrControl.py') 45955SN/ASimObject('NativeTrace.py') 46955SN/ASimObject('TimingExpr.py') 47955SN/A 482023SN/ASource('activity.cc') 49955SN/ASource('base.cc') 50955SN/ASource('cpuevent.cc') 51955SN/ASource('exetrace.cc') 52955SN/ASource('exec_context.cc') 53955SN/ASource('func_unit.cc') 54955SN/ASource('inteltrace.cc') 55955SN/ASource('intr_control.cc') 56955SN/ASource('nativetrace.cc') 57955SN/ASource('pc_event.cc') 581031SN/ASource('profile.cc') 59955SN/ASource('quiesce_event.cc') 601388SN/ASource('reg_class.cc') 61955SN/ASource('static_inst.cc') 62955SN/ASource('simple_thread.cc') 631296SN/ASource('thread_context.cc') 64955SN/ASource('thread_state.cc') 652609SN/ASource('timing_expr.cc') 66955SN/A 67955SN/Aif env['TARGET_ISA'] == 'sparc': 68955SN/A SimObject('LegionTrace.py') 69955SN/A Source('legiontrace.cc') 70955SN/A 71955SN/ASimObject('DummyChecker.py') 72955SN/ASimObject('StaticInstFlags.py') 73955SN/ASource('checker/cpu.cc') 74955SN/ASource('dummy_checker.cc') 75955SN/ADebugFlag('Checker') 76955SN/A 77955SN/ADebugFlag('Activity') 78955SN/ADebugFlag('Commit') 79955SN/ADebugFlag('Context') 80955SN/ADebugFlag('Decode') 81955SN/ADebugFlag('DynInst') 82955SN/ADebugFlag('ExecEnable', 'Filter: Enable exec tracing (no tracing without this)') 83955SN/ADebugFlag('ExecCPSeq', 'Format: Instruction sequence number') 842325SN/ADebugFlag('ExecEffAddr', 'Format: Include effective address') 851717SN/ADebugFlag('ExecFaulting', 'Trace faulting instructions') 862652Ssaidi@eecs.umich.eduDebugFlag('ExecFetchSeq', 'Format: Fetch sequence number') 87955SN/ADebugFlag('ExecOpClass', 'Format: Include operand class') 882736Sktlim@umich.eduDebugFlag('ExecRegDelta') 892410SN/ADebugFlag('ExecResult', 'Format: Include results from execution') 90955SN/ADebugFlag('ExecSpeculative', 'Format: Include a miss-/speculation flag (-/+)') 912290SN/ADebugFlag('ExecSymbol', 'Format: Try to include symbol names') 92955SN/ADebugFlag('ExecThread', 'Format: Include thread ID in trace') 931717SN/ADebugFlag('ExecTicks', 'Format: Include tick count') 942683Sktlim@umich.eduDebugFlag('ExecMicro', 'Filter: Include microops') 952683Sktlim@umich.eduDebugFlag('ExecMacro', 'Filter: Include macroops') 962669Sktlim@umich.eduDebugFlag('ExecUser', 'Filter: Trace user mode instructions') 972568SN/ADebugFlag('ExecKernel', 'Filter: Trace kernel mode instructions') 982568SN/ADebugFlag('ExecAsid', 'Format: Include ASID in trace') 992462SN/ADebugFlag('ExecFlags', 'Format: Include instruction flags in trace') 1002568SN/ADebugFlag('Fetch') 1012395SN/ADebugFlag('IntrControl') 1022405SN/ADebugFlag('O3PipeView') 103955SN/ADebugFlag('PCEvent') 104955SN/ADebugFlag('Quiesce') 105955SN/ADebugFlag('Mwait') 106955SN/A 1072090SN/ACompoundFlag('ExecAll', [ 'ExecEnable', 'ExecCPSeq', 'ExecEffAddr', 108955SN/A 'ExecFaulting', 'ExecFetchSeq', 'ExecOpClass', 'ExecRegDelta', 1092667Sstever@eecs.umich.edu 'ExecResult', 'ExecSpeculative', 'ExecSymbol', 'ExecThread', 110955SN/A 'ExecTicks', 'ExecMicro', 'ExecMacro', 'ExecUser', 'ExecKernel', 111955SN/A 'ExecAsid', 'ExecFlags' ]) 1121696SN/ACompoundFlag('Exec', [ 'ExecEnable', 'ExecTicks', 'ExecOpClass', 'ExecThread', 113955SN/A 'ExecEffAddr', 'ExecResult', 'ExecSymbol', 'ExecMicro', 'ExecFaulting', 114955SN/A 'ExecUser', 'ExecKernel' ]) 115955SN/ACompoundFlag('ExecNoTicks', [ 'ExecEnable', 'ExecOpClass', 'ExecThread', 1161127SN/A 'ExecEffAddr', 'ExecResult', 'ExecMicro', 'ExecFaulting', 117955SN/A 'ExecUser', 'ExecKernel' ]) 118955SN/A