utility.hh revision 6216
1/* 2 * Copyright (c) 2007 The Hewlett-Packard Development Company 3 * All rights reserved. 4 * 5 * Redistribution and use of this software in source and binary forms, 6 * with or without modification, are permitted provided that the 7 * following conditions are met: 8 * 9 * The software must be used only for Non-Commercial Use which means any 10 * use which is NOT directed to receiving any direct monetary 11 * compensation for, or commercial advantage from such use. Illustrative 12 * examples of non-commercial use are academic research, personal study, 13 * teaching, education and corporate research & development. 14 * Illustrative examples of commercial use are distributing products for 15 * commercial advantage and providing services using the software for 16 * commercial advantage. 17 * 18 * If you wish to use this software or functionality therein that may be 19 * covered by patents for commercial use, please contact: 20 * Director of Intellectual Property Licensing 21 * Office of Strategy and Technology 22 * Hewlett-Packard Company 23 * 1501 Page Mill Road 24 * Palo Alto, California 94304 25 * 26 * Redistributions of source code must retain the above copyright notice, 27 * this list of conditions and the following disclaimer. Redistributions 28 * in binary form must reproduce the above copyright notice, this list of 29 * conditions and the following disclaimer in the documentation and/or 30 * other materials provided with the distribution. Neither the name of 31 * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its 32 * contributors may be used to endorse or promote products derived from 33 * this software without specific prior written permission. No right of 34 * sublicense is granted herewith. Derivatives of the software and 35 * output created using the software may be prepared, but only for 36 * Non-Commercial Uses. Derivatives of the software may be shared with 37 * others provided: (i) the others agree to abide by the list of 38 * conditions herein which includes the Non-Commercial Use restrictions; 39 * and (ii) such Derivatives of the software include the above copyright 40 * notice to acknowledge the contribution from this software where 41 * applicable, this list of conditions and the disclaimer below. 42 * 43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 54 * 55 * Authors: Gabe Black 56 */ 57 58#ifndef __ARCH_X86_UTILITY_HH__ 59#define __ARCH_X86_UTILITY_HH__ 60 61#include "arch/x86/types.hh" 62#include "base/hashmap.hh" 63#include "base/misc.hh" 64#include "base/types.hh" 65#include "config/full_system.hh" 66#include "cpu/thread_context.hh" 67 68class ThreadContext; 69 70namespace __hash_namespace { 71 template<> 72 struct hash<X86ISA::ExtMachInst> { 73 size_t operator()(const X86ISA::ExtMachInst &emi) const { 74 return (((uint64_t)emi.legacy << 56) | 75 ((uint64_t)emi.rex << 48) | 76 ((uint64_t)emi.modRM << 40) | 77 ((uint64_t)emi.sib << 32) | 78 ((uint64_t)emi.opcode.num << 24) | 79 ((uint64_t)emi.opcode.prefixA << 16) | 80 ((uint64_t)emi.opcode.prefixB << 8) | 81 ((uint64_t)emi.opcode.op)) ^ 82 emi.immediate ^ emi.displacement ^ 83 emi.mode ^ 84 emi.opSize ^ emi.addrSize ^ emi.stackSize; 85 }; 86 }; 87} 88 89namespace X86ISA 90{ 91 uint64_t getArgument(ThreadContext *tc, int number, bool fp); 92 93 static inline bool 94 inUserMode(ThreadContext *tc) 95 { 96#if FULL_SYSTEM 97 HandyM5Reg m5reg = tc->readMiscRegNoEffect(MISCREG_M5_REG); 98 return m5reg.cpl == 3; 99#else 100 return true; 101#endif 102 } 103 104 inline bool isCallerSaveIntegerRegister(unsigned int reg) { 105 panic("register classification not implemented"); 106 return false; 107 } 108 109 inline bool isCalleeSaveIntegerRegister(unsigned int reg) { 110 panic("register classification not implemented"); 111 return false; 112 } 113 114 inline bool isCallerSaveFloatRegister(unsigned int reg) { 115 panic("register classification not implemented"); 116 return false; 117 } 118 119 inline bool isCalleeSaveFloatRegister(unsigned int reg) { 120 panic("register classification not implemented"); 121 return false; 122 } 123 124 // Instruction address compression hooks 125 inline Addr realPCToFetchPC(const Addr &addr) 126 { 127 return addr; 128 } 129 130 inline Addr fetchPCToRealPC(const Addr &addr) 131 { 132 return addr; 133 } 134 135 // the size of "fetched" instructions (not necessarily the size 136 // of real instructions for PISA) 137 inline size_t fetchInstSize() 138 { 139 return sizeof(MachInst); 140 } 141 142 /** 143 * Function to insure ISA semantics about 0 registers. 144 * @param tc The thread context. 145 */ 146 template <class TC> 147 void zeroRegisters(TC *tc); 148 149#if FULL_SYSTEM 150 151 void initCPU(ThreadContext *tc, int cpuId); 152 153#endif 154 155 void startupCPU(ThreadContext *tc, int cpuId); 156}; 157 158#endif // __ARCH_X86_UTILITY_HH__ 159