utility.hh revision 6313
14120Sgblack@eecs.umich.edu/* 24120Sgblack@eecs.umich.edu * Copyright (c) 2007 The Hewlett-Packard Development Company 34120Sgblack@eecs.umich.edu * All rights reserved. 44120Sgblack@eecs.umich.edu * 54120Sgblack@eecs.umich.edu * Redistribution and use of this software in source and binary forms, 64120Sgblack@eecs.umich.edu * with or without modification, are permitted provided that the 74120Sgblack@eecs.umich.edu * following conditions are met: 84120Sgblack@eecs.umich.edu * 94120Sgblack@eecs.umich.edu * The software must be used only for Non-Commercial Use which means any 104120Sgblack@eecs.umich.edu * use which is NOT directed to receiving any direct monetary 114120Sgblack@eecs.umich.edu * compensation for, or commercial advantage from such use. Illustrative 124120Sgblack@eecs.umich.edu * examples of non-commercial use are academic research, personal study, 134120Sgblack@eecs.umich.edu * teaching, education and corporate research & development. 144120Sgblack@eecs.umich.edu * Illustrative examples of commercial use are distributing products for 154120Sgblack@eecs.umich.edu * commercial advantage and providing services using the software for 164120Sgblack@eecs.umich.edu * commercial advantage. 174120Sgblack@eecs.umich.edu * 184120Sgblack@eecs.umich.edu * If you wish to use this software or functionality therein that may be 194120Sgblack@eecs.umich.edu * covered by patents for commercial use, please contact: 204120Sgblack@eecs.umich.edu * Director of Intellectual Property Licensing 214120Sgblack@eecs.umich.edu * Office of Strategy and Technology 224120Sgblack@eecs.umich.edu * Hewlett-Packard Company 234120Sgblack@eecs.umich.edu * 1501 Page Mill Road 244120Sgblack@eecs.umich.edu * Palo Alto, California 94304 254120Sgblack@eecs.umich.edu * 264120Sgblack@eecs.umich.edu * Redistributions of source code must retain the above copyright notice, 274120Sgblack@eecs.umich.edu * this list of conditions and the following disclaimer. Redistributions 284120Sgblack@eecs.umich.edu * in binary form must reproduce the above copyright notice, this list of 294120Sgblack@eecs.umich.edu * conditions and the following disclaimer in the documentation and/or 304120Sgblack@eecs.umich.edu * other materials provided with the distribution. Neither the name of 314120Sgblack@eecs.umich.edu * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its 324120Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 334120Sgblack@eecs.umich.edu * this software without specific prior written permission. No right of 344120Sgblack@eecs.umich.edu * sublicense is granted herewith. Derivatives of the software and 354120Sgblack@eecs.umich.edu * output created using the software may be prepared, but only for 364120Sgblack@eecs.umich.edu * Non-Commercial Uses. Derivatives of the software may be shared with 374120Sgblack@eecs.umich.edu * others provided: (i) the others agree to abide by the list of 384120Sgblack@eecs.umich.edu * conditions herein which includes the Non-Commercial Use restrictions; 394120Sgblack@eecs.umich.edu * and (ii) such Derivatives of the software include the above copyright 404120Sgblack@eecs.umich.edu * notice to acknowledge the contribution from this software where 414120Sgblack@eecs.umich.edu * applicable, this list of conditions and the disclaimer below. 424120Sgblack@eecs.umich.edu * 434120Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 444120Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 454120Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 464120Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 474120Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 484120Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 494120Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 504120Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 514120Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 524120Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 534120Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 544120Sgblack@eecs.umich.edu * 554120Sgblack@eecs.umich.edu * Authors: Gabe Black 564120Sgblack@eecs.umich.edu */ 574120Sgblack@eecs.umich.edu 584120Sgblack@eecs.umich.edu#ifndef __ARCH_X86_UTILITY_HH__ 594120Sgblack@eecs.umich.edu#define __ARCH_X86_UTILITY_HH__ 604120Sgblack@eecs.umich.edu 616313Sgblack@eecs.umich.edu#include "arch/x86/miscregs.hh" 624148Sgblack@eecs.umich.edu#include "arch/x86/types.hh" 634182Sgblack@eecs.umich.edu#include "base/hashmap.hh" 644148Sgblack@eecs.umich.edu#include "base/misc.hh" 656216Snate@binkert.org#include "base/types.hh" 665135Sgblack@eecs.umich.edu#include "config/full_system.hh" 674241Sgblack@eecs.umich.edu#include "cpu/thread_context.hh" 684148Sgblack@eecs.umich.edu 694148Sgblack@eecs.umich.educlass ThreadContext; 704120Sgblack@eecs.umich.edu 714182Sgblack@eecs.umich.edunamespace __hash_namespace { 724182Sgblack@eecs.umich.edu template<> 734182Sgblack@eecs.umich.edu struct hash<X86ISA::ExtMachInst> { 744182Sgblack@eecs.umich.edu size_t operator()(const X86ISA::ExtMachInst &emi) const { 754334Sgblack@eecs.umich.edu return (((uint64_t)emi.legacy << 56) | 764334Sgblack@eecs.umich.edu ((uint64_t)emi.rex << 48) | 774334Sgblack@eecs.umich.edu ((uint64_t)emi.modRM << 40) | 784334Sgblack@eecs.umich.edu ((uint64_t)emi.sib << 32) | 794334Sgblack@eecs.umich.edu ((uint64_t)emi.opcode.num << 24) | 804334Sgblack@eecs.umich.edu ((uint64_t)emi.opcode.prefixA << 16) | 814334Sgblack@eecs.umich.edu ((uint64_t)emi.opcode.prefixB << 8) | 824334Sgblack@eecs.umich.edu ((uint64_t)emi.opcode.op)) ^ 834342Sgblack@eecs.umich.edu emi.immediate ^ emi.displacement ^ 844587Sgblack@eecs.umich.edu emi.mode ^ 854587Sgblack@eecs.umich.edu emi.opSize ^ emi.addrSize ^ emi.stackSize; 864182Sgblack@eecs.umich.edu }; 874182Sgblack@eecs.umich.edu }; 884182Sgblack@eecs.umich.edu} 894182Sgblack@eecs.umich.edu 904120Sgblack@eecs.umich.edunamespace X86ISA 914120Sgblack@eecs.umich.edu{ 925086Sgblack@eecs.umich.edu uint64_t getArgument(ThreadContext *tc, int number, bool fp); 935086Sgblack@eecs.umich.edu 944148Sgblack@eecs.umich.edu static inline bool 954148Sgblack@eecs.umich.edu inUserMode(ThreadContext *tc) 964148Sgblack@eecs.umich.edu { 975910Sgblack@eecs.umich.edu#if FULL_SYSTEM 985910Sgblack@eecs.umich.edu HandyM5Reg m5reg = tc->readMiscRegNoEffect(MISCREG_M5_REG); 995910Sgblack@eecs.umich.edu return m5reg.cpl == 3; 1005910Sgblack@eecs.umich.edu#else 1015910Sgblack@eecs.umich.edu return true; 1025910Sgblack@eecs.umich.edu#endif 1034148Sgblack@eecs.umich.edu } 1044148Sgblack@eecs.umich.edu 1054148Sgblack@eecs.umich.edu inline bool isCallerSaveIntegerRegister(unsigned int reg) { 1064148Sgblack@eecs.umich.edu panic("register classification not implemented"); 1074148Sgblack@eecs.umich.edu return false; 1084148Sgblack@eecs.umich.edu } 1094148Sgblack@eecs.umich.edu 1104148Sgblack@eecs.umich.edu inline bool isCalleeSaveIntegerRegister(unsigned int reg) { 1114148Sgblack@eecs.umich.edu panic("register classification not implemented"); 1124148Sgblack@eecs.umich.edu return false; 1134148Sgblack@eecs.umich.edu } 1144148Sgblack@eecs.umich.edu 1154148Sgblack@eecs.umich.edu inline bool isCallerSaveFloatRegister(unsigned int reg) { 1164148Sgblack@eecs.umich.edu panic("register classification not implemented"); 1174148Sgblack@eecs.umich.edu return false; 1184148Sgblack@eecs.umich.edu } 1194148Sgblack@eecs.umich.edu 1204148Sgblack@eecs.umich.edu inline bool isCalleeSaveFloatRegister(unsigned int reg) { 1214148Sgblack@eecs.umich.edu panic("register classification not implemented"); 1224148Sgblack@eecs.umich.edu return false; 1234148Sgblack@eecs.umich.edu } 1244148Sgblack@eecs.umich.edu 1254148Sgblack@eecs.umich.edu // Instruction address compression hooks 1264148Sgblack@eecs.umich.edu inline Addr realPCToFetchPC(const Addr &addr) 1274148Sgblack@eecs.umich.edu { 1284148Sgblack@eecs.umich.edu return addr; 1294148Sgblack@eecs.umich.edu } 1304148Sgblack@eecs.umich.edu 1314148Sgblack@eecs.umich.edu inline Addr fetchPCToRealPC(const Addr &addr) 1324148Sgblack@eecs.umich.edu { 1334148Sgblack@eecs.umich.edu return addr; 1344148Sgblack@eecs.umich.edu } 1354148Sgblack@eecs.umich.edu 1364148Sgblack@eecs.umich.edu // the size of "fetched" instructions (not necessarily the size 1374148Sgblack@eecs.umich.edu // of real instructions for PISA) 1384148Sgblack@eecs.umich.edu inline size_t fetchInstSize() 1394148Sgblack@eecs.umich.edu { 1404148Sgblack@eecs.umich.edu return sizeof(MachInst); 1414148Sgblack@eecs.umich.edu } 1424148Sgblack@eecs.umich.edu 1434148Sgblack@eecs.umich.edu /** 1444148Sgblack@eecs.umich.edu * Function to insure ISA semantics about 0 registers. 1454148Sgblack@eecs.umich.edu * @param tc The thread context. 1464148Sgblack@eecs.umich.edu */ 1474148Sgblack@eecs.umich.edu template <class TC> 1484148Sgblack@eecs.umich.edu void zeroRegisters(TC *tc); 1494148Sgblack@eecs.umich.edu 1505135Sgblack@eecs.umich.edu#if FULL_SYSTEM 1514194Ssaidi@eecs.umich.edu 1525135Sgblack@eecs.umich.edu void initCPU(ThreadContext *tc, int cpuId); 1535135Sgblack@eecs.umich.edu 1545135Sgblack@eecs.umich.edu#endif 1555135Sgblack@eecs.umich.edu 1565135Sgblack@eecs.umich.edu void startupCPU(ThreadContext *tc, int cpuId); 1574120Sgblack@eecs.umich.edu}; 1584120Sgblack@eecs.umich.edu 1594120Sgblack@eecs.umich.edu#endif // __ARCH_X86_UTILITY_HH__ 160