types.cc revision 4147 
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * Redistribution and use of this software in source and binary forms,
6 * with or without modification, are permitted provided that the
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17 *
18 * If you wish to use this software or functionality therein that may be
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25 *
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33 * this software without specific prior written permission.  No right of
34 * sublicense is granted herewith.  Derivatives of the software and
35 * output created using the software may be prepared, but only for
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38 * conditions herein which includes the Non-Commercial Use restrictions;
39 * and (ii) such Derivatives of the software include the above copyright
40 * notice to acknowledge the contribution from this software where
41 * applicable, this list of conditions and the disclaimer below.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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54 *
55 * Authors: Gabe Black
56 */
57
58#ifndef __ARCH_X86_TYPES_HH__
59#define __ARCH_X86_TYPES_HH__
60
61#include <inttypes.h>
62
63namespace X86ISA
64{
65    //XXX This won't work
66    typedef uint32_t MachInst;
67    //XXX This won't work either
68    typedef uint64_t ExtMachInst;
69
70    typedef uint64_t IntReg;
71    typedef uint64_t MiscReg;
72
73    //These floating point types are correct for mmx, but not
74    //technically for x87 (80 bits) or at all for xmm (128 bits)
75    typedef double FloatReg;
76    typedef uint64_t FloatRegBits;
77    typedef union
78    {
79        IntReg intReg;
80        FloatReg fpReg;
81        MiscReg ctrlReg;
82    } AnyReg;
83
84    //XXX This is very hypothetical. X87 instructions would need to
85    //change their "context" constantly. It's also not clear how
86    //this would be handled as far as out of order execution.
87    //Maybe x87 instructions are in order?
88    enum RegContextParam
89    {
90        CONTEXT_X87_TOP
91    };
92
93    typedef int RegContextVal;
94
95    typedef uint8_t RegIndex;
96};
97
98#endif // __ARCH_X86_TYPES_HH__
99