tlb.hh revision 11800:54436a1784dc 
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Gabe Black
38 */
39
40#ifndef __ARCH_X86_TLB_HH__
41#define __ARCH_X86_TLB_HH__
42
43#include <list>
44#include <vector>
45
46#include "arch/generic/tlb.hh"
47#include "arch/x86/pagetable.hh"
48#include "base/trie.hh"
49#include "mem/request.hh"
50#include "params/X86TLB.hh"
51
52class ThreadContext;
53
54namespace X86ISA
55{
56    class Walker;
57
58    class TLB : public BaseTLB
59    {
60      protected:
61        friend class Walker;
62
63        typedef std::list<TlbEntry *> EntryList;
64
65        uint32_t configAddress;
66
67      public:
68
69        typedef X86TLBParams Params;
70        TLB(const Params *p);
71
72        void takeOverFrom(BaseTLB *otlb) override {}
73
74        TlbEntry *lookup(Addr va, bool update_lru = true);
75
76        void setConfigAddress(uint32_t addr);
77
78      protected:
79
80        EntryList::iterator lookupIt(Addr va, bool update_lru = true);
81
82        Walker * walker;
83
84      public:
85        Walker *getWalker();
86
87        void flushAll() override;
88
89        void flushNonGlobal();
90
91        void demapPage(Addr va, uint64_t asn) override;
92
93      protected:
94        uint32_t size;
95
96        std::vector<TlbEntry> tlb;
97
98        EntryList freeList;
99
100        TlbEntryTrie trie;
101        uint64_t lruSeq;
102
103        Fault translateInt(RequestPtr req, ThreadContext *tc);
104
105        Fault translate(RequestPtr req, ThreadContext *tc,
106                Translation *translation, Mode mode,
107                bool &delayedResponse, bool timing);
108
109      public:
110
111        void evictLRU();
112
113        uint64_t
114        nextSeq()
115        {
116            return ++lruSeq;
117        }
118
119        Fault translateAtomic(RequestPtr req, ThreadContext *tc, Mode mode);
120        void translateTiming(RequestPtr req, ThreadContext *tc,
121                Translation *translation, Mode mode);
122        /** Stub function for compilation support of CheckerCPU. x86 ISA does
123         *  not support Checker model at the moment
124         */
125        Fault translateFunctional(RequestPtr req, ThreadContext *tc, Mode mode);
126
127        /**
128         * Do post-translation physical address finalization.
129         *
130         * Some addresses, for example requests going to the APIC,
131         * need post-translation updates. Such physical addresses are
132         * remapped into a "magic" part of the physical address space
133         * by this method.
134         *
135         * @param req Request to updated in-place.
136         * @param tc Thread context that created the request.
137         * @param mode Request type (read/write/execute).
138         * @return A fault on failure, NoFault otherwise.
139         */
140        Fault finalizePhysical(RequestPtr req, ThreadContext *tc,
141                               Mode mode) const;
142
143        TlbEntry * insert(Addr vpn, TlbEntry &entry);
144
145        // Checkpointing
146        void serialize(CheckpointOut &cp) const override;
147        void unserialize(CheckpointIn &cp) override;
148
149        /**
150         * Get the table walker master port. This is used for
151         * migrating port connections during a CPU takeOverFrom()
152         * call. For architectures that do not have a table walker,
153         * NULL is returned, hence the use of a pointer rather than a
154         * reference. For X86 this method will always return a valid
155         * port pointer.
156         *
157         * @return A pointer to the walker master port
158         */
159        BaseMasterPort *getMasterPort() override;
160    };
161}
162
163#endif // __ARCH_X86_TLB_HH__
164