tlb.hh revision 5237
18012Ssaidi@eecs.umich.edu/* 28029Snate@binkert.org * Copyright (c) 2007 The Hewlett-Packard Development Company 38029Snate@binkert.org * All rights reserved. 48013Sbinkertn@umich.edu * 58029Snate@binkert.org * Redistribution and use of this software in source and binary forms, 68029Snate@binkert.org * with or without modification, are permitted provided that the 78029Snate@binkert.org * following conditions are met: 88029Snate@binkert.org * 98029Snate@binkert.org * The software must be used only for Non-Commercial Use which means any 108029Snate@binkert.org * use which is NOT directed to receiving any direct monetary 118029Snate@binkert.org * compensation for, or commercial advantage from such use. Illustrative 128029Snate@binkert.org * examples of non-commercial use are academic research, personal study, 138029Snate@binkert.org * teaching, education and corporate research & development. 148029Snate@binkert.org * Illustrative examples of commercial use are distributing products for 158013Sbinkertn@umich.edu * commercial advantage and providing services using the software for 168029Snate@binkert.org * commercial advantage. 178029Snate@binkert.org * 188029Snate@binkert.org * If you wish to use this software or functionality therein that may be 198029Snate@binkert.org * covered by patents for commercial use, please contact: 208029Snate@binkert.org * Director of Intellectual Property Licensing 218029Snate@binkert.org * Office of Strategy and Technology 228029Snate@binkert.org * Hewlett-Packard Company 238029Snate@binkert.org * 1501 Page Mill Road 248029Snate@binkert.org * Palo Alto, California 94304 258029Snate@binkert.org * 268029Snate@binkert.org * Redistributions of source code must retain the above copyright notice, 278013Sbinkertn@umich.edu * this list of conditions and the following disclaimer. Redistributions 288012Ssaidi@eecs.umich.edu * in binary form must reproduce the above copyright notice, this list of 297997Ssaidi@eecs.umich.edu * conditions and the following disclaimer in the documentation and/or 307997Ssaidi@eecs.umich.edu * other materials provided with the distribution. Neither the name of 317997Ssaidi@eecs.umich.edu * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its 327997Ssaidi@eecs.umich.edu * contributors may be used to endorse or promote products derived from 337997Ssaidi@eecs.umich.edu * this software without specific prior written permission. No right of 347997Ssaidi@eecs.umich.edu * sublicense is granted herewith. Derivatives of the software and 357997Ssaidi@eecs.umich.edu * output created using the software may be prepared, but only for 367997Ssaidi@eecs.umich.edu * Non-Commercial Uses. Derivatives of the software may be shared with 377997Ssaidi@eecs.umich.edu * others provided: (i) the others agree to abide by the list of 387997Ssaidi@eecs.umich.edu * conditions herein which includes the Non-Commercial Use restrictions; 397997Ssaidi@eecs.umich.edu * and (ii) such Derivatives of the software include the above copyright 407997Ssaidi@eecs.umich.edu * notice to acknowledge the contribution from this software where 417997Ssaidi@eecs.umich.edu * applicable, this list of conditions and the disclaimer below. 427997Ssaidi@eecs.umich.edu * 437997Ssaidi@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 447997Ssaidi@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 457997Ssaidi@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 467997Ssaidi@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 477997Ssaidi@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 487997Ssaidi@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 497997Ssaidi@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 507997Ssaidi@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 517997Ssaidi@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 527997Ssaidi@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 537997Ssaidi@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 547997Ssaidi@eecs.umich.edu * 557997Ssaidi@eecs.umich.edu * Authors: Gabe Black 567997Ssaidi@eecs.umich.edu */ 577997Ssaidi@eecs.umich.edu 587997Ssaidi@eecs.umich.edu#ifndef __ARCH_X86_TLB_HH__ 597997Ssaidi@eecs.umich.edu#define __ARCH_X86_TLB_HH__ 607997Ssaidi@eecs.umich.edu 617997Ssaidi@eecs.umich.edu#include <list> 627997Ssaidi@eecs.umich.edu#include <vector> 637997Ssaidi@eecs.umich.edu#include <string> 647997Ssaidi@eecs.umich.edu 657997Ssaidi@eecs.umich.edu#include "arch/x86/pagetable.hh" 667997Ssaidi@eecs.umich.edu#include "arch/x86/segmentregs.hh" 677997Ssaidi@eecs.umich.edu#include "config/full_system.hh" 687997Ssaidi@eecs.umich.edu#include "mem/mem_object.hh" 697997Ssaidi@eecs.umich.edu#include "mem/request.hh" 707997Ssaidi@eecs.umich.edu#include "params/X86DTB.hh" 717997Ssaidi@eecs.umich.edu#include "params/X86ITB.hh" 727997Ssaidi@eecs.umich.edu#include "sim/faults.hh" 737997Ssaidi@eecs.umich.edu#include "sim/sim_object.hh" 747997Ssaidi@eecs.umich.edu 757997Ssaidi@eecs.umich.educlass ThreadContext; 767997Ssaidi@eecs.umich.educlass Packet; 777997Ssaidi@eecs.umich.edu 787997Ssaidi@eecs.umich.edunamespace X86ISA 797997Ssaidi@eecs.umich.edu{ 807997Ssaidi@eecs.umich.edu static const unsigned StoreCheck = 1 << NUM_SEGMENTREGS; 817997Ssaidi@eecs.umich.edu 827997Ssaidi@eecs.umich.edu class TLB; 837997Ssaidi@eecs.umich.edu 847997Ssaidi@eecs.umich.edu class TLB : public MemObject 857997Ssaidi@eecs.umich.edu { 867997Ssaidi@eecs.umich.edu protected: 877997Ssaidi@eecs.umich.edu friend class FakeITLBFault; 887997Ssaidi@eecs.umich.edu friend class FakeDTLBFault; 89 90 System * sys; 91 92 bool allowNX; 93 94 public: 95 typedef X86TLBParams Params; 96 TLB(const Params *p); 97 98 void dumpAll(); 99 100 TlbEntry *lookup(Addr va, bool update_lru = true); 101 102#if FULL_SYSTEM 103 protected: 104 class Walker 105 { 106 public: 107 enum State { 108 Ready, 109 Waiting, 110 LongPML4, 111 LongPDP, 112 LongPD, 113 LongPTE, 114 PAEPDP, 115 PAEPD, 116 PAEPTE, 117 PSEPD, 118 PD, 119 PTE 120 }; 121 122 // Act on the current state and determine what to do next. read 123 // should be the packet that just came back from a read and write 124 // should be NULL. When the function returns, read is either NULL 125 // if the machine is finished, or points to a packet to initiate 126 // the next read. If any write is required to update an "accessed" 127 // bit, write will point to a packet to do the write. Otherwise it 128 // will be NULL. 129 void doNext(PacketPtr &read, PacketPtr &write); 130 131 // Kick off the state machine. 132 void start(ThreadContext * _tc, Addr vaddr); 133 134 protected: 135 friend class TLB; 136 137 /* 138 * State having to do with sending packets. 139 */ 140 PacketPtr read; 141 std::vector<PacketPtr> writes; 142 143 // How many memory operations are in flight. 144 unsigned inflight; 145 146 bool retrying; 147 148 /* 149 * Functions for dealing with packets. 150 */ 151 bool recvTiming(PacketPtr pkt); 152 void recvRetry(); 153 154 void sendPackets(); 155 156 /* 157 * Port for accessing memory 158 */ 159 class WalkerPort : public Port 160 { 161 public: 162 WalkerPort(const std::string &_name, Walker * _walker) : 163 Port(_name, _walker->tlb), walker(_walker), 164 snoopRangeSent(false) 165 {} 166 167 protected: 168 Walker * walker; 169 170 bool snoopRangeSent; 171 172 bool recvTiming(PacketPtr pkt); 173 Tick recvAtomic(PacketPtr pkt); 174 void recvFunctional(PacketPtr pkt); 175 void recvStatusChange(Status status); 176 void recvRetry(); 177 void getDeviceAddressRanges(AddrRangeList &resp, 178 bool &snoop) 179 { 180 resp.clear(); 181 snoop = true; 182 } 183 }; 184 185 friend class WalkerPort; 186 187 WalkerPort port; 188 189 // The TLB we're supposed to load. 190 TLB * tlb; 191 192 /* 193 * State machine state. 194 */ 195 ThreadContext * tc; 196 State state; 197 State nextState; 198 int size; 199 bool enableNX; 200 TlbEntry entry; 201 202 public: 203 Walker(const std::string &_name, TLB * _tlb) : 204 read(NULL), inflight(0), retrying(false), 205 port(_name + "-walker_port", this), 206 tlb(_tlb), 207 tc(NULL), state(Ready), nextState(Ready) 208 { 209 } 210 }; 211 212 Walker walker; 213 214#endif 215 216 Port *getPort(const std::string &if_name, int idx = -1); 217 218 protected: 219 int size; 220 221 TlbEntry * tlb; 222 223 typedef std::list<TlbEntry *> EntryList; 224 EntryList freeList; 225 EntryList entryList; 226 227 void insert(Addr vpn, TlbEntry &entry); 228 229 void invalidateAll(); 230 231 void invalidateNonGlobal(); 232 233 void demapPage(Addr va); 234 235 template<class TlbFault> 236 Fault translate(RequestPtr &req, ThreadContext *tc, 237 bool write, bool execute); 238 239 public: 240 // Checkpointing 241 virtual void serialize(std::ostream &os); 242 virtual void unserialize(Checkpoint *cp, const std::string §ion); 243 }; 244 245 class ITB : public TLB 246 { 247 public: 248 typedef X86ITBParams Params; 249 ITB(const Params *p) : TLB(p) 250 { 251 sys = p->system; 252 allowNX = false; 253 } 254 255 Fault translate(RequestPtr &req, ThreadContext *tc); 256 257 friend class DTB; 258 }; 259 260 class DTB : public TLB 261 { 262 public: 263 typedef X86DTBParams Params; 264 DTB(const Params *p) : TLB(p) 265 { 266 sys = p->system; 267 allowNX = true; 268 } 269 Fault translate(RequestPtr &req, ThreadContext *tc, bool write); 270#if FULL_SYSTEM 271 Tick doMmuRegRead(ThreadContext *tc, Packet *pkt); 272 Tick doMmuRegWrite(ThreadContext *tc, Packet *pkt); 273#endif 274 275 // Checkpointing 276 virtual void serialize(std::ostream &os); 277 virtual void unserialize(Checkpoint *cp, const std::string §ion); 278 }; 279} 280 281#endif // __ARCH_X86_TLB_HH__ 282