xref: /gem5/src/arch/x86/tlb.hh

/*
 * Copyright (c) 2007 The Hewlett-Packard Development Company
 * All rights reserved.
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 * with or without modification, are permitted provided that the
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 * use which is NOT directed to receiving any direct monetary
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 *
 * Redistributions of source code must retain the above copyright notice,
 * this list of conditions and the following disclaimer.  Redistributions
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 * Non-Commercial Uses.  Derivatives of the software may be shared with
 * others provided: (i) the others agree to abide by the list of
 * conditions herein which includes the Non-Commercial Use restrictions;
 * and (ii) such Derivatives of the software include the above copyright
 * notice to acknowledge the contribution from this software where
 * applicable, this list of conditions and the disclaimer below.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * Authors: Gabe Black
 */

#ifndef __ARCH_X86_TLB_HH__
#define __ARCH_X86_TLB_HH__

#include <list>

#include "arch/x86/pagetable.hh"
#include "arch/x86/segmentregs.hh"
#include "config/full_system.hh"
#include "mem/request.hh"
#include "params/X86DTB.hh"
#include "params/X86ITB.hh"
#include "sim/faults.hh"
#include "sim/sim_object.hh"

class ThreadContext;
class Packet;

namespace X86ISA
{
    static const unsigned StoreCheck = 1 << NUM_SEGMENTREGS;

    class TLB : public SimObject
    {
#if !FULL_SYSTEM
      protected:
        friend class FakeITLBFault;
        friend class FakeDTLBFault;
#endif
      public:
        typedef X86TLBParams Params;
        TLB(const Params *p);

        void dumpAll();

        TlbEntry *lookup(Addr va, bool update_lru = true);

      protected:
        int size;

        TlbEntry * tlb;

        typedef std::list<TlbEntry *> EntryList;
        EntryList freeList;
        EntryList entryList;

        void insert(Addr vpn, TlbEntry &entry);

        void invalidateAll();

        void invalidateNonGlobal();

        void demapPage(Addr va);

        template<class TlbFault>
        Fault translate(RequestPtr &req, ThreadContext *tc,
                bool write, bool execute);

      public:
        // Checkpointing
        virtual void serialize(std::ostream &os);
        virtual void unserialize(Checkpoint *cp, const std::string &section);
    };

    class ITB : public TLB
    {
      public:
        typedef X86ITBParams Params;
        ITB(const Params *p) : TLB(p)
        {
        }

        Fault translate(RequestPtr &req, ThreadContext *tc);

        friend class DTB;
    };

    class DTB : public TLB
    {
      public:
        typedef X86DTBParams Params;
        DTB(const Params *p) : TLB(p)
        {
        }
        Fault translate(RequestPtr &req, ThreadContext *tc, bool write);
#if FULL_SYSTEM
        Tick doMmuRegRead(ThreadContext *tc, Packet *pkt);
        Tick doMmuRegWrite(ThreadContext *tc, Packet *pkt);
#endif

        // Checkpointing
        virtual void serialize(std::ostream &os);
        virtual void unserialize(Checkpoint *cp, const std::string &section);
    };
}

#endif // __ARCH_X86_TLB_HH__