apic.hh revision 5647
1/* 2 * Copyright (c) 2008 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 */ 30 31#ifndef __ARCH_X86_APICREGS_HH__ 32#define __ARCH_X86_APICREGS_HH__ 33 34namespace X86ISA 35{ 36 enum ApicRegIndex 37 { 38 APIC_ID, 39 APIC_VERSION, 40 APIC_TASK_PRIORITY, 41 APIC_ARBITRATION_PRIORITY, 42 APIC_PROCESSOR_PRIORITY, 43 APIC_EOI, 44 APIC_LOGICAL_DESTINATION, 45 APIC_DESTINATION_FORMAT, 46 APIC_SPURIOUS_INTERRUPT_VECTOR, 47 48 APIC_IN_SERVICE_BASE, 49 50 APIC_TRIGGER_MODE_BASE = APIC_IN_SERVICE_BASE + 16, 51 52 APIC_INTERRUPT_REQUEST_BASE = APIC_TRIGGER_MODE_BASE + 16, 53 54 APIC_ERROR_STATUS = APIC_INTERRUPT_REQUEST_BASE + 16, 55 APIC_INTERRUPT_COMMAND_LOW, 56 APIC_INTERRUPT_COMMAND_HIGH, 57 APIC_LVT_TIMER, 58 APIC_LVT_THERMAL_SENSOR, 59 APIC_LVT_PERFORMANCE_MONITORING_COUNTERS, 60 APIC_LVT_LINT0, 61 APIC_LVT_LINT1, 62 APIC_LVT_ERROR, 63 APIC_INITIAL_COUNT, 64 APIC_CURRENT_COUNT, 65 APIC_DIVIDE_CONFIGURATION, 66 67 APIC_INTERNAL_STATE, 68 69 NUM_APIC_REGS 70 }; 71 72 static inline ApicRegIndex 73 APIC_IN_SERVICE(int index) 74 { 75 return (ApicRegIndex)(APIC_IN_SERVICE_BASE + index); 76 } 77 78 static inline ApicRegIndex 79 APIC_TRIGGER_MODE(int index) 80 { 81 return (ApicRegIndex)(APIC_TRIGGER_MODE_BASE + index); 82 } 83 84 static inline ApicRegIndex 85 APIC_INTERRUPT_REQUEST(int index) 86 { 87 return (ApicRegIndex)(APIC_INTERRUPT_REQUEST_BASE + index); 88 } 89} 90 91#endif 92