registers.hh revision 10934:5af8f40d8f2c
1/* 2 * Copyright (c) 2007 The Hewlett-Packard Development Company 3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * All rights reserved. 5 * 6 * The license below extends only to copyright in the software and shall 7 * not be construed as granting a license to any other intellectual 8 * property including but not limited to intellectual property relating 9 * to a hardware implementation of the functionality of the software 10 * licensed hereunder. You may use the software subject to the license 11 * terms below provided that you ensure that this notice is replicated 12 * unmodified and in its entirety in all distributions of the software, 13 * modified or unmodified, in source code or in binary form. 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions are 17 * met: redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer; 19 * redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution; 22 * neither the name of the copyright holders nor the names of its 23 * contributors may be used to endorse or promote products derived from 24 * this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 27 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 28 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 29 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 30 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 31 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 32 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 33 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 34 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 35 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 36 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 37 * 38 * Authors: Gabe Black 39 */ 40 41#ifndef __ARCH_X86_REGISTERS_HH__ 42#define __ARCH_X86_REGISTERS_HH__ 43 44#include "arch/x86/generated/max_inst_regs.hh" 45#include "arch/x86/regs/int.hh" 46#include "arch/x86/regs/ccr.hh" 47#include "arch/x86/regs/misc.hh" 48#include "arch/x86/x86_traits.hh" 49 50namespace X86ISA 51{ 52using X86ISAInst::MaxInstSrcRegs; 53using X86ISAInst::MaxInstDestRegs; 54using X86ISAInst::MaxMiscDestRegs; 55const int NumMiscRegs = NUM_MISCREGS; 56 57const int NumIntArchRegs = NUM_INTREGS; 58const int NumIntRegs = NumIntArchRegs + NumMicroIntRegs + NumImplicitIntRegs; 59const int NumCCRegs = NUM_CCREGS; 60const int NumVectorRegs = 0; 61 62#define ISA_HAS_CC_REGS 63 64// Each 128 bit xmm register is broken into two effective 64 bit registers. 65// Add 8 for the indices that are mapped over the fp stack 66const int NumFloatRegs = 67 NumMMXRegs + 2 * NumXMMRegs + NumMicroFpRegs + 8; 68 69// These enumerate all the registers for dependence tracking. 70enum DependenceTags { 71 // FP_Reg_Base must be large enough to be bigger than any integer 72 // register index which has the IntFoldBit (1 << 6) set. To be safe 73 // we just start at (1 << 7) == 128. 74 FP_Reg_Base = 128, 75 CC_Reg_Base = FP_Reg_Base + NumFloatRegs, 76 Vector_Reg_Base = CC_Reg_Base + NumCCRegs, 77 Misc_Reg_Base = Vector_Reg_Base + NumVectorRegs, 78 Max_Reg_Index = Misc_Reg_Base + NumMiscRegs 79}; 80 81// semantically meaningful register indices 82//There is no such register in X86 83const int ZeroReg = NUM_INTREGS; 84const int StackPointerReg = INTREG_RSP; 85//X86 doesn't seem to have a link register 86const int ReturnAddressReg = 0; 87const int ReturnValueReg = INTREG_RAX; 88const int FramePointerReg = INTREG_RBP; 89 90// Some OS syscalls use a second register (rdx) to return a second 91// value 92const int SyscallPseudoReturnReg = INTREG_RDX; 93 94typedef uint64_t IntReg; 95typedef uint64_t CCReg; 96 97// vector register file entry type 98typedef uint64_t VectorRegElement; 99const int NumVectorRegElements = 0; 100const int VectorRegBytes = NumVectorRegElements * sizeof(VectorRegElement); 101typedef std::array<VectorRegElement, NumVectorRegElements> VectorReg; 102 103//XXX Should this be a 128 bit structure for XMM memory ops? 104typedef uint64_t LargestRead; 105typedef uint64_t MiscReg; 106 107//These floating point types are correct for mmx, but not 108//technically for x87 (80 bits) or at all for xmm (128 bits) 109typedef double FloatReg; 110typedef uint64_t FloatRegBits; 111typedef union 112{ 113 IntReg intReg; 114 FloatReg fpReg; 115 CCReg ccReg; 116 MiscReg ctrlReg; 117} AnyReg; 118 119typedef uint16_t RegIndex; 120 121} // namespace X86ISA 122 123#endif // __ARCH_X86_REGFILE_HH__ 124