xref: /gem5/src/arch/x86/registers.hh

/*
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 *
 * Redistributions of source code must retain the above copyright notice,
 * this list of conditions and the following disclaimer.  Redistributions
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 * notice to acknowledge the contribution from this software where
 * applicable, this list of conditions and the disclaimer below.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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 * Authors: Gabe Black
 */

#ifndef __ARCH_X86_REGFILE_HH__
#define __ARCH_X86_REGFILE_HH__

#include <string>

#include "arch/x86/intregs.hh"
#include "arch/x86/miscregs.hh"
#include "arch/x86/isa_traits.hh"
#include "arch/x86/x86_traits.hh"
#include "arch/x86/types.hh"
#include "base/types.hh"

class Checkpoint;
class EventManager;
class ThreadContext;

namespace X86ISA
{
    const int NumMiscArchRegs = NUM_MISCREGS;
    const int NumMiscRegs = NUM_MISCREGS;

    const int NumIntArchRegs = NUM_INTREGS;
    const int NumIntRegs =
        NumIntArchRegs + NumMicroIntRegs +
        NumPseudoIntRegs + NumImplicitIntRegs;

    //Each 128 bit xmm register is broken into two effective 64 bit registers.
    const int NumFloatRegs =
        NumMMXRegs + 2 * NumXMMRegs + NumMicroFpRegs;
    const int NumFloatArchRegs = NumFloatRegs + 8;

    class RegFile
    {
      protected:
        Addr rip; //Program Counter
        Addr nextRip; //Next Program Counter

      public:
        Addr readPC();
        void setPC(Addr val);

        Addr readNextPC();
        void setNextPC(Addr val);

        Addr readNextNPC();
        void setNextNPC(Addr val);

      public:

        void clear()
        {}

        void serialize(EventManager *em, std::ostream &os)
        {}

        void unserialize(EventManager *em, Checkpoint *cp,
                const std::string &section)
        {}
    };

    void copyRegs(ThreadContext *src, ThreadContext *dest);

    void copyMiscRegs(ThreadContext *src, ThreadContext *dest);

    int InterruptLevel(uint64_t softint);

}; // namespace X86ISA

#endif // __ARCH_X86_REGFILE_HH__