process.cc revision 6701:4842482e1bd1
1/*
2 * Copyright (c) 2003-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 *          Ali Saidi
30 */
31
32/*
33 * Copyright (c) 2007 The Hewlett-Packard Development Company
34 * All rights reserved.
35 *
36 * Redistribution and use of this software in source and binary forms,
37 * with or without modification, are permitted provided that the
38 * following conditions are met:
39 *
40 * The software must be used only for Non-Commercial Use which means any
41 * use which is NOT directed to receiving any direct monetary
42 * compensation for, or commercial advantage from such use.  Illustrative
43 * examples of non-commercial use are academic research, personal study,
44 * teaching, education and corporate research & development.
45 * Illustrative examples of commercial use are distributing products for
46 * commercial advantage and providing services using the software for
47 * commercial advantage.
48 *
49 * If you wish to use this software or functionality therein that may be
50 * covered by patents for commercial use, please contact:
51 *     Director of Intellectual Property Licensing
52 *     Office of Strategy and Technology
53 *     Hewlett-Packard Company
54 *     1501 Page Mill Road
55 *     Palo Alto, California  94304
56 *
57 * Redistributions of source code must retain the above copyright notice,
58 * this list of conditions and the following disclaimer.  Redistributions
59 * in binary form must reproduce the above copyright notice, this list of
60 * conditions and the following disclaimer in the documentation and/or
61 * other materials provided with the distribution.  Neither the name of
62 * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
63 * contributors may be used to endorse or promote products derived from
64 * this software without specific prior written permission.  No right of
65 * sublicense is granted herewith.  Derivatives of the software and
66 * output created using the software may be prepared, but only for
67 * Non-Commercial Uses.  Derivatives of the software may be shared with
68 * others provided: (i) the others agree to abide by the list of
69 * conditions herein which includes the Non-Commercial Use restrictions;
70 * and (ii) such Derivatives of the software include the above copyright
71 * notice to acknowledge the contribution from this software where
72 * applicable, this list of conditions and the disclaimer below.
73 *
74 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
75 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
76 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
77 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
78 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
79 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
80 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
81 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
82 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
83 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
84 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
85 *
86 * Authors: Gabe Black
87 */
88
89#include "arch/x86/isa_traits.hh"
90#include "arch/x86/miscregs.hh"
91#include "arch/x86/process.hh"
92#include "arch/x86/segmentregs.hh"
93#include "arch/x86/types.hh"
94#include "base/loader/object_file.hh"
95#include "base/loader/elf_object.hh"
96#include "base/misc.hh"
97#include "base/trace.hh"
98#include "cpu/thread_context.hh"
99#include "mem/page_table.hh"
100#include "mem/translating_port.hh"
101#include "sim/process_impl.hh"
102#include "sim/syscall_emul.hh"
103#include "sim/system.hh"
104
105using namespace std;
106using namespace X86ISA;
107
108static const int ArgumentReg[] = {
109    INTREG_RDI,
110    INTREG_RSI,
111    INTREG_RDX,
112    //This argument register is r10 for syscalls and rcx for C.
113    INTREG_R10W,
114    //INTREG_RCX,
115    INTREG_R8W,
116    INTREG_R9W
117};
118static const int NumArgumentRegs = sizeof(ArgumentReg) / sizeof(const int);
119static const int ArgumentReg32[] = {
120    INTREG_EBX,
121    INTREG_ECX,
122    INTREG_EDX,
123    INTREG_ESI,
124    INTREG_EDI,
125};
126static const int NumArgumentRegs32 = sizeof(ArgumentReg) / sizeof(const int);
127
128X86LiveProcess::X86LiveProcess(LiveProcessParams * params, ObjectFile *objFile,
129        SyscallDesc *_syscallDescs, int _numSyscallDescs) :
130    LiveProcess(params, objFile), syscallDescs(_syscallDescs),
131    numSyscallDescs(_numSyscallDescs)
132{
133    brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
134    brk_point = roundUp(brk_point, VMPageSize);
135}
136
137X86_64LiveProcess::X86_64LiveProcess(LiveProcessParams *params,
138        ObjectFile *objFile, SyscallDesc *_syscallDescs,
139        int _numSyscallDescs) :
140    X86LiveProcess(params, objFile, _syscallDescs, _numSyscallDescs)
141{
142    // Set up stack. On X86_64 Linux, stack goes from the top of memory
143    // downward, less the hole for the kernel address space plus one page
144    // for undertermined purposes.
145    stack_base = (Addr)0x7FFFFFFFF000ULL;
146
147    // Set pointer for next thread stack.  Reserve 8M for main stack.
148    next_thread_stack_base = stack_base - (8 * 1024 * 1024);
149
150    // Set up region for mmaps. This was determined empirically and may not
151    // always be correct.
152    mmap_start = mmap_end = (Addr)0x2aaaaaaab000ULL;
153}
154
155void
156I386LiveProcess::syscall(int64_t callnum, ThreadContext *tc)
157{
158    Addr eip = tc->readPC();
159    if (eip >= vsyscallPage.base &&
160            eip < vsyscallPage.base + vsyscallPage.size) {
161        tc->setNextPC(vsyscallPage.base + vsyscallPage.vsysexitOffset);
162    }
163    X86LiveProcess::syscall(callnum, tc);
164}
165
166
167I386LiveProcess::I386LiveProcess(LiveProcessParams *params,
168        ObjectFile *objFile, SyscallDesc *_syscallDescs,
169        int _numSyscallDescs) :
170    X86LiveProcess(params, objFile, _syscallDescs, _numSyscallDescs)
171{
172    _gdtStart = 0x100000000;
173    _gdtSize = VMPageSize;
174
175    vsyscallPage.base = 0xffffe000ULL;
176    vsyscallPage.size = VMPageSize;
177    vsyscallPage.vsyscallOffset = 0x400;
178    vsyscallPage.vsysexitOffset = 0x410;
179
180    stack_base = vsyscallPage.base;
181
182    // Set pointer for next thread stack.  Reserve 8M for main stack.
183    next_thread_stack_base = stack_base - (8 * 1024 * 1024);
184
185    // Set up region for mmaps. This was determined empirically and may not
186    // always be correct.
187    mmap_start = mmap_end = (Addr)0xf7ffe000ULL;
188}
189
190SyscallDesc*
191X86LiveProcess::getDesc(int callnum)
192{
193    if (callnum < 0 || callnum >= numSyscallDescs)
194        return NULL;
195    return &syscallDescs[callnum];
196}
197
198void
199X86_64LiveProcess::startup()
200{
201    LiveProcess::startup();
202
203    if (checkpointRestored)
204        return;
205
206    argsInit(sizeof(uint64_t), VMPageSize);
207
208    for (int i = 0; i < contextIds.size(); i++) {
209        ThreadContext * tc = system->getThreadContext(contextIds[i]);
210
211        SegAttr dataAttr = 0;
212        dataAttr.dpl = 3;
213        dataAttr.unusable = 0;
214        dataAttr.defaultSize = 1;
215        dataAttr.longMode = 1;
216        dataAttr.avl = 0;
217        dataAttr.granularity = 1;
218        dataAttr.present = 1;
219        dataAttr.type = 3;
220        dataAttr.writable = 1;
221        dataAttr.readable = 1;
222        dataAttr.expandDown = 0;
223        dataAttr.system = 1;
224
225        //Initialize the segment registers.
226        for(int seg = 0; seg < NUM_SEGMENTREGS; seg++) {
227            tc->setMiscRegNoEffect(MISCREG_SEG_BASE(seg), 0);
228            tc->setMiscRegNoEffect(MISCREG_SEG_EFF_BASE(seg), 0);
229            tc->setMiscRegNoEffect(MISCREG_SEG_ATTR(seg), dataAttr);
230        }
231
232        SegAttr csAttr = 0;
233        csAttr.dpl = 3;
234        csAttr.unusable = 0;
235        csAttr.defaultSize = 0;
236        csAttr.longMode = 1;
237        csAttr.avl = 0;
238        csAttr.granularity = 1;
239        csAttr.present = 1;
240        csAttr.type = 10;
241        csAttr.writable = 0;
242        csAttr.readable = 1;
243        csAttr.expandDown = 0;
244        csAttr.system = 1;
245
246        tc->setMiscRegNoEffect(MISCREG_CS_ATTR, csAttr);
247
248        Efer efer = 0;
249        efer.sce = 1; // Enable system call extensions.
250        efer.lme = 1; // Enable long mode.
251        efer.lma = 1; // Activate long mode.
252        efer.nxe = 1; // Enable nx support.
253        efer.svme = 0; // Disable svm support for now. It isn't implemented.
254        efer.ffxsr = 1; // Turn on fast fxsave and fxrstor.
255        tc->setMiscReg(MISCREG_EFER, efer);
256
257        //Set up the registers that describe the operating mode.
258        CR0 cr0 = 0;
259        cr0.pg = 1; // Turn on paging.
260        cr0.cd = 0; // Don't disable caching.
261        cr0.nw = 0; // This is bit is defined to be ignored.
262        cr0.am = 0; // No alignment checking
263        cr0.wp = 0; // Supervisor mode can write read only pages
264        cr0.ne = 1;
265        cr0.et = 1; // This should always be 1
266        cr0.ts = 0; // We don't do task switching, so causing fp exceptions
267                    // would be pointless.
268        cr0.em = 0; // Allow x87 instructions to execute natively.
269        cr0.mp = 1; // This doesn't really matter, but the manual suggests
270                    // setting it to one.
271        cr0.pe = 1; // We're definitely in protected mode.
272        tc->setMiscReg(MISCREG_CR0, cr0);
273
274        tc->setMiscReg(MISCREG_MXCSR, 0x1f80);
275    }
276}
277
278void
279I386LiveProcess::startup()
280{
281    LiveProcess::startup();
282
283    if (checkpointRestored)
284        return;
285
286    argsInit(sizeof(uint32_t), VMPageSize);
287
288    /*
289     * Set up a GDT for this process. The whole GDT wouldn't really be for
290     * this process, but the only parts we care about are.
291     */
292    pTable->allocate(_gdtStart, _gdtSize);
293    uint64_t zero = 0;
294    assert(_gdtSize % sizeof(zero) == 0);
295    for (Addr gdtCurrent = _gdtStart;
296            gdtCurrent < _gdtStart + _gdtSize; gdtCurrent += sizeof(zero)) {
297        initVirtMem->write(gdtCurrent, zero);
298    }
299
300    // Set up the vsyscall page for this process.
301    pTable->allocate(vsyscallPage.base, vsyscallPage.size);
302    uint8_t vsyscallBlob[] = {
303        0x51,       // push %ecx
304        0x52,       // push %edp
305        0x55,       // push %ebp
306        0x89, 0xe5, // mov %esp, %ebp
307        0x0f, 0x34  // sysenter
308    };
309    initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vsyscallOffset,
310            vsyscallBlob, sizeof(vsyscallBlob));
311
312    uint8_t vsysexitBlob[] = {
313        0x5d,       // pop %ebp
314        0x5a,       // pop %edx
315        0x59,       // pop %ecx
316        0xc3        // ret
317    };
318    initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vsysexitOffset,
319            vsysexitBlob, sizeof(vsysexitBlob));
320
321    for (int i = 0; i < contextIds.size(); i++) {
322        ThreadContext * tc = system->getThreadContext(contextIds[i]);
323
324        SegAttr dataAttr = 0;
325        dataAttr.dpl = 3;
326        dataAttr.unusable = 0;
327        dataAttr.defaultSize = 1;
328        dataAttr.longMode = 0;
329        dataAttr.avl = 0;
330        dataAttr.granularity = 1;
331        dataAttr.present = 1;
332        dataAttr.type = 3;
333        dataAttr.writable = 1;
334        dataAttr.readable = 1;
335        dataAttr.expandDown = 0;
336        dataAttr.system = 1;
337
338        //Initialize the segment registers.
339        for(int seg = 0; seg < NUM_SEGMENTREGS; seg++) {
340            tc->setMiscRegNoEffect(MISCREG_SEG_BASE(seg), 0);
341            tc->setMiscRegNoEffect(MISCREG_SEG_EFF_BASE(seg), 0);
342            tc->setMiscRegNoEffect(MISCREG_SEG_ATTR(seg), dataAttr);
343            tc->setMiscRegNoEffect(MISCREG_SEG_SEL(seg), 0xB);
344            tc->setMiscRegNoEffect(MISCREG_SEG_LIMIT(seg), (uint32_t)(-1));
345        }
346
347        SegAttr csAttr = 0;
348        csAttr.dpl = 3;
349        csAttr.unusable = 0;
350        csAttr.defaultSize = 1;
351        csAttr.longMode = 0;
352        csAttr.avl = 0;
353        csAttr.granularity = 1;
354        csAttr.present = 1;
355        csAttr.type = 0xa;
356        csAttr.writable = 0;
357        csAttr.readable = 1;
358        csAttr.expandDown = 0;
359        csAttr.system = 1;
360
361        tc->setMiscRegNoEffect(MISCREG_CS_ATTR, csAttr);
362
363        tc->setMiscRegNoEffect(MISCREG_TSG_BASE, _gdtStart);
364        tc->setMiscRegNoEffect(MISCREG_TSG_EFF_BASE, _gdtStart);
365        tc->setMiscRegNoEffect(MISCREG_TSG_LIMIT, _gdtStart + _gdtSize - 1);
366
367        // Set the LDT selector to 0 to deactivate it.
368        tc->setMiscRegNoEffect(MISCREG_TSL, 0);
369
370        Efer efer = 0;
371        efer.sce = 1; // Enable system call extensions.
372        efer.lme = 1; // Enable long mode.
373        efer.lma = 0; // Deactivate long mode.
374        efer.nxe = 1; // Enable nx support.
375        efer.svme = 0; // Disable svm support for now. It isn't implemented.
376        efer.ffxsr = 1; // Turn on fast fxsave and fxrstor.
377        tc->setMiscReg(MISCREG_EFER, efer);
378
379        //Set up the registers that describe the operating mode.
380        CR0 cr0 = 0;
381        cr0.pg = 1; // Turn on paging.
382        cr0.cd = 0; // Don't disable caching.
383        cr0.nw = 0; // This is bit is defined to be ignored.
384        cr0.am = 0; // No alignment checking
385        cr0.wp = 0; // Supervisor mode can write read only pages
386        cr0.ne = 1;
387        cr0.et = 1; // This should always be 1
388        cr0.ts = 0; // We don't do task switching, so causing fp exceptions
389                    // would be pointless.
390        cr0.em = 0; // Allow x87 instructions to execute natively.
391        cr0.mp = 1; // This doesn't really matter, but the manual suggests
392                    // setting it to one.
393        cr0.pe = 1; // We're definitely in protected mode.
394        tc->setMiscReg(MISCREG_CR0, cr0);
395
396        tc->setMiscReg(MISCREG_MXCSR, 0x1f80);
397    }
398}
399
400template<class IntType>
401void
402X86LiveProcess::argsInit(int pageSize,
403        std::vector<AuxVector<IntType> > extraAuxvs)
404{
405    int intSize = sizeof(IntType);
406
407    typedef AuxVector<IntType> auxv_t;
408    std::vector<auxv_t> auxv = extraAuxvs;
409
410    string filename;
411    if(argv.size() < 1)
412        filename = "";
413    else
414        filename = argv[0];
415
416    //We want 16 byte alignment
417    uint64_t align = 16;
418
419    // load object file into target memory
420    objFile->loadSections(initVirtMem);
421
422    enum X86CpuFeature {
423        X86_OnboardFPU = 1 << 0,
424        X86_VirtualModeExtensions = 1 << 1,
425        X86_DebuggingExtensions = 1 << 2,
426        X86_PageSizeExtensions = 1 << 3,
427
428        X86_TimeStampCounter = 1 << 4,
429        X86_ModelSpecificRegisters = 1 << 5,
430        X86_PhysicalAddressExtensions = 1 << 6,
431        X86_MachineCheckExtensions = 1 << 7,
432
433        X86_CMPXCHG8Instruction = 1 << 8,
434        X86_OnboardAPIC = 1 << 9,
435        X86_SYSENTER_SYSEXIT = 1 << 11,
436
437        X86_MemoryTypeRangeRegisters = 1 << 12,
438        X86_PageGlobalEnable = 1 << 13,
439        X86_MachineCheckArchitecture = 1 << 14,
440        X86_CMOVInstruction = 1 << 15,
441
442        X86_PageAttributeTable = 1 << 16,
443        X86_36BitPSEs = 1 << 17,
444        X86_ProcessorSerialNumber = 1 << 18,
445        X86_CLFLUSHInstruction = 1 << 19,
446
447        X86_DebugTraceStore = 1 << 21,
448        X86_ACPIViaMSR = 1 << 22,
449        X86_MultimediaExtensions = 1 << 23,
450
451        X86_FXSAVE_FXRSTOR = 1 << 24,
452        X86_StreamingSIMDExtensions = 1 << 25,
453        X86_StreamingSIMDExtensions2 = 1 << 26,
454        X86_CPUSelfSnoop = 1 << 27,
455
456        X86_HyperThreading = 1 << 28,
457        X86_AutomaticClockControl = 1 << 29,
458        X86_IA64Processor = 1 << 30
459    };
460
461    //Setup the auxilliary vectors. These will already have endian conversion.
462    //Auxilliary vectors are loaded only for elf formatted executables.
463    ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
464    if(elfObject)
465    {
466        uint64_t features =
467            X86_OnboardFPU |
468            X86_VirtualModeExtensions |
469            X86_DebuggingExtensions |
470            X86_PageSizeExtensions |
471            X86_TimeStampCounter |
472            X86_ModelSpecificRegisters |
473            X86_PhysicalAddressExtensions |
474            X86_MachineCheckExtensions |
475            X86_CMPXCHG8Instruction |
476            X86_OnboardAPIC |
477            X86_SYSENTER_SYSEXIT |
478            X86_MemoryTypeRangeRegisters |
479            X86_PageGlobalEnable |
480            X86_MachineCheckArchitecture |
481            X86_CMOVInstruction |
482            X86_PageAttributeTable |
483            X86_36BitPSEs |
484//            X86_ProcessorSerialNumber |
485            X86_CLFLUSHInstruction |
486//            X86_DebugTraceStore |
487//            X86_ACPIViaMSR |
488            X86_MultimediaExtensions |
489            X86_FXSAVE_FXRSTOR |
490            X86_StreamingSIMDExtensions |
491            X86_StreamingSIMDExtensions2 |
492//            X86_CPUSelfSnoop |
493//            X86_HyperThreading |
494//            X86_AutomaticClockControl |
495//            X86_IA64Processor |
496            0;
497
498        //Bits which describe the system hardware capabilities
499        //XXX Figure out what these should be
500        auxv.push_back(auxv_t(M5_AT_HWCAP, features));
501        //The system page size
502        auxv.push_back(auxv_t(M5_AT_PAGESZ, X86ISA::VMPageSize));
503        //Frequency at which times() increments
504        //Defined to be 100 in the kernel source.
505        auxv.push_back(auxv_t(M5_AT_CLKTCK, 100));
506        // For statically linked executables, this is the virtual address of the
507        // program header tables if they appear in the executable image
508        auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable()));
509        // This is the size of a program header entry from the elf file.
510        auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize()));
511        // This is the number of program headers from the original elf file.
512        auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount()));
513        //This is the address of the elf "interpreter", It should be set
514        //to 0 for regular executables. It should be something else
515        //(not sure what) for dynamic libraries.
516        auxv.push_back(auxv_t(M5_AT_BASE, 0));
517
518        //XXX Figure out what this should be.
519        auxv.push_back(auxv_t(M5_AT_FLAGS, 0));
520        //The entry point to the program
521        auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint()));
522        //Different user and group IDs
523        auxv.push_back(auxv_t(M5_AT_UID, uid()));
524        auxv.push_back(auxv_t(M5_AT_EUID, euid()));
525        auxv.push_back(auxv_t(M5_AT_GID, gid()));
526        auxv.push_back(auxv_t(M5_AT_EGID, egid()));
527        //Whether to enable "secure mode" in the executable
528        auxv.push_back(auxv_t(M5_AT_SECURE, 0));
529        //The string "x86_64" with unknown meaning
530        auxv.push_back(auxv_t(M5_AT_PLATFORM, 0));
531    }
532
533    //Figure out how big the initial stack needs to be
534
535    // A sentry NULL void pointer at the top of the stack.
536    int sentry_size = intSize;
537
538    //This is the name of the file which is present on the initial stack
539    //It's purpose is to let the user space linker examine the original file.
540    int file_name_size = filename.size() + 1;
541
542    string platform = "x86_64";
543    int aux_data_size = platform.size() + 1;
544
545    int env_data_size = 0;
546    for (int i = 0; i < envp.size(); ++i) {
547        env_data_size += envp[i].size() + 1;
548    }
549    int arg_data_size = 0;
550    for (int i = 0; i < argv.size(); ++i) {
551        arg_data_size += argv[i].size() + 1;
552    }
553
554    //The info_block needs to be padded so it's size is a multiple of the
555    //alignment mask. Also, it appears that there needs to be at least some
556    //padding, so if the size is already a multiple, we need to increase it
557    //anyway.
558    int base_info_block_size =
559        sentry_size + file_name_size + env_data_size + arg_data_size;
560
561    int info_block_size = roundUp(base_info_block_size, align);
562
563    int info_block_padding = info_block_size - base_info_block_size;
564
565    //Each auxilliary vector is two 8 byte words
566    int aux_array_size = intSize * 2 * (auxv.size() + 1);
567
568    int envp_array_size = intSize * (envp.size() + 1);
569    int argv_array_size = intSize * (argv.size() + 1);
570
571    int argc_size = intSize;
572
573    //Figure out the size of the contents of the actual initial frame
574    int frame_size =
575        aux_array_size +
576        envp_array_size +
577        argv_array_size +
578        argc_size;
579
580    //There needs to be padding after the auxiliary vector data so that the
581    //very bottom of the stack is aligned properly.
582    int partial_size = frame_size + aux_data_size;
583    int aligned_partial_size = roundUp(partial_size, align);
584    int aux_padding = aligned_partial_size - partial_size;
585
586    int space_needed =
587        info_block_size +
588        aux_data_size +
589        aux_padding +
590        frame_size;
591
592    stack_min = stack_base - space_needed;
593    stack_min = roundDown(stack_min, align);
594    stack_size = stack_base - stack_min;
595
596    // map memory
597    pTable->allocate(roundDown(stack_min, pageSize),
598                     roundUp(stack_size, pageSize));
599
600    // map out initial stack contents
601    IntType sentry_base = stack_base - sentry_size;
602    IntType file_name_base = sentry_base - file_name_size;
603    IntType env_data_base = file_name_base - env_data_size;
604    IntType arg_data_base = env_data_base - arg_data_size;
605    IntType aux_data_base = arg_data_base - info_block_padding - aux_data_size;
606    IntType auxv_array_base = aux_data_base - aux_array_size - aux_padding;
607    IntType envp_array_base = auxv_array_base - envp_array_size;
608    IntType argv_array_base = envp_array_base - argv_array_size;
609    IntType argc_base = argv_array_base - argc_size;
610
611    DPRINTF(Stack, "The addresses of items on the initial stack:\n");
612    DPRINTF(Stack, "0x%x - file name\n", file_name_base);
613    DPRINTF(Stack, "0x%x - env data\n", env_data_base);
614    DPRINTF(Stack, "0x%x - arg data\n", arg_data_base);
615    DPRINTF(Stack, "0x%x - aux data\n", aux_data_base);
616    DPRINTF(Stack, "0x%x - auxv array\n", auxv_array_base);
617    DPRINTF(Stack, "0x%x - envp array\n", envp_array_base);
618    DPRINTF(Stack, "0x%x - argv array\n", argv_array_base);
619    DPRINTF(Stack, "0x%x - argc \n", argc_base);
620    DPRINTF(Stack, "0x%x - stack min\n", stack_min);
621
622    // write contents to stack
623
624    // figure out argc
625    IntType argc = argv.size();
626    IntType guestArgc = X86ISA::htog(argc);
627
628    //Write out the sentry void *
629    IntType sentry_NULL = 0;
630    initVirtMem->writeBlob(sentry_base,
631            (uint8_t*)&sentry_NULL, sentry_size);
632
633    //Write the file name
634    initVirtMem->writeString(file_name_base, filename.c_str());
635
636    //Fix up the aux vector which points to the "platform" string
637    assert(auxv[auxv.size() - 1].a_type = M5_AT_PLATFORM);
638    auxv[auxv.size() - 1].a_val = aux_data_base;
639
640    //Copy the aux stuff
641    for(int x = 0; x < auxv.size(); x++)
642    {
643        initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize,
644                (uint8_t*)&(auxv[x].a_type), intSize);
645        initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
646                (uint8_t*)&(auxv[x].a_val), intSize);
647    }
648    //Write out the terminating zeroed auxilliary vector
649    const uint64_t zero = 0;
650    initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(),
651            (uint8_t*)&zero, 2 * intSize);
652
653    initVirtMem->writeString(aux_data_base, platform.c_str());
654
655    copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
656    copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
657
658    initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
659
660    ThreadContext *tc = system->getThreadContext(contextIds[0]);
661    //Set the stack pointer register
662    tc->setIntReg(StackPointerReg, stack_min);
663
664    Addr prog_entry = objFile->entryPoint();
665    // There doesn't need to be any segment base added in since we're dealing
666    // with the flat segmentation model.
667    tc->setPC(prog_entry);
668    tc->setNextPC(prog_entry + sizeof(MachInst));
669
670    //Align the "stack_min" to a page boundary.
671    stack_min = roundDown(stack_min, pageSize);
672
673//    num_processes++;
674}
675
676void
677X86_64LiveProcess::argsInit(int intSize, int pageSize)
678{
679    std::vector<AuxVector<uint64_t> > extraAuxvs;
680    X86LiveProcess::argsInit<uint64_t>(pageSize, extraAuxvs);
681}
682
683void
684I386LiveProcess::argsInit(int intSize, int pageSize)
685{
686    std::vector<AuxVector<uint32_t> > extraAuxvs;
687    //Tell the binary where the vsyscall part of the vsyscall page is.
688    extraAuxvs.push_back(AuxVector<uint32_t>(0x20,
689                vsyscallPage.base + vsyscallPage.vsyscallOffset));
690    extraAuxvs.push_back(AuxVector<uint32_t>(0x21, vsyscallPage.base));
691    X86LiveProcess::argsInit<uint32_t>(pageSize, extraAuxvs);
692}
693
694void
695X86LiveProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn return_value)
696{
697    tc->setIntReg(INTREG_RAX, return_value.value());
698}
699
700X86ISA::IntReg
701X86_64LiveProcess::getSyscallArg(ThreadContext *tc, int &i)
702{
703    assert(i < NumArgumentRegs);
704    return tc->readIntReg(ArgumentReg[i++]);
705}
706
707void
708X86_64LiveProcess::setSyscallArg(ThreadContext *tc, int i, X86ISA::IntReg val)
709{
710    assert(i < NumArgumentRegs);
711    return tc->setIntReg(ArgumentReg[i], val);
712}
713
714X86ISA::IntReg
715I386LiveProcess::getSyscallArg(ThreadContext *tc, int &i)
716{
717    assert(i < NumArgumentRegs32);
718    return tc->readIntReg(ArgumentReg32[i++]);
719}
720
721X86ISA::IntReg
722I386LiveProcess::getSyscallArg(ThreadContext *tc, int &i, int width)
723{
724    assert(width == 32 || width == 64);
725    assert(i < NumArgumentRegs);
726    uint64_t retVal = tc->readIntReg(ArgumentReg32[i++]) & mask(32);
727    if (width == 64)
728        retVal |= ((uint64_t)tc->readIntReg(ArgumentReg[i++]) << 32);
729    return retVal;
730}
731
732void
733I386LiveProcess::setSyscallArg(ThreadContext *tc, int i, X86ISA::IntReg val)
734{
735    assert(i < NumArgumentRegs);
736    return tc->setIntReg(ArgumentReg[i], val);
737}
738