process.cc revision 4856:2bd640bcb025
114028Sgiacomo.gabrielli@arm.com/* 214028Sgiacomo.gabrielli@arm.com * Copyright (c) 2003-2006 The Regents of The University of Michigan 314028Sgiacomo.gabrielli@arm.com * All rights reserved. 414028Sgiacomo.gabrielli@arm.com * 514028Sgiacomo.gabrielli@arm.com * Redistribution and use in source and binary forms, with or without 614028Sgiacomo.gabrielli@arm.com * modification, are permitted provided that the following conditions are 714028Sgiacomo.gabrielli@arm.com * met: redistributions of source code must retain the above copyright 814028Sgiacomo.gabrielli@arm.com * notice, this list of conditions and the following disclaimer; 914028Sgiacomo.gabrielli@arm.com * redistributions in binary form must reproduce the above copyright 1014028Sgiacomo.gabrielli@arm.com * notice, this list of conditions and the following disclaimer in the 1114028Sgiacomo.gabrielli@arm.com * documentation and/or other materials provided with the distribution; 1214028Sgiacomo.gabrielli@arm.com * neither the name of the copyright holders nor the names of its 1314028Sgiacomo.gabrielli@arm.com * contributors may be used to endorse or promote products derived from 1414028Sgiacomo.gabrielli@arm.com * this software without specific prior written permission. 1514028Sgiacomo.gabrielli@arm.com * 1614028Sgiacomo.gabrielli@arm.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1714028Sgiacomo.gabrielli@arm.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1814028Sgiacomo.gabrielli@arm.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 1914028Sgiacomo.gabrielli@arm.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2014028Sgiacomo.gabrielli@arm.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2114028Sgiacomo.gabrielli@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2214028Sgiacomo.gabrielli@arm.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2314028Sgiacomo.gabrielli@arm.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2414028Sgiacomo.gabrielli@arm.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2514028Sgiacomo.gabrielli@arm.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2614028Sgiacomo.gabrielli@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2714028Sgiacomo.gabrielli@arm.com * 2814028Sgiacomo.gabrielli@arm.com * Authors: Gabe Black 2914028Sgiacomo.gabrielli@arm.com * Ali Saidi 3014028Sgiacomo.gabrielli@arm.com */ 3114028Sgiacomo.gabrielli@arm.com 3214028Sgiacomo.gabrielli@arm.com/* 3314028Sgiacomo.gabrielli@arm.com * Copyright (c) 2007 The Hewlett-Packard Development Company 3414028Sgiacomo.gabrielli@arm.com * All rights reserved. 3514028Sgiacomo.gabrielli@arm.com * 3614028Sgiacomo.gabrielli@arm.com * Redistribution and use of this software in source and binary forms, 3714028Sgiacomo.gabrielli@arm.com * with or without modification, are permitted provided that the 3814028Sgiacomo.gabrielli@arm.com * following conditions are met: 3914028Sgiacomo.gabrielli@arm.com * 4014028Sgiacomo.gabrielli@arm.com * The software must be used only for Non-Commercial Use which means any 4114028Sgiacomo.gabrielli@arm.com * use which is NOT directed to receiving any direct monetary 4214028Sgiacomo.gabrielli@arm.com * compensation for, or commercial advantage from such use. Illustrative 4314028Sgiacomo.gabrielli@arm.com * examples of non-commercial use are academic research, personal study, 4414028Sgiacomo.gabrielli@arm.com * teaching, education and corporate research & development. 4514028Sgiacomo.gabrielli@arm.com * Illustrative examples of commercial use are distributing products for 4614028Sgiacomo.gabrielli@arm.com * commercial advantage and providing services using the software for 4714028Sgiacomo.gabrielli@arm.com * commercial advantage. 4814028Sgiacomo.gabrielli@arm.com * 4914028Sgiacomo.gabrielli@arm.com * If you wish to use this software or functionality therein that may be 5014028Sgiacomo.gabrielli@arm.com * covered by patents for commercial use, please contact: 5114028Sgiacomo.gabrielli@arm.com * Director of Intellectual Property Licensing 5214028Sgiacomo.gabrielli@arm.com * Office of Strategy and Technology 5314028Sgiacomo.gabrielli@arm.com * Hewlett-Packard Company 5414028Sgiacomo.gabrielli@arm.com * 1501 Page Mill Road 5514028Sgiacomo.gabrielli@arm.com * Palo Alto, California 94304 5614028Sgiacomo.gabrielli@arm.com * 5714028Sgiacomo.gabrielli@arm.com * Redistributions of source code must retain the above copyright notice, 5814028Sgiacomo.gabrielli@arm.com * this list of conditions and the following disclaimer. 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IN NO EVENT SHALL THE COPYRIGHT 7814028Sgiacomo.gabrielli@arm.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 7914028Sgiacomo.gabrielli@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 8014028Sgiacomo.gabrielli@arm.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 8114028Sgiacomo.gabrielli@arm.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 8214028Sgiacomo.gabrielli@arm.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 8314028Sgiacomo.gabrielli@arm.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 8414028Sgiacomo.gabrielli@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 8514028Sgiacomo.gabrielli@arm.com * 8614028Sgiacomo.gabrielli@arm.com * Authors: Gabe Black 8714028Sgiacomo.gabrielli@arm.com */ 8814028Sgiacomo.gabrielli@arm.com 8914028Sgiacomo.gabrielli@arm.com#include "arch/x86/isa_traits.hh" 9014028Sgiacomo.gabrielli@arm.com#include "arch/x86/process.hh" 9114028Sgiacomo.gabrielli@arm.com#include "arch/x86/types.hh" 9214028Sgiacomo.gabrielli@arm.com#include "base/loader/object_file.hh" 9314028Sgiacomo.gabrielli@arm.com#include "base/loader/elf_object.hh" 9414028Sgiacomo.gabrielli@arm.com#include "base/misc.hh" 9514028Sgiacomo.gabrielli@arm.com#include "cpu/thread_context.hh" 9614028Sgiacomo.gabrielli@arm.com#include "mem/page_table.hh" 9714028Sgiacomo.gabrielli@arm.com#include "mem/translating_port.hh" 9814028Sgiacomo.gabrielli@arm.com#include "sim/process_impl.hh" 9914028Sgiacomo.gabrielli@arm.com#include "sim/system.hh" 10014028Sgiacomo.gabrielli@arm.com 10114028Sgiacomo.gabrielli@arm.comusing namespace std; 10214028Sgiacomo.gabrielli@arm.comusing namespace X86ISA; 10314028Sgiacomo.gabrielli@arm.com 10414028Sgiacomo.gabrielli@arm.comM5_64_auxv_t::M5_64_auxv_t(int64_t type, int64_t val) 10514028Sgiacomo.gabrielli@arm.com{ 10614028Sgiacomo.gabrielli@arm.com a_type = TheISA::htog(type); 10714028Sgiacomo.gabrielli@arm.com a_val = TheISA::htog(val); 10814028Sgiacomo.gabrielli@arm.com} 10914028Sgiacomo.gabrielli@arm.com 11014028Sgiacomo.gabrielli@arm.comX86LiveProcess::X86LiveProcess(const std::string &nm, ObjectFile *objFile, 11114028Sgiacomo.gabrielli@arm.com System *_system, int stdin_fd, int stdout_fd, int stderr_fd, 11214028Sgiacomo.gabrielli@arm.com std::vector<std::string> &argv, std::vector<std::string> &envp, 11314028Sgiacomo.gabrielli@arm.com const std::string &cwd, 11414028Sgiacomo.gabrielli@arm.com uint64_t _uid, uint64_t _euid, uint64_t _gid, uint64_t _egid, 11514028Sgiacomo.gabrielli@arm.com uint64_t _pid, uint64_t _ppid) 11614028Sgiacomo.gabrielli@arm.com : LiveProcess(nm, objFile, _system, stdin_fd, stdout_fd, stderr_fd, 11714028Sgiacomo.gabrielli@arm.com argv, envp, cwd, _uid, _euid, _gid, _egid, _pid, _ppid) 11814028Sgiacomo.gabrielli@arm.com{ 11914028Sgiacomo.gabrielli@arm.com brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize(); 12014028Sgiacomo.gabrielli@arm.com brk_point = roundUp(brk_point, VMPageSize); 12114028Sgiacomo.gabrielli@arm.com 12214028Sgiacomo.gabrielli@arm.com // Set pointer for next thread stack. Reserve 8M for main stack. 12314028Sgiacomo.gabrielli@arm.com next_thread_stack_base = stack_base - (8 * 1024 * 1024); 12414028Sgiacomo.gabrielli@arm.com 12514028Sgiacomo.gabrielli@arm.com // Set up stack. On X86_64 Linux, stack goes from the top of memory 12614028Sgiacomo.gabrielli@arm.com // downward, less the hole for the kernel address space plus one page 12714028Sgiacomo.gabrielli@arm.com // for undertermined purposes. 12814028Sgiacomo.gabrielli@arm.com stack_base = (Addr)0x7FFFFFFFF000ULL; 12914028Sgiacomo.gabrielli@arm.com 13014028Sgiacomo.gabrielli@arm.com // Set up region for mmaps. This was determined empirically and may not 13114028Sgiacomo.gabrielli@arm.com // always be correct. 13214028Sgiacomo.gabrielli@arm.com mmap_start = mmap_end = 0x2aaaaaaab000; 13314028Sgiacomo.gabrielli@arm.com} 13414028Sgiacomo.gabrielli@arm.com 13514028Sgiacomo.gabrielli@arm.comvoid X86LiveProcess::handleTrap(int trapNum, ThreadContext *tc) 13614028Sgiacomo.gabrielli@arm.com{ 13714028Sgiacomo.gabrielli@arm.com switch(trapNum) 13814028Sgiacomo.gabrielli@arm.com { 13914028Sgiacomo.gabrielli@arm.com default: 14014028Sgiacomo.gabrielli@arm.com panic("Unimplemented trap to operating system: trap number %#x.\n", trapNum); 14114028Sgiacomo.gabrielli@arm.com } 14214028Sgiacomo.gabrielli@arm.com} 14314028Sgiacomo.gabrielli@arm.com 14414028Sgiacomo.gabrielli@arm.comvoid 14514028Sgiacomo.gabrielli@arm.comX86LiveProcess::startup() 14614028Sgiacomo.gabrielli@arm.com{ 14714028Sgiacomo.gabrielli@arm.com argsInit(sizeof(IntReg), VMPageSize); 14814028Sgiacomo.gabrielli@arm.com 14914028Sgiacomo.gabrielli@arm.com //The AMD64 abi says that only rsp and rdx are defined at process 15014028Sgiacomo.gabrielli@arm.com //startup. rsp will be set by argsInit, and I don't understand what 15114028Sgiacomo.gabrielli@arm.com //rdx should be set to. The other floating point and integer registers 15214028Sgiacomo.gabrielli@arm.com //will be zeroed by the register file constructors, but control registers 15314028Sgiacomo.gabrielli@arm.com //should be initialized here. Since none of those are implemented, there 15414028Sgiacomo.gabrielli@arm.com //isn't anything here. 15514028Sgiacomo.gabrielli@arm.com} 15614028Sgiacomo.gabrielli@arm.com 15714028Sgiacomo.gabrielli@arm.comvoid 15814028Sgiacomo.gabrielli@arm.comX86LiveProcess::argsInit(int intSize, int pageSize) 15914028Sgiacomo.gabrielli@arm.com{ 16014028Sgiacomo.gabrielli@arm.com typedef M5_64_auxv_t auxv_t; 16114028Sgiacomo.gabrielli@arm.com Process::startup(); 16214028Sgiacomo.gabrielli@arm.com 16314028Sgiacomo.gabrielli@arm.com string filename; 16414028Sgiacomo.gabrielli@arm.com if(argv.size() < 1) 16514028Sgiacomo.gabrielli@arm.com filename = ""; 16614028Sgiacomo.gabrielli@arm.com else 16714028Sgiacomo.gabrielli@arm.com filename = argv[0]; 16814028Sgiacomo.gabrielli@arm.com 16914028Sgiacomo.gabrielli@arm.com //We want 16 byte alignment 17014028Sgiacomo.gabrielli@arm.com uint64_t align = 16; 17114028Sgiacomo.gabrielli@arm.com 17214028Sgiacomo.gabrielli@arm.com // load object file into target memory 17314028Sgiacomo.gabrielli@arm.com objFile->loadSections(initVirtMem); 17414028Sgiacomo.gabrielli@arm.com 17514028Sgiacomo.gabrielli@arm.com enum X86CpuFeature { 17614028Sgiacomo.gabrielli@arm.com X86_OnboardFPU = 1 << 0, 17714028Sgiacomo.gabrielli@arm.com X86_VirtualModeExtensions = 1 << 1, 17814028Sgiacomo.gabrielli@arm.com X86_DebuggingExtensions = 1 << 2, 17914028Sgiacomo.gabrielli@arm.com X86_PageSizeExtensions = 1 << 3, 18014028Sgiacomo.gabrielli@arm.com 18114028Sgiacomo.gabrielli@arm.com X86_TimeStampCounter = 1 << 4, 18214028Sgiacomo.gabrielli@arm.com X86_ModelSpecificRegisters = 1 << 5, 18314028Sgiacomo.gabrielli@arm.com X86_PhysicalAddressExtensions = 1 << 6, 18414028Sgiacomo.gabrielli@arm.com X86_MachineCheckExtensions = 1 << 7, 18514028Sgiacomo.gabrielli@arm.com 18614028Sgiacomo.gabrielli@arm.com X86_CMPXCHG8Instruction = 1 << 8, 18714028Sgiacomo.gabrielli@arm.com X86_OnboardAPIC = 1 << 9, 18814028Sgiacomo.gabrielli@arm.com X86_SYSENTER_SYSEXIT = 1 << 11, 18914028Sgiacomo.gabrielli@arm.com 19014028Sgiacomo.gabrielli@arm.com X86_MemoryTypeRangeRegisters = 1 << 12, 19114028Sgiacomo.gabrielli@arm.com X86_PageGlobalEnable = 1 << 13, 19214028Sgiacomo.gabrielli@arm.com X86_MachineCheckArchitecture = 1 << 14, 19314028Sgiacomo.gabrielli@arm.com X86_CMOVInstruction = 1 << 15, 19414028Sgiacomo.gabrielli@arm.com 19514028Sgiacomo.gabrielli@arm.com X86_PageAttributeTable = 1 << 16, 19614028Sgiacomo.gabrielli@arm.com X86_36BitPSEs = 1 << 17, 19714028Sgiacomo.gabrielli@arm.com X86_ProcessorSerialNumber = 1 << 18, 19814028Sgiacomo.gabrielli@arm.com X86_CLFLUSHInstruction = 1 << 19, 19914028Sgiacomo.gabrielli@arm.com 20014028Sgiacomo.gabrielli@arm.com X86_DebugTraceStore = 1 << 21, 20114028Sgiacomo.gabrielli@arm.com X86_ACPIViaMSR = 1 << 22, 20214028Sgiacomo.gabrielli@arm.com X86_MultimediaExtensions = 1 << 23, 20314028Sgiacomo.gabrielli@arm.com 20414028Sgiacomo.gabrielli@arm.com X86_FXSAVE_FXRSTOR = 1 << 24, 20514028Sgiacomo.gabrielli@arm.com X86_StreamingSIMDExtensions = 1 << 25, 20614028Sgiacomo.gabrielli@arm.com X86_StreamingSIMDExtensions2 = 1 << 26, 20714028Sgiacomo.gabrielli@arm.com X86_CPUSelfSnoop = 1 << 27, 20814028Sgiacomo.gabrielli@arm.com 20914028Sgiacomo.gabrielli@arm.com X86_HyperThreading = 1 << 28, 21014028Sgiacomo.gabrielli@arm.com X86_AutomaticClockControl = 1 << 29, 21114028Sgiacomo.gabrielli@arm.com X86_IA64Processor = 1 << 30 21214028Sgiacomo.gabrielli@arm.com }; 21314028Sgiacomo.gabrielli@arm.com 21414028Sgiacomo.gabrielli@arm.com //Setup the auxilliary vectors. These will already have endian conversion. 21514028Sgiacomo.gabrielli@arm.com //Auxilliary vectors are loaded only for elf formatted executables. 21614028Sgiacomo.gabrielli@arm.com ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile); 21714028Sgiacomo.gabrielli@arm.com if(elfObject) 21814028Sgiacomo.gabrielli@arm.com { 21914028Sgiacomo.gabrielli@arm.com uint64_t features = 22014028Sgiacomo.gabrielli@arm.com X86_OnboardFPU | 22114028Sgiacomo.gabrielli@arm.com X86_VirtualModeExtensions | 22214028Sgiacomo.gabrielli@arm.com X86_DebuggingExtensions | 22314028Sgiacomo.gabrielli@arm.com X86_PageSizeExtensions | 22414028Sgiacomo.gabrielli@arm.com X86_TimeStampCounter | 225 X86_ModelSpecificRegisters | 226 X86_PhysicalAddressExtensions | 227 X86_MachineCheckExtensions | 228 X86_CMPXCHG8Instruction | 229 X86_OnboardAPIC | 230 X86_SYSENTER_SYSEXIT | 231 X86_MemoryTypeRangeRegisters | 232 X86_PageGlobalEnable | 233 X86_MachineCheckArchitecture | 234 X86_CMOVInstruction | 235 X86_PageAttributeTable | 236 X86_36BitPSEs | 237// X86_ProcessorSerialNumber | 238 X86_CLFLUSHInstruction | 239// X86_DebugTraceStore | 240// X86_ACPIViaMSR | 241 X86_MultimediaExtensions | 242 X86_FXSAVE_FXRSTOR | 243 X86_StreamingSIMDExtensions | 244 X86_StreamingSIMDExtensions2 | 245// X86_CPUSelfSnoop | 246// X86_HyperThreading | 247// X86_AutomaticClockControl | 248// X86_IA64Processor | 249 0; 250 251 //Bits which describe the system hardware capabilities 252 //XXX Figure out what these should be 253 auxv.push_back(auxv_t(M5_AT_HWCAP, features)); 254 //The system page size 255 auxv.push_back(auxv_t(M5_AT_PAGESZ, X86ISA::VMPageSize)); 256 //Frequency at which times() increments 257 auxv.push_back(auxv_t(M5_AT_CLKTCK, 100)); 258 // For statically linked executables, this is the virtual address of the 259 // program header tables if they appear in the executable image 260 auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable())); 261 // This is the size of a program header entry from the elf file. 262 auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize())); 263 // This is the number of program headers from the original elf file. 264 auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount())); 265 //Defined to be 100 in the kernel source. 266 //This is the address of the elf "interpreter", It should be set 267 //to 0 for regular executables. It should be something else 268 //(not sure what) for dynamic libraries. 269 auxv.push_back(auxv_t(M5_AT_BASE, 0)); 270 271 //XXX Figure out what this should be. 272 auxv.push_back(auxv_t(M5_AT_FLAGS, 0)); 273 //The entry point to the program 274 auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint())); 275 //Different user and group IDs 276 auxv.push_back(auxv_t(M5_AT_UID, uid())); 277 auxv.push_back(auxv_t(M5_AT_EUID, euid())); 278 auxv.push_back(auxv_t(M5_AT_GID, gid())); 279 auxv.push_back(auxv_t(M5_AT_EGID, egid())); 280 //Whether to enable "secure mode" in the executable 281 auxv.push_back(auxv_t(M5_AT_SECURE, 0)); 282 //The string "x86_64" with unknown meaning 283 auxv.push_back(auxv_t(M5_AT_PLATFORM, 0)); 284 } 285 286 //Figure out how big the initial stack needs to be 287 288 // A sentry NULL void pointer at the top of the stack. 289 int sentry_size = intSize; 290 291 //This is the name of the file which is present on the initial stack 292 //It's purpose is to let the user space linker examine the original file. 293 int file_name_size = filename.size() + 1; 294 295 string platform = "x86_64"; 296 int aux_data_size = platform.size() + 1; 297 298 int env_data_size = 0; 299 for (int i = 0; i < envp.size(); ++i) { 300 env_data_size += envp[i].size() + 1; 301 } 302 int arg_data_size = 0; 303 for (int i = 0; i < argv.size(); ++i) { 304 arg_data_size += argv[i].size() + 1; 305 } 306 307 //The info_block needs to be padded so it's size is a multiple of the 308 //alignment mask. Also, it appears that there needs to be at least some 309 //padding, so if the size is already a multiple, we need to increase it 310 //anyway. 311 int base_info_block_size = 312 sentry_size + file_name_size + env_data_size + arg_data_size; 313 314 int info_block_size = roundUp(base_info_block_size, align); 315 316 int info_block_padding = info_block_size - base_info_block_size; 317 318 //Each auxilliary vector is two 8 byte words 319 int aux_array_size = intSize * 2 * (auxv.size() + 1); 320 321 int envp_array_size = intSize * (envp.size() + 1); 322 int argv_array_size = intSize * (argv.size() + 1); 323 324 int argc_size = intSize; 325 326 //Figure out the size of the contents of the actual initial frame 327 int frame_size = 328 aux_array_size + 329 envp_array_size + 330 argv_array_size + 331 argc_size; 332 333 //There needs to be padding after the auxiliary vector data so that the 334 //very bottom of the stack is aligned properly. 335 int partial_size = frame_size + aux_data_size; 336 int aligned_partial_size = roundUp(partial_size, align); 337 int aux_padding = aligned_partial_size - partial_size; 338 339 int space_needed = 340 info_block_size + 341 aux_data_size + 342 aux_padding + 343 frame_size; 344 345 stack_min = stack_base - space_needed; 346 stack_min = roundDown(stack_min, align); 347 stack_size = stack_base - stack_min; 348 349 // map memory 350 pTable->allocate(roundDown(stack_min, pageSize), 351 roundUp(stack_size, pageSize)); 352 353 // map out initial stack contents 354 Addr sentry_base = stack_base - sentry_size; 355 Addr file_name_base = sentry_base - file_name_size; 356 Addr env_data_base = file_name_base - env_data_size; 357 Addr arg_data_base = env_data_base - arg_data_size; 358 Addr aux_data_base = arg_data_base - info_block_padding - aux_data_size; 359 Addr auxv_array_base = aux_data_base - aux_array_size - aux_padding; 360 Addr envp_array_base = auxv_array_base - envp_array_size; 361 Addr argv_array_base = envp_array_base - argv_array_size; 362 Addr argc_base = argv_array_base - argc_size; 363 364 DPRINTF(X86, "The addresses of items on the initial stack:\n"); 365 DPRINTF(X86, "0x%x - file name\n", file_name_base); 366 DPRINTF(X86, "0x%x - env data\n", env_data_base); 367 DPRINTF(X86, "0x%x - arg data\n", arg_data_base); 368 DPRINTF(X86, "0x%x - aux data\n", aux_data_base); 369 DPRINTF(X86, "0x%x - auxv array\n", auxv_array_base); 370 DPRINTF(X86, "0x%x - envp array\n", envp_array_base); 371 DPRINTF(X86, "0x%x - argv array\n", argv_array_base); 372 DPRINTF(X86, "0x%x - argc \n", argc_base); 373 DPRINTF(X86, "0x%x - stack min\n", stack_min); 374 375 // write contents to stack 376 377 // figure out argc 378 uint64_t argc = argv.size(); 379 uint64_t guestArgc = TheISA::htog(argc); 380 381 //Write out the sentry void * 382 uint64_t sentry_NULL = 0; 383 initVirtMem->writeBlob(sentry_base, 384 (uint8_t*)&sentry_NULL, sentry_size); 385 386 //Write the file name 387 initVirtMem->writeString(file_name_base, filename.c_str()); 388 389 //Fix up the aux vector which points to the "platform" string 390 assert(auxv[auxv.size() - 1].a_type = M5_AT_PLATFORM); 391 auxv[auxv.size() - 1].a_val = aux_data_base; 392 393 //Copy the aux stuff 394 for(int x = 0; x < auxv.size(); x++) 395 { 396 initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize, 397 (uint8_t*)&(auxv[x].a_type), intSize); 398 initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize, 399 (uint8_t*)&(auxv[x].a_val), intSize); 400 } 401 //Write out the terminating zeroed auxilliary vector 402 const uint64_t zero = 0; 403 initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(), 404 (uint8_t*)&zero, 2 * intSize); 405 406 initVirtMem->writeString(aux_data_base, platform.c_str()); 407 408 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem); 409 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem); 410 411 initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize); 412 413 //Set the stack pointer register 414 threadContexts[0]->setIntReg(StackPointerReg, stack_min); 415 416 Addr prog_entry = objFile->entryPoint(); 417 threadContexts[0]->setPC(prog_entry); 418 threadContexts[0]->setNextPC(prog_entry + sizeof(MachInst)); 419 420 //Align the "stack_min" to a page boundary. 421 stack_min = roundDown(stack_min, pageSize); 422 423// num_processes++; 424} 425