process.cc revision 7532
15390SN/A/* 25390SN/A * Copyright (c) 2007 The Hewlett-Packard Development Company 35390SN/A * All rights reserved. 45390SN/A * 55390SN/A * The license below extends only to copyright in the software and shall 65390SN/A * not be construed as granting a license to any other intellectual 75390SN/A * property including but not limited to intellectual property relating 85390SN/A * to a hardware implementation of the functionality of the software 95390SN/A * licensed hereunder. You may use the software subject to the license 105390SN/A * terms below provided that you ensure that this notice is replicated 115390SN/A * unmodified and in its entirety in all distributions of the software, 125390SN/A * modified or unmodified, in source code or in binary form. 135390SN/A * 145390SN/A * Copyright (c) 2003-2006 The Regents of The University of Michigan 155390SN/A * All rights reserved. 165390SN/A * 175390SN/A * Redistribution and use in source and binary forms, with or without 185390SN/A * modification, are permitted provided that the following conditions are 195390SN/A * met: redistributions of source code must retain the above copyright 205390SN/A * notice, this list of conditions and the following disclaimer; 215390SN/A * redistributions in binary form must reproduce the above copyright 225390SN/A * notice, this list of conditions and the following disclaimer in the 235390SN/A * documentation and/or other materials provided with the distribution; 245390SN/A * neither the name of the copyright holders nor the names of its 255390SN/A * contributors may be used to endorse or promote products derived from 265390SN/A * this software without specific prior written permission. 275390SN/A * 285390SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 295390SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 305390SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 315631Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 325630Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 335390SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 345390SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 355390SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 365390SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 375631Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 385631Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 395631Sgblack@eecs.umich.edu * 405631Sgblack@eecs.umich.edu * Authors: Gabe Black 415631Sgblack@eecs.umich.edu * Ali Saidi 425631Sgblack@eecs.umich.edu */ 435631Sgblack@eecs.umich.edu 445631Sgblack@eecs.umich.edu#include "arch/x86/isa_traits.hh" 455631Sgblack@eecs.umich.edu#include "arch/x86/miscregs.hh" 465631Sgblack@eecs.umich.edu#include "arch/x86/process.hh" 475631Sgblack@eecs.umich.edu#include "arch/x86/segmentregs.hh" 485631Sgblack@eecs.umich.edu#include "arch/x86/types.hh" 495631Sgblack@eecs.umich.edu#include "base/loader/object_file.hh" 505631Sgblack@eecs.umich.edu#include "base/loader/elf_object.hh" 515631Sgblack@eecs.umich.edu#include "base/misc.hh" 525631Sgblack@eecs.umich.edu#include "base/trace.hh" 535631Sgblack@eecs.umich.edu#include "cpu/thread_context.hh" 545630Sgblack@eecs.umich.edu#include "mem/page_table.hh" 555390SN/A#include "mem/translating_port.hh" 565390SN/A#include "sim/process_impl.hh" 575390SN/A#include "sim/syscall_emul.hh" 585390SN/A#include "sim/system.hh" 595390SN/A 605631Sgblack@eecs.umich.eduusing namespace std; 615631Sgblack@eecs.umich.eduusing namespace X86ISA; 625631Sgblack@eecs.umich.edu 635631Sgblack@eecs.umich.edustatic const int ArgumentReg[] = { 645631Sgblack@eecs.umich.edu INTREG_RDI, 655631Sgblack@eecs.umich.edu INTREG_RSI, 665631Sgblack@eecs.umich.edu INTREG_RDX, 675631Sgblack@eecs.umich.edu //This argument register is r10 for syscalls and rcx for C. 685631Sgblack@eecs.umich.edu INTREG_R10W, 695631Sgblack@eecs.umich.edu //INTREG_RCX, 705631Sgblack@eecs.umich.edu INTREG_R8W, 715631Sgblack@eecs.umich.edu INTREG_R9W 725631Sgblack@eecs.umich.edu}; 735631Sgblack@eecs.umich.edustatic const int NumArgumentRegs = sizeof(ArgumentReg) / sizeof(const int); 745631Sgblack@eecs.umich.edustatic const int ArgumentReg32[] = { 755631Sgblack@eecs.umich.edu INTREG_EBX, 765631Sgblack@eecs.umich.edu INTREG_ECX, 775631Sgblack@eecs.umich.edu INTREG_EDX, 785631Sgblack@eecs.umich.edu INTREG_ESI, 795631Sgblack@eecs.umich.edu INTREG_EDI, 805631Sgblack@eecs.umich.edu}; 815631Sgblack@eecs.umich.edustatic const int NumArgumentRegs32 = sizeof(ArgumentReg) / sizeof(const int); 825631Sgblack@eecs.umich.edu 835631Sgblack@eecs.umich.eduX86LiveProcess::X86LiveProcess(LiveProcessParams * params, ObjectFile *objFile, 845631Sgblack@eecs.umich.edu SyscallDesc *_syscallDescs, int _numSyscallDescs) : 855631Sgblack@eecs.umich.edu LiveProcess(params, objFile), syscallDescs(_syscallDescs), 865631Sgblack@eecs.umich.edu numSyscallDescs(_numSyscallDescs) 875631Sgblack@eecs.umich.edu{ 885631Sgblack@eecs.umich.edu brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize(); 895631Sgblack@eecs.umich.edu brk_point = roundUp(brk_point, VMPageSize); 905631Sgblack@eecs.umich.edu} 915631Sgblack@eecs.umich.edu 925631Sgblack@eecs.umich.eduX86_64LiveProcess::X86_64LiveProcess(LiveProcessParams *params, 935631Sgblack@eecs.umich.edu ObjectFile *objFile, SyscallDesc *_syscallDescs, 945631Sgblack@eecs.umich.edu int _numSyscallDescs) : 955631Sgblack@eecs.umich.edu X86LiveProcess(params, objFile, _syscallDescs, _numSyscallDescs) 965631Sgblack@eecs.umich.edu{ 975631Sgblack@eecs.umich.edu 985631Sgblack@eecs.umich.edu vsyscallPage.base = 0xffffffffff600000ULL; 995631Sgblack@eecs.umich.edu vsyscallPage.size = VMPageSize; 1005631Sgblack@eecs.umich.edu vsyscallPage.vtimeOffset = 0x400; 1015631Sgblack@eecs.umich.edu vsyscallPage.vgettimeofdayOffset = 0x410; 1025631Sgblack@eecs.umich.edu 1035631Sgblack@eecs.umich.edu // Set up stack. On X86_64 Linux, stack goes from the top of memory 1045631Sgblack@eecs.umich.edu // downward, less the hole for the kernel address space plus one page 1055631Sgblack@eecs.umich.edu // for undertermined purposes. 1065631Sgblack@eecs.umich.edu stack_base = (Addr)0x7FFFFFFFF000ULL; 1075631Sgblack@eecs.umich.edu 1085631Sgblack@eecs.umich.edu // Set pointer for next thread stack. Reserve 8M for main stack. 1095631Sgblack@eecs.umich.edu next_thread_stack_base = stack_base - (8 * 1024 * 1024); 1105631Sgblack@eecs.umich.edu 1115631Sgblack@eecs.umich.edu // Set up region for mmaps. This was determined empirically and may not 1125631Sgblack@eecs.umich.edu // always be correct. 1135631Sgblack@eecs.umich.edu mmap_start = mmap_end = (Addr)0x2aaaaaaab000ULL; 1145631Sgblack@eecs.umich.edu} 1155631Sgblack@eecs.umich.edu 1165631Sgblack@eecs.umich.eduvoid 1175631Sgblack@eecs.umich.eduI386LiveProcess::syscall(int64_t callnum, ThreadContext *tc) 1185631Sgblack@eecs.umich.edu{ 1195631Sgblack@eecs.umich.edu Addr eip = tc->readPC(); 1205631Sgblack@eecs.umich.edu if (eip >= vsyscallPage.base && 1215631Sgblack@eecs.umich.edu eip < vsyscallPage.base + vsyscallPage.size) { 1225631Sgblack@eecs.umich.edu tc->setNextPC(vsyscallPage.base + vsyscallPage.vsysexitOffset); 1235631Sgblack@eecs.umich.edu } 1245631Sgblack@eecs.umich.edu X86LiveProcess::syscall(callnum, tc); 1255631Sgblack@eecs.umich.edu} 1265631Sgblack@eecs.umich.edu 1275631Sgblack@eecs.umich.edu 1285631Sgblack@eecs.umich.eduI386LiveProcess::I386LiveProcess(LiveProcessParams *params, 1295631Sgblack@eecs.umich.edu ObjectFile *objFile, SyscallDesc *_syscallDescs, 1305631Sgblack@eecs.umich.edu int _numSyscallDescs) : 1315631Sgblack@eecs.umich.edu X86LiveProcess(params, objFile, _syscallDescs, _numSyscallDescs) 1325631Sgblack@eecs.umich.edu{ 1335631Sgblack@eecs.umich.edu _gdtStart = ULL(0x100000000); 1345631Sgblack@eecs.umich.edu _gdtSize = VMPageSize; 1355631Sgblack@eecs.umich.edu 1365632Sgblack@eecs.umich.edu vsyscallPage.base = 0xffffe000ULL; 1375631Sgblack@eecs.umich.edu vsyscallPage.size = VMPageSize; 1385631Sgblack@eecs.umich.edu vsyscallPage.vsyscallOffset = 0x400; 1395631Sgblack@eecs.umich.edu vsyscallPage.vsysexitOffset = 0x410; 1405631Sgblack@eecs.umich.edu 1415631Sgblack@eecs.umich.edu stack_base = vsyscallPage.base; 1425632Sgblack@eecs.umich.edu 1435631Sgblack@eecs.umich.edu // Set pointer for next thread stack. Reserve 8M for main stack. 1445631Sgblack@eecs.umich.edu next_thread_stack_base = stack_base - (8 * 1024 * 1024); 1455631Sgblack@eecs.umich.edu 1465631Sgblack@eecs.umich.edu // Set up region for mmaps. This was determined empirically and may not 1475631Sgblack@eecs.umich.edu // always be correct. 1485631Sgblack@eecs.umich.edu mmap_start = mmap_end = (Addr)0xf7ffe000ULL; 1495631Sgblack@eecs.umich.edu} 1505631Sgblack@eecs.umich.edu 1515631Sgblack@eecs.umich.eduSyscallDesc* 1525632Sgblack@eecs.umich.eduX86LiveProcess::getDesc(int callnum) 1535631Sgblack@eecs.umich.edu{ 1545631Sgblack@eecs.umich.edu if (callnum < 0 || callnum >= numSyscallDescs) 1555632Sgblack@eecs.umich.edu return NULL; 1565631Sgblack@eecs.umich.edu return &syscallDescs[callnum]; 1575631Sgblack@eecs.umich.edu} 1585631Sgblack@eecs.umich.edu 1595631Sgblack@eecs.umich.eduvoid 1605631Sgblack@eecs.umich.eduX86_64LiveProcess::initState() 1615631Sgblack@eecs.umich.edu{ 1625631Sgblack@eecs.umich.edu X86LiveProcess::initState(); 1635631Sgblack@eecs.umich.edu 1645631Sgblack@eecs.umich.edu argsInit(sizeof(uint64_t), VMPageSize); 1655631Sgblack@eecs.umich.edu 1665631Sgblack@eecs.umich.edu // Set up the vsyscall page for this process. 1675631Sgblack@eecs.umich.edu pTable->allocate(vsyscallPage.base, vsyscallPage.size); 1685631Sgblack@eecs.umich.edu uint8_t vtimeBlob[] = { 1695631Sgblack@eecs.umich.edu 0x48,0xc7,0xc0,0xc9,0x00,0x00,0x00, // mov $0xc9,%rax 1705631Sgblack@eecs.umich.edu 0x0f,0x05, // syscall 1715631Sgblack@eecs.umich.edu 0xc3 // retq 1725631Sgblack@eecs.umich.edu }; 1735631Sgblack@eecs.umich.edu initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vtimeOffset, 1745631Sgblack@eecs.umich.edu vtimeBlob, sizeof(vtimeBlob)); 1755631Sgblack@eecs.umich.edu 1765631Sgblack@eecs.umich.edu uint8_t vgettimeofdayBlob[] = { 1775631Sgblack@eecs.umich.edu 0x48,0xc7,0xc0,0x60,0x00,0x00,0x00, // mov $0x60,%rax 1785631Sgblack@eecs.umich.edu 0x0f,0x05, // syscall 1795631Sgblack@eecs.umich.edu 0xc3 // retq 1805631Sgblack@eecs.umich.edu }; 1815631Sgblack@eecs.umich.edu initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vgettimeofdayOffset, 1825631Sgblack@eecs.umich.edu vgettimeofdayBlob, sizeof(vgettimeofdayBlob)); 1835631Sgblack@eecs.umich.edu 1845630Sgblack@eecs.umich.edu for (int i = 0; i < contextIds.size(); i++) { 1855390SN/A ThreadContext * tc = system->getThreadContext(contextIds[i]); 1865630Sgblack@eecs.umich.edu 1875632Sgblack@eecs.umich.edu SegAttr dataAttr = 0; 1885632Sgblack@eecs.umich.edu dataAttr.dpl = 3; 1895632Sgblack@eecs.umich.edu dataAttr.unusable = 0; 1905632Sgblack@eecs.umich.edu dataAttr.defaultSize = 1; 1915632Sgblack@eecs.umich.edu dataAttr.longMode = 1; 1925632Sgblack@eecs.umich.edu dataAttr.avl = 0; 1935632Sgblack@eecs.umich.edu dataAttr.granularity = 1; 1945632Sgblack@eecs.umich.edu dataAttr.present = 1; 1955632Sgblack@eecs.umich.edu dataAttr.type = 3; 1965632Sgblack@eecs.umich.edu dataAttr.writable = 1; 1975632Sgblack@eecs.umich.edu dataAttr.readable = 1; 1985632Sgblack@eecs.umich.edu dataAttr.expandDown = 0; 1995632Sgblack@eecs.umich.edu dataAttr.system = 1; 2005632Sgblack@eecs.umich.edu 2015630Sgblack@eecs.umich.edu //Initialize the segment registers. 2025630Sgblack@eecs.umich.edu for(int seg = 0; seg < NUM_SEGMENTREGS; seg++) { 2035630Sgblack@eecs.umich.edu tc->setMiscRegNoEffect(MISCREG_SEG_BASE(seg), 0); 2045630Sgblack@eecs.umich.edu tc->setMiscRegNoEffect(MISCREG_SEG_EFF_BASE(seg), 0); 2055630Sgblack@eecs.umich.edu tc->setMiscRegNoEffect(MISCREG_SEG_ATTR(seg), dataAttr); 206 } 207 208 SegAttr csAttr = 0; 209 csAttr.dpl = 3; 210 csAttr.unusable = 0; 211 csAttr.defaultSize = 0; 212 csAttr.longMode = 1; 213 csAttr.avl = 0; 214 csAttr.granularity = 1; 215 csAttr.present = 1; 216 csAttr.type = 10; 217 csAttr.writable = 0; 218 csAttr.readable = 1; 219 csAttr.expandDown = 0; 220 csAttr.system = 1; 221 222 tc->setMiscRegNoEffect(MISCREG_CS_ATTR, csAttr); 223 224 Efer efer = 0; 225 efer.sce = 1; // Enable system call extensions. 226 efer.lme = 1; // Enable long mode. 227 efer.lma = 1; // Activate long mode. 228 efer.nxe = 1; // Enable nx support. 229 efer.svme = 0; // Disable svm support for now. It isn't implemented. 230 efer.ffxsr = 1; // Turn on fast fxsave and fxrstor. 231 tc->setMiscReg(MISCREG_EFER, efer); 232 233 //Set up the registers that describe the operating mode. 234 CR0 cr0 = 0; 235 cr0.pg = 1; // Turn on paging. 236 cr0.cd = 0; // Don't disable caching. 237 cr0.nw = 0; // This is bit is defined to be ignored. 238 cr0.am = 0; // No alignment checking 239 cr0.wp = 0; // Supervisor mode can write read only pages 240 cr0.ne = 1; 241 cr0.et = 1; // This should always be 1 242 cr0.ts = 0; // We don't do task switching, so causing fp exceptions 243 // would be pointless. 244 cr0.em = 0; // Allow x87 instructions to execute natively. 245 cr0.mp = 1; // This doesn't really matter, but the manual suggests 246 // setting it to one. 247 cr0.pe = 1; // We're definitely in protected mode. 248 tc->setMiscReg(MISCREG_CR0, cr0); 249 250 tc->setMiscReg(MISCREG_MXCSR, 0x1f80); 251 } 252} 253 254void 255I386LiveProcess::initState() 256{ 257 X86LiveProcess::initState(); 258 259 argsInit(sizeof(uint32_t), VMPageSize); 260 261 /* 262 * Set up a GDT for this process. The whole GDT wouldn't really be for 263 * this process, but the only parts we care about are. 264 */ 265 pTable->allocate(_gdtStart, _gdtSize); 266 uint64_t zero = 0; 267 assert(_gdtSize % sizeof(zero) == 0); 268 for (Addr gdtCurrent = _gdtStart; 269 gdtCurrent < _gdtStart + _gdtSize; gdtCurrent += sizeof(zero)) { 270 initVirtMem->write(gdtCurrent, zero); 271 } 272 273 // Set up the vsyscall page for this process. 274 pTable->allocate(vsyscallPage.base, vsyscallPage.size); 275 uint8_t vsyscallBlob[] = { 276 0x51, // push %ecx 277 0x52, // push %edp 278 0x55, // push %ebp 279 0x89, 0xe5, // mov %esp, %ebp 280 0x0f, 0x34 // sysenter 281 }; 282 initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vsyscallOffset, 283 vsyscallBlob, sizeof(vsyscallBlob)); 284 285 uint8_t vsysexitBlob[] = { 286 0x5d, // pop %ebp 287 0x5a, // pop %edx 288 0x59, // pop %ecx 289 0xc3 // ret 290 }; 291 initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vsysexitOffset, 292 vsysexitBlob, sizeof(vsysexitBlob)); 293 294 for (int i = 0; i < contextIds.size(); i++) { 295 ThreadContext * tc = system->getThreadContext(contextIds[i]); 296 297 SegAttr dataAttr = 0; 298 dataAttr.dpl = 3; 299 dataAttr.unusable = 0; 300 dataAttr.defaultSize = 1; 301 dataAttr.longMode = 0; 302 dataAttr.avl = 0; 303 dataAttr.granularity = 1; 304 dataAttr.present = 1; 305 dataAttr.type = 3; 306 dataAttr.writable = 1; 307 dataAttr.readable = 1; 308 dataAttr.expandDown = 0; 309 dataAttr.system = 1; 310 311 //Initialize the segment registers. 312 for(int seg = 0; seg < NUM_SEGMENTREGS; seg++) { 313 tc->setMiscRegNoEffect(MISCREG_SEG_BASE(seg), 0); 314 tc->setMiscRegNoEffect(MISCREG_SEG_EFF_BASE(seg), 0); 315 tc->setMiscRegNoEffect(MISCREG_SEG_ATTR(seg), dataAttr); 316 tc->setMiscRegNoEffect(MISCREG_SEG_SEL(seg), 0xB); 317 tc->setMiscRegNoEffect(MISCREG_SEG_LIMIT(seg), (uint32_t)(-1)); 318 } 319 320 SegAttr csAttr = 0; 321 csAttr.dpl = 3; 322 csAttr.unusable = 0; 323 csAttr.defaultSize = 1; 324 csAttr.longMode = 0; 325 csAttr.avl = 0; 326 csAttr.granularity = 1; 327 csAttr.present = 1; 328 csAttr.type = 0xa; 329 csAttr.writable = 0; 330 csAttr.readable = 1; 331 csAttr.expandDown = 0; 332 csAttr.system = 1; 333 334 tc->setMiscRegNoEffect(MISCREG_CS_ATTR, csAttr); 335 336 tc->setMiscRegNoEffect(MISCREG_TSG_BASE, _gdtStart); 337 tc->setMiscRegNoEffect(MISCREG_TSG_EFF_BASE, _gdtStart); 338 tc->setMiscRegNoEffect(MISCREG_TSG_LIMIT, _gdtStart + _gdtSize - 1); 339 340 // Set the LDT selector to 0 to deactivate it. 341 tc->setMiscRegNoEffect(MISCREG_TSL, 0); 342 343 Efer efer = 0; 344 efer.sce = 1; // Enable system call extensions. 345 efer.lme = 1; // Enable long mode. 346 efer.lma = 0; // Deactivate long mode. 347 efer.nxe = 1; // Enable nx support. 348 efer.svme = 0; // Disable svm support for now. It isn't implemented. 349 efer.ffxsr = 1; // Turn on fast fxsave and fxrstor. 350 tc->setMiscReg(MISCREG_EFER, efer); 351 352 //Set up the registers that describe the operating mode. 353 CR0 cr0 = 0; 354 cr0.pg = 1; // Turn on paging. 355 cr0.cd = 0; // Don't disable caching. 356 cr0.nw = 0; // This is bit is defined to be ignored. 357 cr0.am = 0; // No alignment checking 358 cr0.wp = 0; // Supervisor mode can write read only pages 359 cr0.ne = 1; 360 cr0.et = 1; // This should always be 1 361 cr0.ts = 0; // We don't do task switching, so causing fp exceptions 362 // would be pointless. 363 cr0.em = 0; // Allow x87 instructions to execute natively. 364 cr0.mp = 1; // This doesn't really matter, but the manual suggests 365 // setting it to one. 366 cr0.pe = 1; // We're definitely in protected mode. 367 tc->setMiscReg(MISCREG_CR0, cr0); 368 369 tc->setMiscReg(MISCREG_MXCSR, 0x1f80); 370 } 371} 372 373template<class IntType> 374void 375X86LiveProcess::argsInit(int pageSize, 376 std::vector<AuxVector<IntType> > extraAuxvs) 377{ 378 int intSize = sizeof(IntType); 379 380 typedef AuxVector<IntType> auxv_t; 381 std::vector<auxv_t> auxv = extraAuxvs; 382 383 string filename; 384 if(argv.size() < 1) 385 filename = ""; 386 else 387 filename = argv[0]; 388 389 //We want 16 byte alignment 390 uint64_t align = 16; 391 392 // load object file into target memory 393 objFile->loadSections(initVirtMem); 394 395 enum X86CpuFeature { 396 X86_OnboardFPU = 1 << 0, 397 X86_VirtualModeExtensions = 1 << 1, 398 X86_DebuggingExtensions = 1 << 2, 399 X86_PageSizeExtensions = 1 << 3, 400 401 X86_TimeStampCounter = 1 << 4, 402 X86_ModelSpecificRegisters = 1 << 5, 403 X86_PhysicalAddressExtensions = 1 << 6, 404 X86_MachineCheckExtensions = 1 << 7, 405 406 X86_CMPXCHG8Instruction = 1 << 8, 407 X86_OnboardAPIC = 1 << 9, 408 X86_SYSENTER_SYSEXIT = 1 << 11, 409 410 X86_MemoryTypeRangeRegisters = 1 << 12, 411 X86_PageGlobalEnable = 1 << 13, 412 X86_MachineCheckArchitecture = 1 << 14, 413 X86_CMOVInstruction = 1 << 15, 414 415 X86_PageAttributeTable = 1 << 16, 416 X86_36BitPSEs = 1 << 17, 417 X86_ProcessorSerialNumber = 1 << 18, 418 X86_CLFLUSHInstruction = 1 << 19, 419 420 X86_DebugTraceStore = 1 << 21, 421 X86_ACPIViaMSR = 1 << 22, 422 X86_MultimediaExtensions = 1 << 23, 423 424 X86_FXSAVE_FXRSTOR = 1 << 24, 425 X86_StreamingSIMDExtensions = 1 << 25, 426 X86_StreamingSIMDExtensions2 = 1 << 26, 427 X86_CPUSelfSnoop = 1 << 27, 428 429 X86_HyperThreading = 1 << 28, 430 X86_AutomaticClockControl = 1 << 29, 431 X86_IA64Processor = 1 << 30 432 }; 433 434 //Setup the auxilliary vectors. These will already have endian conversion. 435 //Auxilliary vectors are loaded only for elf formatted executables. 436 ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile); 437 if(elfObject) 438 { 439 uint64_t features = 440 X86_OnboardFPU | 441 X86_VirtualModeExtensions | 442 X86_DebuggingExtensions | 443 X86_PageSizeExtensions | 444 X86_TimeStampCounter | 445 X86_ModelSpecificRegisters | 446 X86_PhysicalAddressExtensions | 447 X86_MachineCheckExtensions | 448 X86_CMPXCHG8Instruction | 449 X86_OnboardAPIC | 450 X86_SYSENTER_SYSEXIT | 451 X86_MemoryTypeRangeRegisters | 452 X86_PageGlobalEnable | 453 X86_MachineCheckArchitecture | 454 X86_CMOVInstruction | 455 X86_PageAttributeTable | 456 X86_36BitPSEs | 457// X86_ProcessorSerialNumber | 458 X86_CLFLUSHInstruction | 459// X86_DebugTraceStore | 460// X86_ACPIViaMSR | 461 X86_MultimediaExtensions | 462 X86_FXSAVE_FXRSTOR | 463 X86_StreamingSIMDExtensions | 464 X86_StreamingSIMDExtensions2 | 465// X86_CPUSelfSnoop | 466// X86_HyperThreading | 467// X86_AutomaticClockControl | 468// X86_IA64Processor | 469 0; 470 471 //Bits which describe the system hardware capabilities 472 //XXX Figure out what these should be 473 auxv.push_back(auxv_t(M5_AT_HWCAP, features)); 474 //The system page size 475 auxv.push_back(auxv_t(M5_AT_PAGESZ, X86ISA::VMPageSize)); 476 //Frequency at which times() increments 477 //Defined to be 100 in the kernel source. 478 auxv.push_back(auxv_t(M5_AT_CLKTCK, 100)); 479 // For statically linked executables, this is the virtual address of the 480 // program header tables if they appear in the executable image 481 auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable())); 482 // This is the size of a program header entry from the elf file. 483 auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize())); 484 // This is the number of program headers from the original elf file. 485 auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount())); 486 //This is the address of the elf "interpreter", It should be set 487 //to 0 for regular executables. It should be something else 488 //(not sure what) for dynamic libraries. 489 auxv.push_back(auxv_t(M5_AT_BASE, 0)); 490 491 //XXX Figure out what this should be. 492 auxv.push_back(auxv_t(M5_AT_FLAGS, 0)); 493 //The entry point to the program 494 auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint())); 495 //Different user and group IDs 496 auxv.push_back(auxv_t(M5_AT_UID, uid())); 497 auxv.push_back(auxv_t(M5_AT_EUID, euid())); 498 auxv.push_back(auxv_t(M5_AT_GID, gid())); 499 auxv.push_back(auxv_t(M5_AT_EGID, egid())); 500 //Whether to enable "secure mode" in the executable 501 auxv.push_back(auxv_t(M5_AT_SECURE, 0)); 502 //The address of 16 "random" bytes. 503 auxv.push_back(auxv_t(M5_AT_RANDOM, 0)); 504 //The name of the program 505 auxv.push_back(auxv_t(M5_AT_EXECFN, 0)); 506 //The platform string 507 auxv.push_back(auxv_t(M5_AT_PLATFORM, 0)); 508 } 509 510 //Figure out how big the initial stack needs to be 511 512 // A sentry NULL void pointer at the top of the stack. 513 int sentry_size = intSize; 514 515 //This is the name of the file which is present on the initial stack 516 //It's purpose is to let the user space linker examine the original file. 517 int file_name_size = filename.size() + 1; 518 519 const int numRandomBytes = 16; 520 int aux_data_size = numRandomBytes; 521 522 string platform = "x86_64"; 523 aux_data_size += platform.size() + 1; 524 525 int env_data_size = 0; 526 for (int i = 0; i < envp.size(); ++i) { 527 env_data_size += envp[i].size() + 1; 528 } 529 int arg_data_size = 0; 530 for (int i = 0; i < argv.size(); ++i) { 531 arg_data_size += argv[i].size() + 1; 532 } 533 534 //The info_block needs to be padded so it's size is a multiple of the 535 //alignment mask. Also, it appears that there needs to be at least some 536 //padding, so if the size is already a multiple, we need to increase it 537 //anyway. 538 int base_info_block_size = 539 sentry_size + file_name_size + env_data_size + arg_data_size; 540 541 int info_block_size = roundUp(base_info_block_size, align); 542 543 int info_block_padding = info_block_size - base_info_block_size; 544 545 //Each auxilliary vector is two 8 byte words 546 int aux_array_size = intSize * 2 * (auxv.size() + 1); 547 548 int envp_array_size = intSize * (envp.size() + 1); 549 int argv_array_size = intSize * (argv.size() + 1); 550 551 int argc_size = intSize; 552 553 //Figure out the size of the contents of the actual initial frame 554 int frame_size = 555 aux_array_size + 556 envp_array_size + 557 argv_array_size + 558 argc_size; 559 560 //There needs to be padding after the auxiliary vector data so that the 561 //very bottom of the stack is aligned properly. 562 int partial_size = frame_size + aux_data_size; 563 int aligned_partial_size = roundUp(partial_size, align); 564 int aux_padding = aligned_partial_size - partial_size; 565 566 int space_needed = 567 info_block_size + 568 aux_data_size + 569 aux_padding + 570 frame_size; 571 572 stack_min = stack_base - space_needed; 573 stack_min = roundDown(stack_min, align); 574 stack_size = stack_base - stack_min; 575 576 // map memory 577 pTable->allocate(roundDown(stack_min, pageSize), 578 roundUp(stack_size, pageSize)); 579 580 // map out initial stack contents 581 IntType sentry_base = stack_base - sentry_size; 582 IntType file_name_base = sentry_base - file_name_size; 583 IntType env_data_base = file_name_base - env_data_size; 584 IntType arg_data_base = env_data_base - arg_data_size; 585 IntType aux_data_base = arg_data_base - info_block_padding - aux_data_size; 586 IntType auxv_array_base = aux_data_base - aux_array_size - aux_padding; 587 IntType envp_array_base = auxv_array_base - envp_array_size; 588 IntType argv_array_base = envp_array_base - argv_array_size; 589 IntType argc_base = argv_array_base - argc_size; 590 591 DPRINTF(Stack, "The addresses of items on the initial stack:\n"); 592 DPRINTF(Stack, "0x%x - file name\n", file_name_base); 593 DPRINTF(Stack, "0x%x - env data\n", env_data_base); 594 DPRINTF(Stack, "0x%x - arg data\n", arg_data_base); 595 DPRINTF(Stack, "0x%x - aux data\n", aux_data_base); 596 DPRINTF(Stack, "0x%x - auxv array\n", auxv_array_base); 597 DPRINTF(Stack, "0x%x - envp array\n", envp_array_base); 598 DPRINTF(Stack, "0x%x - argv array\n", argv_array_base); 599 DPRINTF(Stack, "0x%x - argc \n", argc_base); 600 DPRINTF(Stack, "0x%x - stack min\n", stack_min); 601 602 // write contents to stack 603 604 // figure out argc 605 IntType argc = argv.size(); 606 IntType guestArgc = X86ISA::htog(argc); 607 608 //Write out the sentry void * 609 IntType sentry_NULL = 0; 610 initVirtMem->writeBlob(sentry_base, 611 (uint8_t*)&sentry_NULL, sentry_size); 612 613 //Write the file name 614 initVirtMem->writeString(file_name_base, filename.c_str()); 615 616 //Fix up the aux vectors which point to data 617 assert(auxv[auxv.size() - 3].a_type == M5_AT_RANDOM); 618 auxv[auxv.size() - 3].a_val = aux_data_base; 619 assert(auxv[auxv.size() - 2].a_type == M5_AT_EXECFN); 620 auxv[auxv.size() - 2].a_val = argv_array_base; 621 assert(auxv[auxv.size() - 1].a_type == M5_AT_PLATFORM); 622 auxv[auxv.size() - 1].a_val = aux_data_base + numRandomBytes; 623 624 //Copy the aux stuff 625 for(int x = 0; x < auxv.size(); x++) 626 { 627 initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize, 628 (uint8_t*)&(auxv[x].a_type), intSize); 629 initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize, 630 (uint8_t*)&(auxv[x].a_val), intSize); 631 } 632 //Write out the terminating zeroed auxilliary vector 633 const uint64_t zero = 0; 634 initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(), 635 (uint8_t*)&zero, 2 * intSize); 636 637 initVirtMem->writeString(aux_data_base, platform.c_str()); 638 639 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem); 640 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem); 641 642 initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize); 643 644 ThreadContext *tc = system->getThreadContext(contextIds[0]); 645 //Set the stack pointer register 646 tc->setIntReg(StackPointerReg, stack_min); 647 648 Addr prog_entry = objFile->entryPoint(); 649 // There doesn't need to be any segment base added in since we're dealing 650 // with the flat segmentation model. 651 tc->setPC(prog_entry); 652 tc->setNextPC(prog_entry + sizeof(MachInst)); 653 654 //Align the "stack_min" to a page boundary. 655 stack_min = roundDown(stack_min, pageSize); 656 657// num_processes++; 658} 659 660void 661X86_64LiveProcess::argsInit(int intSize, int pageSize) 662{ 663 std::vector<AuxVector<uint64_t> > extraAuxvs; 664 extraAuxvs.push_back(AuxVector<uint64_t>(M5_AT_SYSINFO_EHDR, 665 vsyscallPage.base)); 666 X86LiveProcess::argsInit<uint64_t>(pageSize, extraAuxvs); 667} 668 669void 670I386LiveProcess::argsInit(int intSize, int pageSize) 671{ 672 std::vector<AuxVector<uint32_t> > extraAuxvs; 673 //Tell the binary where the vsyscall part of the vsyscall page is. 674 extraAuxvs.push_back(AuxVector<uint32_t>(M5_AT_SYSINFO, 675 vsyscallPage.base + vsyscallPage.vsyscallOffset)); 676 extraAuxvs.push_back(AuxVector<uint32_t>(M5_AT_SYSINFO_EHDR, 677 vsyscallPage.base)); 678 X86LiveProcess::argsInit<uint32_t>(pageSize, extraAuxvs); 679} 680 681void 682X86LiveProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn return_value) 683{ 684 tc->setIntReg(INTREG_RAX, return_value.value()); 685} 686 687X86ISA::IntReg 688X86_64LiveProcess::getSyscallArg(ThreadContext *tc, int &i) 689{ 690 assert(i < NumArgumentRegs); 691 return tc->readIntReg(ArgumentReg[i++]); 692} 693 694void 695X86_64LiveProcess::setSyscallArg(ThreadContext *tc, int i, X86ISA::IntReg val) 696{ 697 assert(i < NumArgumentRegs); 698 return tc->setIntReg(ArgumentReg[i], val); 699} 700 701X86ISA::IntReg 702I386LiveProcess::getSyscallArg(ThreadContext *tc, int &i) 703{ 704 assert(i < NumArgumentRegs32); 705 return tc->readIntReg(ArgumentReg32[i++]); 706} 707 708X86ISA::IntReg 709I386LiveProcess::getSyscallArg(ThreadContext *tc, int &i, int width) 710{ 711 assert(width == 32 || width == 64); 712 assert(i < NumArgumentRegs); 713 uint64_t retVal = tc->readIntReg(ArgumentReg32[i++]) & mask(32); 714 if (width == 64) 715 retVal |= ((uint64_t)tc->readIntReg(ArgumentReg[i++]) << 32); 716 return retVal; 717} 718 719void 720I386LiveProcess::setSyscallArg(ThreadContext *tc, int i, X86ISA::IntReg val) 721{ 722 assert(i < NumArgumentRegs); 723 return tc->setIntReg(ArgumentReg[i], val); 724} 725