process.cc revision 6400
14166Sgblack@eecs.umich.edu/* 24166Sgblack@eecs.umich.edu * Copyright (c) 2003-2006 The Regents of The University of Michigan 34166Sgblack@eecs.umich.edu * All rights reserved. 44166Sgblack@eecs.umich.edu * 54166Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 64166Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are 74166Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright 84166Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer; 94166Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright 104166Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the 114166Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution; 124166Sgblack@eecs.umich.edu * neither the name of the copyright holders nor the names of its 134166Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 144166Sgblack@eecs.umich.edu * this software without specific prior written permission. 154166Sgblack@eecs.umich.edu * 164166Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 174166Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 184166Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 194166Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 204166Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 214166Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 224166Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 234166Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 244166Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 254166Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 264166Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 274166Sgblack@eecs.umich.edu * 284166Sgblack@eecs.umich.edu * Authors: Gabe Black 294166Sgblack@eecs.umich.edu * Ali Saidi 304166Sgblack@eecs.umich.edu */ 314166Sgblack@eecs.umich.edu 324166Sgblack@eecs.umich.edu/* 334166Sgblack@eecs.umich.edu * Copyright (c) 2007 The Hewlett-Packard Development Company 344166Sgblack@eecs.umich.edu * All rights reserved. 354166Sgblack@eecs.umich.edu * 364166Sgblack@eecs.umich.edu * Redistribution and use of this software in source and binary forms, 374166Sgblack@eecs.umich.edu * with or without modification, are permitted provided that the 384166Sgblack@eecs.umich.edu * following conditions are met: 394166Sgblack@eecs.umich.edu * 404166Sgblack@eecs.umich.edu * The software must be used only for Non-Commercial Use which means any 414166Sgblack@eecs.umich.edu * use which is NOT directed to receiving any direct monetary 424166Sgblack@eecs.umich.edu * compensation for, or commercial advantage from such use. Illustrative 434166Sgblack@eecs.umich.edu * examples of non-commercial use are academic research, personal study, 444166Sgblack@eecs.umich.edu * teaching, education and corporate research & development. 454166Sgblack@eecs.umich.edu * Illustrative examples of commercial use are distributing products for 464166Sgblack@eecs.umich.edu * commercial advantage and providing services using the software for 474166Sgblack@eecs.umich.edu * commercial advantage. 484166Sgblack@eecs.umich.edu * 494166Sgblack@eecs.umich.edu * If you wish to use this software or functionality therein that may be 504166Sgblack@eecs.umich.edu * covered by patents for commercial use, please contact: 514166Sgblack@eecs.umich.edu * Director of Intellectual Property Licensing 524166Sgblack@eecs.umich.edu * Office of Strategy and Technology 534166Sgblack@eecs.umich.edu * Hewlett-Packard Company 544166Sgblack@eecs.umich.edu * 1501 Page Mill Road 554166Sgblack@eecs.umich.edu * Palo Alto, California 94304 564166Sgblack@eecs.umich.edu * 574166Sgblack@eecs.umich.edu * Redistributions of source code must retain the above copyright notice, 584166Sgblack@eecs.umich.edu * this list of conditions and the following disclaimer. Redistributions 594166Sgblack@eecs.umich.edu * in binary form must reproduce the above copyright notice, this list of 604166Sgblack@eecs.umich.edu * conditions and the following disclaimer in the documentation and/or 614166Sgblack@eecs.umich.edu * other materials provided with the distribution. Neither the name of 624166Sgblack@eecs.umich.edu * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its 634166Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 644166Sgblack@eecs.umich.edu * this software without specific prior written permission. No right of 654166Sgblack@eecs.umich.edu * sublicense is granted herewith. Derivatives of the software and 664166Sgblack@eecs.umich.edu * output created using the software may be prepared, but only for 674166Sgblack@eecs.umich.edu * Non-Commercial Uses. Derivatives of the software may be shared with 684166Sgblack@eecs.umich.edu * others provided: (i) the others agree to abide by the list of 694166Sgblack@eecs.umich.edu * conditions herein which includes the Non-Commercial Use restrictions; 704166Sgblack@eecs.umich.edu * and (ii) such Derivatives of the software include the above copyright 714166Sgblack@eecs.umich.edu * notice to acknowledge the contribution from this software where 724166Sgblack@eecs.umich.edu * applicable, this list of conditions and the disclaimer below. 734166Sgblack@eecs.umich.edu * 744166Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 754166Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 764166Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 774166Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 784166Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 794166Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 804166Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 814166Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 824166Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 834166Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 844166Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 854166Sgblack@eecs.umich.edu * 864166Sgblack@eecs.umich.edu * Authors: Gabe Black 874166Sgblack@eecs.umich.edu */ 884166Sgblack@eecs.umich.edu 894166Sgblack@eecs.umich.edu#include "arch/x86/isa_traits.hh" 906313Sgblack@eecs.umich.edu#include "arch/x86/miscregs.hh" 914166Sgblack@eecs.umich.edu#include "arch/x86/process.hh" 924863Sgblack@eecs.umich.edu#include "arch/x86/segmentregs.hh" 934166Sgblack@eecs.umich.edu#include "arch/x86/types.hh" 944166Sgblack@eecs.umich.edu#include "base/loader/object_file.hh" 954166Sgblack@eecs.umich.edu#include "base/loader/elf_object.hh" 964166Sgblack@eecs.umich.edu#include "base/misc.hh" 975004Sgblack@eecs.umich.edu#include "base/trace.hh" 984166Sgblack@eecs.umich.edu#include "cpu/thread_context.hh" 994166Sgblack@eecs.umich.edu#include "mem/page_table.hh" 1004166Sgblack@eecs.umich.edu#include "mem/translating_port.hh" 1014434Ssaidi@eecs.umich.edu#include "sim/process_impl.hh" 1025956Sgblack@eecs.umich.edu#include "sim/syscall_emul.hh" 1034166Sgblack@eecs.umich.edu#include "sim/system.hh" 1044166Sgblack@eecs.umich.edu 1054166Sgblack@eecs.umich.eduusing namespace std; 1064166Sgblack@eecs.umich.eduusing namespace X86ISA; 1074166Sgblack@eecs.umich.edu 1085958Sgblack@eecs.umich.edustatic const int ArgumentReg[] = { 1095958Sgblack@eecs.umich.edu INTREG_RDI, 1105958Sgblack@eecs.umich.edu INTREG_RSI, 1115958Sgblack@eecs.umich.edu INTREG_RDX, 1125958Sgblack@eecs.umich.edu //This argument register is r10 for syscalls and rcx for C. 1135958Sgblack@eecs.umich.edu INTREG_R10W, 1145958Sgblack@eecs.umich.edu //INTREG_RCX, 1155958Sgblack@eecs.umich.edu INTREG_R8W, 1165958Sgblack@eecs.umich.edu INTREG_R9W 1175958Sgblack@eecs.umich.edu}; 1185958Sgblack@eecs.umich.edustatic const int NumArgumentRegs = sizeof(ArgumentReg) / sizeof(const int); 1195959Sgblack@eecs.umich.edustatic const int ArgumentReg32[] = { 1205959Sgblack@eecs.umich.edu INTREG_EBX, 1215959Sgblack@eecs.umich.edu INTREG_ECX, 1225959Sgblack@eecs.umich.edu INTREG_EDX, 1235959Sgblack@eecs.umich.edu INTREG_ESI, 1245959Sgblack@eecs.umich.edu INTREG_EDI, 1255959Sgblack@eecs.umich.edu}; 1265959Sgblack@eecs.umich.edustatic const int NumArgumentRegs32 = sizeof(ArgumentReg) / sizeof(const int); 1274166Sgblack@eecs.umich.edu 1285956Sgblack@eecs.umich.eduX86LiveProcess::X86LiveProcess(LiveProcessParams * params, ObjectFile *objFile, 1295956Sgblack@eecs.umich.edu SyscallDesc *_syscallDescs, int _numSyscallDescs) : 1305956Sgblack@eecs.umich.edu LiveProcess(params, objFile), syscallDescs(_syscallDescs), 1315956Sgblack@eecs.umich.edu numSyscallDescs(_numSyscallDescs) 1324166Sgblack@eecs.umich.edu{ 1334166Sgblack@eecs.umich.edu brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize(); 1344166Sgblack@eecs.umich.edu brk_point = roundUp(brk_point, VMPageSize); 1355956Sgblack@eecs.umich.edu} 1364166Sgblack@eecs.umich.edu 1375956Sgblack@eecs.umich.eduX86_64LiveProcess::X86_64LiveProcess(LiveProcessParams *params, 1385956Sgblack@eecs.umich.edu ObjectFile *objFile, SyscallDesc *_syscallDescs, 1395956Sgblack@eecs.umich.edu int _numSyscallDescs) : 1405956Sgblack@eecs.umich.edu X86LiveProcess(params, objFile, _syscallDescs, _numSyscallDescs) 1415956Sgblack@eecs.umich.edu{ 1424786Sgblack@eecs.umich.edu // Set up stack. On X86_64 Linux, stack goes from the top of memory 1434786Sgblack@eecs.umich.edu // downward, less the hole for the kernel address space plus one page 1444786Sgblack@eecs.umich.edu // for undertermined purposes. 1454793Sgblack@eecs.umich.edu stack_base = (Addr)0x7FFFFFFFF000ULL; 1464166Sgblack@eecs.umich.edu 1475956Sgblack@eecs.umich.edu // Set pointer for next thread stack. Reserve 8M for main stack. 1485956Sgblack@eecs.umich.edu next_thread_stack_base = stack_base - (8 * 1024 * 1024); 1495956Sgblack@eecs.umich.edu 1504820Sgblack@eecs.umich.edu // Set up region for mmaps. This was determined empirically and may not 1514820Sgblack@eecs.umich.edu // always be correct. 1525188Sgblack@eecs.umich.edu mmap_start = mmap_end = (Addr)0x2aaaaaaab000ULL; 1534166Sgblack@eecs.umich.edu} 1544166Sgblack@eecs.umich.edu 1555973Sgblack@eecs.umich.eduvoid 1565973Sgblack@eecs.umich.eduI386LiveProcess::syscall(int64_t callnum, ThreadContext *tc) 1575973Sgblack@eecs.umich.edu{ 1585973Sgblack@eecs.umich.edu Addr eip = tc->readPC(); 1595973Sgblack@eecs.umich.edu if (eip >= vsyscallPage.base && 1605973Sgblack@eecs.umich.edu eip < vsyscallPage.base + vsyscallPage.size) { 1615973Sgblack@eecs.umich.edu tc->setNextPC(vsyscallPage.base + vsyscallPage.vsysexitOffset); 1625973Sgblack@eecs.umich.edu } 1635973Sgblack@eecs.umich.edu X86LiveProcess::syscall(callnum, tc); 1645973Sgblack@eecs.umich.edu} 1655973Sgblack@eecs.umich.edu 1665973Sgblack@eecs.umich.edu 1675956Sgblack@eecs.umich.eduI386LiveProcess::I386LiveProcess(LiveProcessParams *params, 1685956Sgblack@eecs.umich.edu ObjectFile *objFile, SyscallDesc *_syscallDescs, 1695956Sgblack@eecs.umich.edu int _numSyscallDescs) : 1705956Sgblack@eecs.umich.edu X86LiveProcess(params, objFile, _syscallDescs, _numSyscallDescs) 1714166Sgblack@eecs.umich.edu{ 1725973Sgblack@eecs.umich.edu _gdtStart = 0x100000000; 1735973Sgblack@eecs.umich.edu _gdtSize = VMPageSize; 1745973Sgblack@eecs.umich.edu 1755973Sgblack@eecs.umich.edu vsyscallPage.base = 0xffffe000ULL; 1765973Sgblack@eecs.umich.edu vsyscallPage.size = VMPageSize; 1775973Sgblack@eecs.umich.edu vsyscallPage.vsyscallOffset = 0x400; 1785973Sgblack@eecs.umich.edu vsyscallPage.vsysexitOffset = 0x410; 1795973Sgblack@eecs.umich.edu 1805973Sgblack@eecs.umich.edu stack_base = vsyscallPage.base; 1815956Sgblack@eecs.umich.edu 1825956Sgblack@eecs.umich.edu // Set pointer for next thread stack. Reserve 8M for main stack. 1835956Sgblack@eecs.umich.edu next_thread_stack_base = stack_base - (8 * 1024 * 1024); 1845956Sgblack@eecs.umich.edu 1855956Sgblack@eecs.umich.edu // Set up region for mmaps. This was determined empirically and may not 1865956Sgblack@eecs.umich.edu // always be correct. 1875956Sgblack@eecs.umich.edu mmap_start = mmap_end = (Addr)0xf7ffd000ULL; 1885956Sgblack@eecs.umich.edu} 1895956Sgblack@eecs.umich.edu 1905956Sgblack@eecs.umich.eduSyscallDesc* 1915956Sgblack@eecs.umich.eduX86LiveProcess::getDesc(int callnum) 1925956Sgblack@eecs.umich.edu{ 1935956Sgblack@eecs.umich.edu if (callnum < 0 || callnum >= numSyscallDescs) 1945956Sgblack@eecs.umich.edu return NULL; 1955956Sgblack@eecs.umich.edu return &syscallDescs[callnum]; 1964166Sgblack@eecs.umich.edu} 1974166Sgblack@eecs.umich.edu 1984166Sgblack@eecs.umich.eduvoid 1995956Sgblack@eecs.umich.eduX86_64LiveProcess::startup() 2004166Sgblack@eecs.umich.edu{ 2015956Sgblack@eecs.umich.edu LiveProcess::startup(); 2025956Sgblack@eecs.umich.edu 2035183Ssaidi@eecs.umich.edu if (checkpointRestored) 2045183Ssaidi@eecs.umich.edu return; 2055183Ssaidi@eecs.umich.edu 2065956Sgblack@eecs.umich.edu argsInit(sizeof(uint64_t), VMPageSize); 2075140Sgblack@eecs.umich.edu 2085713Shsul@eecs.umich.edu for (int i = 0; i < contextIds.size(); i++) { 2095713Shsul@eecs.umich.edu ThreadContext * tc = system->getThreadContext(contextIds[i]); 2105140Sgblack@eecs.umich.edu 2115140Sgblack@eecs.umich.edu SegAttr dataAttr = 0; 2126222Sgblack@eecs.umich.edu dataAttr.dpl = 3; 2136222Sgblack@eecs.umich.edu dataAttr.unusable = 0; 2146222Sgblack@eecs.umich.edu dataAttr.defaultSize = 1; 2156222Sgblack@eecs.umich.edu dataAttr.longMode = 1; 2166222Sgblack@eecs.umich.edu dataAttr.avl = 0; 2176222Sgblack@eecs.umich.edu dataAttr.granularity = 1; 2186222Sgblack@eecs.umich.edu dataAttr.present = 1; 2196222Sgblack@eecs.umich.edu dataAttr.type = 3; 2205140Sgblack@eecs.umich.edu dataAttr.writable = 1; 2215140Sgblack@eecs.umich.edu dataAttr.readable = 1; 2225140Sgblack@eecs.umich.edu dataAttr.expandDown = 0; 2236222Sgblack@eecs.umich.edu dataAttr.system = 1; 2245140Sgblack@eecs.umich.edu 2255140Sgblack@eecs.umich.edu //Initialize the segment registers. 2265140Sgblack@eecs.umich.edu for(int seg = 0; seg < NUM_SEGMENTREGS; seg++) { 2275140Sgblack@eecs.umich.edu tc->setMiscRegNoEffect(MISCREG_SEG_BASE(seg), 0); 2285289Sgblack@eecs.umich.edu tc->setMiscRegNoEffect(MISCREG_SEG_EFF_BASE(seg), 0); 2295140Sgblack@eecs.umich.edu tc->setMiscRegNoEffect(MISCREG_SEG_ATTR(seg), dataAttr); 2305140Sgblack@eecs.umich.edu } 2315140Sgblack@eecs.umich.edu 2325140Sgblack@eecs.umich.edu SegAttr csAttr = 0; 2336222Sgblack@eecs.umich.edu csAttr.dpl = 3; 2346222Sgblack@eecs.umich.edu csAttr.unusable = 0; 2356222Sgblack@eecs.umich.edu csAttr.defaultSize = 0; 2366222Sgblack@eecs.umich.edu csAttr.longMode = 1; 2376222Sgblack@eecs.umich.edu csAttr.avl = 0; 2386222Sgblack@eecs.umich.edu csAttr.granularity = 1; 2396222Sgblack@eecs.umich.edu csAttr.present = 1; 2406222Sgblack@eecs.umich.edu csAttr.type = 10; 2415140Sgblack@eecs.umich.edu csAttr.writable = 0; 2425140Sgblack@eecs.umich.edu csAttr.readable = 1; 2435140Sgblack@eecs.umich.edu csAttr.expandDown = 0; 2446222Sgblack@eecs.umich.edu csAttr.system = 1; 2455140Sgblack@eecs.umich.edu 2465140Sgblack@eecs.umich.edu tc->setMiscRegNoEffect(MISCREG_CS_ATTR, csAttr); 2475140Sgblack@eecs.umich.edu 2486140Sgblack@eecs.umich.edu Efer efer = 0; 2496140Sgblack@eecs.umich.edu efer.sce = 1; // Enable system call extensions. 2506140Sgblack@eecs.umich.edu efer.lme = 1; // Enable long mode. 2516140Sgblack@eecs.umich.edu efer.lma = 1; // Activate long mode. 2526140Sgblack@eecs.umich.edu efer.nxe = 1; // Enable nx support. 2536140Sgblack@eecs.umich.edu efer.svme = 0; // Disable svm support for now. It isn't implemented. 2546140Sgblack@eecs.umich.edu efer.ffxsr = 1; // Turn on fast fxsave and fxrstor. 2556140Sgblack@eecs.umich.edu tc->setMiscReg(MISCREG_EFER, efer); 2566140Sgblack@eecs.umich.edu 2575140Sgblack@eecs.umich.edu //Set up the registers that describe the operating mode. 2585140Sgblack@eecs.umich.edu CR0 cr0 = 0; 2595140Sgblack@eecs.umich.edu cr0.pg = 1; // Turn on paging. 2605140Sgblack@eecs.umich.edu cr0.cd = 0; // Don't disable caching. 2615140Sgblack@eecs.umich.edu cr0.nw = 0; // This is bit is defined to be ignored. 2625140Sgblack@eecs.umich.edu cr0.am = 0; // No alignment checking 2635140Sgblack@eecs.umich.edu cr0.wp = 0; // Supervisor mode can write read only pages 2645140Sgblack@eecs.umich.edu cr0.ne = 1; 2655140Sgblack@eecs.umich.edu cr0.et = 1; // This should always be 1 2665140Sgblack@eecs.umich.edu cr0.ts = 0; // We don't do task switching, so causing fp exceptions 2675140Sgblack@eecs.umich.edu // would be pointless. 2685140Sgblack@eecs.umich.edu cr0.em = 0; // Allow x87 instructions to execute natively. 2695140Sgblack@eecs.umich.edu cr0.mp = 1; // This doesn't really matter, but the manual suggests 2705140Sgblack@eecs.umich.edu // setting it to one. 2715140Sgblack@eecs.umich.edu cr0.pe = 1; // We're definitely in protected mode. 2725140Sgblack@eecs.umich.edu tc->setMiscReg(MISCREG_CR0, cr0); 2735140Sgblack@eecs.umich.edu } 2744166Sgblack@eecs.umich.edu} 2754166Sgblack@eecs.umich.edu 2764166Sgblack@eecs.umich.eduvoid 2775956Sgblack@eecs.umich.eduI386LiveProcess::startup() 2784166Sgblack@eecs.umich.edu{ 2795956Sgblack@eecs.umich.edu LiveProcess::startup(); 2805956Sgblack@eecs.umich.edu 2815956Sgblack@eecs.umich.edu if (checkpointRestored) 2825956Sgblack@eecs.umich.edu return; 2835956Sgblack@eecs.umich.edu 2845956Sgblack@eecs.umich.edu argsInit(sizeof(uint32_t), VMPageSize); 2855956Sgblack@eecs.umich.edu 2865962Sgblack@eecs.umich.edu /* 2875962Sgblack@eecs.umich.edu * Set up a GDT for this process. The whole GDT wouldn't really be for 2885962Sgblack@eecs.umich.edu * this process, but the only parts we care about are. 2895962Sgblack@eecs.umich.edu */ 2905962Sgblack@eecs.umich.edu pTable->allocate(_gdtStart, _gdtSize); 2915962Sgblack@eecs.umich.edu uint64_t zero = 0; 2925962Sgblack@eecs.umich.edu assert(_gdtSize % sizeof(zero) == 0); 2935962Sgblack@eecs.umich.edu for (Addr gdtCurrent = _gdtStart; 2945962Sgblack@eecs.umich.edu gdtCurrent < _gdtStart + _gdtSize; gdtCurrent += sizeof(zero)) { 2955962Sgblack@eecs.umich.edu initVirtMem->write(gdtCurrent, zero); 2965962Sgblack@eecs.umich.edu } 2975962Sgblack@eecs.umich.edu 2985973Sgblack@eecs.umich.edu // Set up the vsyscall page for this process. 2995973Sgblack@eecs.umich.edu pTable->allocate(vsyscallPage.base, vsyscallPage.size); 3005973Sgblack@eecs.umich.edu uint8_t vsyscallBlob[] = { 3015973Sgblack@eecs.umich.edu 0x51, // push %ecx 3025973Sgblack@eecs.umich.edu 0x52, // push %edp 3035973Sgblack@eecs.umich.edu 0x55, // push %ebp 3045973Sgblack@eecs.umich.edu 0x89, 0xe5, // mov %esp, %ebp 3055973Sgblack@eecs.umich.edu 0x0f, 0x34 // sysenter 3065973Sgblack@eecs.umich.edu }; 3075973Sgblack@eecs.umich.edu initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vsyscallOffset, 3085973Sgblack@eecs.umich.edu vsyscallBlob, sizeof(vsyscallBlob)); 3095973Sgblack@eecs.umich.edu 3105973Sgblack@eecs.umich.edu uint8_t vsysexitBlob[] = { 3115973Sgblack@eecs.umich.edu 0x5d, // pop %ebp 3125973Sgblack@eecs.umich.edu 0x5a, // pop %edx 3135973Sgblack@eecs.umich.edu 0x59, // pop %ecx 3145973Sgblack@eecs.umich.edu 0xc3 // ret 3155973Sgblack@eecs.umich.edu }; 3165973Sgblack@eecs.umich.edu initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vsysexitOffset, 3175973Sgblack@eecs.umich.edu vsysexitBlob, sizeof(vsysexitBlob)); 3185973Sgblack@eecs.umich.edu 3195956Sgblack@eecs.umich.edu for (int i = 0; i < contextIds.size(); i++) { 3205956Sgblack@eecs.umich.edu ThreadContext * tc = system->getThreadContext(contextIds[i]); 3215956Sgblack@eecs.umich.edu 3225956Sgblack@eecs.umich.edu SegAttr dataAttr = 0; 3236222Sgblack@eecs.umich.edu dataAttr.dpl = 3; 3246222Sgblack@eecs.umich.edu dataAttr.unusable = 0; 3256222Sgblack@eecs.umich.edu dataAttr.defaultSize = 1; 3266222Sgblack@eecs.umich.edu dataAttr.longMode = 0; 3276222Sgblack@eecs.umich.edu dataAttr.avl = 0; 3286222Sgblack@eecs.umich.edu dataAttr.granularity = 1; 3296222Sgblack@eecs.umich.edu dataAttr.present = 1; 3306222Sgblack@eecs.umich.edu dataAttr.type = 3; 3315956Sgblack@eecs.umich.edu dataAttr.writable = 1; 3325956Sgblack@eecs.umich.edu dataAttr.readable = 1; 3335956Sgblack@eecs.umich.edu dataAttr.expandDown = 0; 3346222Sgblack@eecs.umich.edu dataAttr.system = 1; 3355956Sgblack@eecs.umich.edu 3365956Sgblack@eecs.umich.edu //Initialize the segment registers. 3375956Sgblack@eecs.umich.edu for(int seg = 0; seg < NUM_SEGMENTREGS; seg++) { 3385956Sgblack@eecs.umich.edu tc->setMiscRegNoEffect(MISCREG_SEG_BASE(seg), 0); 3395956Sgblack@eecs.umich.edu tc->setMiscRegNoEffect(MISCREG_SEG_EFF_BASE(seg), 0); 3405956Sgblack@eecs.umich.edu tc->setMiscRegNoEffect(MISCREG_SEG_ATTR(seg), dataAttr); 3415956Sgblack@eecs.umich.edu tc->setMiscRegNoEffect(MISCREG_SEG_SEL(seg), 0xB); 3425959Sgblack@eecs.umich.edu tc->setMiscRegNoEffect(MISCREG_SEG_LIMIT(seg), (uint32_t)(-1)); 3435956Sgblack@eecs.umich.edu } 3445956Sgblack@eecs.umich.edu 3455956Sgblack@eecs.umich.edu SegAttr csAttr = 0; 3466222Sgblack@eecs.umich.edu csAttr.dpl = 3; 3476222Sgblack@eecs.umich.edu csAttr.unusable = 0; 3486222Sgblack@eecs.umich.edu csAttr.defaultSize = 1; 3496222Sgblack@eecs.umich.edu csAttr.longMode = 0; 3506222Sgblack@eecs.umich.edu csAttr.avl = 0; 3516222Sgblack@eecs.umich.edu csAttr.granularity = 1; 3526222Sgblack@eecs.umich.edu csAttr.present = 1; 3536222Sgblack@eecs.umich.edu csAttr.type = 0xa; 3545956Sgblack@eecs.umich.edu csAttr.writable = 0; 3555956Sgblack@eecs.umich.edu csAttr.readable = 1; 3565956Sgblack@eecs.umich.edu csAttr.expandDown = 0; 3576222Sgblack@eecs.umich.edu csAttr.system = 1; 3585956Sgblack@eecs.umich.edu 3595956Sgblack@eecs.umich.edu tc->setMiscRegNoEffect(MISCREG_CS_ATTR, csAttr); 3605956Sgblack@eecs.umich.edu 3615962Sgblack@eecs.umich.edu tc->setMiscRegNoEffect(MISCREG_TSG_BASE, _gdtStart); 3625962Sgblack@eecs.umich.edu tc->setMiscRegNoEffect(MISCREG_TSG_EFF_BASE, _gdtStart); 3635962Sgblack@eecs.umich.edu tc->setMiscRegNoEffect(MISCREG_TSG_LIMIT, _gdtStart + _gdtSize - 1); 3645962Sgblack@eecs.umich.edu 3655963Sgblack@eecs.umich.edu // Set the LDT selector to 0 to deactivate it. 3665963Sgblack@eecs.umich.edu tc->setMiscRegNoEffect(MISCREG_TSL, 0); 3675963Sgblack@eecs.umich.edu 3686140Sgblack@eecs.umich.edu Efer efer = 0; 3696140Sgblack@eecs.umich.edu efer.sce = 1; // Enable system call extensions. 3706140Sgblack@eecs.umich.edu efer.lme = 1; // Enable long mode. 3716140Sgblack@eecs.umich.edu efer.lma = 0; // Deactivate long mode. 3726140Sgblack@eecs.umich.edu efer.nxe = 1; // Enable nx support. 3736140Sgblack@eecs.umich.edu efer.svme = 0; // Disable svm support for now. It isn't implemented. 3746140Sgblack@eecs.umich.edu efer.ffxsr = 1; // Turn on fast fxsave and fxrstor. 3756140Sgblack@eecs.umich.edu tc->setMiscReg(MISCREG_EFER, efer); 3766140Sgblack@eecs.umich.edu 3775956Sgblack@eecs.umich.edu //Set up the registers that describe the operating mode. 3785956Sgblack@eecs.umich.edu CR0 cr0 = 0; 3795956Sgblack@eecs.umich.edu cr0.pg = 1; // Turn on paging. 3805956Sgblack@eecs.umich.edu cr0.cd = 0; // Don't disable caching. 3815956Sgblack@eecs.umich.edu cr0.nw = 0; // This is bit is defined to be ignored. 3825956Sgblack@eecs.umich.edu cr0.am = 0; // No alignment checking 3835956Sgblack@eecs.umich.edu cr0.wp = 0; // Supervisor mode can write read only pages 3845956Sgblack@eecs.umich.edu cr0.ne = 1; 3855956Sgblack@eecs.umich.edu cr0.et = 1; // This should always be 1 3865956Sgblack@eecs.umich.edu cr0.ts = 0; // We don't do task switching, so causing fp exceptions 3875956Sgblack@eecs.umich.edu // would be pointless. 3885956Sgblack@eecs.umich.edu cr0.em = 0; // Allow x87 instructions to execute natively. 3895956Sgblack@eecs.umich.edu cr0.mp = 1; // This doesn't really matter, but the manual suggests 3905956Sgblack@eecs.umich.edu // setting it to one. 3915956Sgblack@eecs.umich.edu cr0.pe = 1; // We're definitely in protected mode. 3925956Sgblack@eecs.umich.edu tc->setMiscReg(MISCREG_CR0, cr0); 3935956Sgblack@eecs.umich.edu } 3945956Sgblack@eecs.umich.edu} 3955956Sgblack@eecs.umich.edu 3965956Sgblack@eecs.umich.edutemplate<class IntType> 3975956Sgblack@eecs.umich.eduvoid 3985973Sgblack@eecs.umich.eduX86LiveProcess::argsInit(int pageSize, 3995973Sgblack@eecs.umich.edu std::vector<AuxVector<IntType> > extraAuxvs) 4005956Sgblack@eecs.umich.edu{ 4015956Sgblack@eecs.umich.edu int intSize = sizeof(IntType); 4025956Sgblack@eecs.umich.edu 4035956Sgblack@eecs.umich.edu typedef AuxVector<IntType> auxv_t; 4045973Sgblack@eecs.umich.edu std::vector<auxv_t> auxv = extraAuxvs; 4055758Shsul@eecs.umich.edu 4064166Sgblack@eecs.umich.edu string filename; 4074166Sgblack@eecs.umich.edu if(argv.size() < 1) 4084166Sgblack@eecs.umich.edu filename = ""; 4094166Sgblack@eecs.umich.edu else 4104166Sgblack@eecs.umich.edu filename = argv[0]; 4114166Sgblack@eecs.umich.edu 4124793Sgblack@eecs.umich.edu //We want 16 byte alignment 4134849Sgblack@eecs.umich.edu uint64_t align = 16; 4144166Sgblack@eecs.umich.edu 4154166Sgblack@eecs.umich.edu // load object file into target memory 4164166Sgblack@eecs.umich.edu objFile->loadSections(initVirtMem); 4174166Sgblack@eecs.umich.edu 4184793Sgblack@eecs.umich.edu enum X86CpuFeature { 4194793Sgblack@eecs.umich.edu X86_OnboardFPU = 1 << 0, 4204793Sgblack@eecs.umich.edu X86_VirtualModeExtensions = 1 << 1, 4214793Sgblack@eecs.umich.edu X86_DebuggingExtensions = 1 << 2, 4224793Sgblack@eecs.umich.edu X86_PageSizeExtensions = 1 << 3, 4234777Sgblack@eecs.umich.edu 4244793Sgblack@eecs.umich.edu X86_TimeStampCounter = 1 << 4, 4254793Sgblack@eecs.umich.edu X86_ModelSpecificRegisters = 1 << 5, 4264793Sgblack@eecs.umich.edu X86_PhysicalAddressExtensions = 1 << 6, 4274793Sgblack@eecs.umich.edu X86_MachineCheckExtensions = 1 << 7, 4284777Sgblack@eecs.umich.edu 4294793Sgblack@eecs.umich.edu X86_CMPXCHG8Instruction = 1 << 8, 4304793Sgblack@eecs.umich.edu X86_OnboardAPIC = 1 << 9, 4314793Sgblack@eecs.umich.edu X86_SYSENTER_SYSEXIT = 1 << 11, 4324793Sgblack@eecs.umich.edu 4334793Sgblack@eecs.umich.edu X86_MemoryTypeRangeRegisters = 1 << 12, 4344793Sgblack@eecs.umich.edu X86_PageGlobalEnable = 1 << 13, 4354793Sgblack@eecs.umich.edu X86_MachineCheckArchitecture = 1 << 14, 4364793Sgblack@eecs.umich.edu X86_CMOVInstruction = 1 << 15, 4374793Sgblack@eecs.umich.edu 4384793Sgblack@eecs.umich.edu X86_PageAttributeTable = 1 << 16, 4394793Sgblack@eecs.umich.edu X86_36BitPSEs = 1 << 17, 4404793Sgblack@eecs.umich.edu X86_ProcessorSerialNumber = 1 << 18, 4414793Sgblack@eecs.umich.edu X86_CLFLUSHInstruction = 1 << 19, 4424793Sgblack@eecs.umich.edu 4434793Sgblack@eecs.umich.edu X86_DebugTraceStore = 1 << 21, 4444793Sgblack@eecs.umich.edu X86_ACPIViaMSR = 1 << 22, 4454793Sgblack@eecs.umich.edu X86_MultimediaExtensions = 1 << 23, 4464793Sgblack@eecs.umich.edu 4474793Sgblack@eecs.umich.edu X86_FXSAVE_FXRSTOR = 1 << 24, 4484793Sgblack@eecs.umich.edu X86_StreamingSIMDExtensions = 1 << 25, 4494793Sgblack@eecs.umich.edu X86_StreamingSIMDExtensions2 = 1 << 26, 4504793Sgblack@eecs.umich.edu X86_CPUSelfSnoop = 1 << 27, 4514793Sgblack@eecs.umich.edu 4524793Sgblack@eecs.umich.edu X86_HyperThreading = 1 << 28, 4534793Sgblack@eecs.umich.edu X86_AutomaticClockControl = 1 << 29, 4544793Sgblack@eecs.umich.edu X86_IA64Processor = 1 << 30 4554166Sgblack@eecs.umich.edu }; 4564166Sgblack@eecs.umich.edu 4574166Sgblack@eecs.umich.edu //Setup the auxilliary vectors. These will already have endian conversion. 4584166Sgblack@eecs.umich.edu //Auxilliary vectors are loaded only for elf formatted executables. 4594166Sgblack@eecs.umich.edu ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile); 4604166Sgblack@eecs.umich.edu if(elfObject) 4614166Sgblack@eecs.umich.edu { 4624793Sgblack@eecs.umich.edu uint64_t features = 4634793Sgblack@eecs.umich.edu X86_OnboardFPU | 4644793Sgblack@eecs.umich.edu X86_VirtualModeExtensions | 4654793Sgblack@eecs.umich.edu X86_DebuggingExtensions | 4664793Sgblack@eecs.umich.edu X86_PageSizeExtensions | 4674793Sgblack@eecs.umich.edu X86_TimeStampCounter | 4684793Sgblack@eecs.umich.edu X86_ModelSpecificRegisters | 4694793Sgblack@eecs.umich.edu X86_PhysicalAddressExtensions | 4704793Sgblack@eecs.umich.edu X86_MachineCheckExtensions | 4714793Sgblack@eecs.umich.edu X86_CMPXCHG8Instruction | 4724793Sgblack@eecs.umich.edu X86_OnboardAPIC | 4734793Sgblack@eecs.umich.edu X86_SYSENTER_SYSEXIT | 4744793Sgblack@eecs.umich.edu X86_MemoryTypeRangeRegisters | 4754793Sgblack@eecs.umich.edu X86_PageGlobalEnable | 4764793Sgblack@eecs.umich.edu X86_MachineCheckArchitecture | 4774793Sgblack@eecs.umich.edu X86_CMOVInstruction | 4784793Sgblack@eecs.umich.edu X86_PageAttributeTable | 4794793Sgblack@eecs.umich.edu X86_36BitPSEs | 4804793Sgblack@eecs.umich.edu// X86_ProcessorSerialNumber | 4814793Sgblack@eecs.umich.edu X86_CLFLUSHInstruction | 4824793Sgblack@eecs.umich.edu// X86_DebugTraceStore | 4834793Sgblack@eecs.umich.edu// X86_ACPIViaMSR | 4844793Sgblack@eecs.umich.edu X86_MultimediaExtensions | 4854793Sgblack@eecs.umich.edu X86_FXSAVE_FXRSTOR | 4864793Sgblack@eecs.umich.edu X86_StreamingSIMDExtensions | 4874793Sgblack@eecs.umich.edu X86_StreamingSIMDExtensions2 | 4884793Sgblack@eecs.umich.edu// X86_CPUSelfSnoop | 4894793Sgblack@eecs.umich.edu// X86_HyperThreading | 4904793Sgblack@eecs.umich.edu// X86_AutomaticClockControl | 4914793Sgblack@eecs.umich.edu// X86_IA64Processor | 4924793Sgblack@eecs.umich.edu 0; 4934793Sgblack@eecs.umich.edu 4944166Sgblack@eecs.umich.edu //Bits which describe the system hardware capabilities 4954777Sgblack@eecs.umich.edu //XXX Figure out what these should be 4964793Sgblack@eecs.umich.edu auxv.push_back(auxv_t(M5_AT_HWCAP, features)); 4974166Sgblack@eecs.umich.edu //The system page size 4984793Sgblack@eecs.umich.edu auxv.push_back(auxv_t(M5_AT_PAGESZ, X86ISA::VMPageSize)); 4994166Sgblack@eecs.umich.edu //Frequency at which times() increments 5006363Sgblack@eecs.umich.edu //Defined to be 100 in the kernel source. 5014793Sgblack@eecs.umich.edu auxv.push_back(auxv_t(M5_AT_CLKTCK, 100)); 5024166Sgblack@eecs.umich.edu // For statically linked executables, this is the virtual address of the 5034166Sgblack@eecs.umich.edu // program header tables if they appear in the executable image 5044793Sgblack@eecs.umich.edu auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable())); 5054166Sgblack@eecs.umich.edu // This is the size of a program header entry from the elf file. 5064793Sgblack@eecs.umich.edu auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize())); 5074166Sgblack@eecs.umich.edu // This is the number of program headers from the original elf file. 5084793Sgblack@eecs.umich.edu auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount())); 5094166Sgblack@eecs.umich.edu //This is the address of the elf "interpreter", It should be set 5104166Sgblack@eecs.umich.edu //to 0 for regular executables. It should be something else 5114166Sgblack@eecs.umich.edu //(not sure what) for dynamic libraries. 5124793Sgblack@eecs.umich.edu auxv.push_back(auxv_t(M5_AT_BASE, 0)); 5134777Sgblack@eecs.umich.edu 5144777Sgblack@eecs.umich.edu //XXX Figure out what this should be. 5154793Sgblack@eecs.umich.edu auxv.push_back(auxv_t(M5_AT_FLAGS, 0)); 5164166Sgblack@eecs.umich.edu //The entry point to the program 5174793Sgblack@eecs.umich.edu auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint())); 5184166Sgblack@eecs.umich.edu //Different user and group IDs 5194793Sgblack@eecs.umich.edu auxv.push_back(auxv_t(M5_AT_UID, uid())); 5204793Sgblack@eecs.umich.edu auxv.push_back(auxv_t(M5_AT_EUID, euid())); 5214793Sgblack@eecs.umich.edu auxv.push_back(auxv_t(M5_AT_GID, gid())); 5224793Sgblack@eecs.umich.edu auxv.push_back(auxv_t(M5_AT_EGID, egid())); 5234166Sgblack@eecs.umich.edu //Whether to enable "secure mode" in the executable 5244793Sgblack@eecs.umich.edu auxv.push_back(auxv_t(M5_AT_SECURE, 0)); 5254777Sgblack@eecs.umich.edu //The string "x86_64" with unknown meaning 5264793Sgblack@eecs.umich.edu auxv.push_back(auxv_t(M5_AT_PLATFORM, 0)); 5274166Sgblack@eecs.umich.edu } 5284166Sgblack@eecs.umich.edu 5294166Sgblack@eecs.umich.edu //Figure out how big the initial stack needs to be 5304166Sgblack@eecs.umich.edu 5314849Sgblack@eecs.umich.edu // A sentry NULL void pointer at the top of the stack. 5324849Sgblack@eecs.umich.edu int sentry_size = intSize; 5334166Sgblack@eecs.umich.edu 5344166Sgblack@eecs.umich.edu //This is the name of the file which is present on the initial stack 5354166Sgblack@eecs.umich.edu //It's purpose is to let the user space linker examine the original file. 5364847Sgblack@eecs.umich.edu int file_name_size = filename.size() + 1; 5374793Sgblack@eecs.umich.edu 5384793Sgblack@eecs.umich.edu string platform = "x86_64"; 5394793Sgblack@eecs.umich.edu int aux_data_size = platform.size() + 1; 5404166Sgblack@eecs.umich.edu 5414166Sgblack@eecs.umich.edu int env_data_size = 0; 5424166Sgblack@eecs.umich.edu for (int i = 0; i < envp.size(); ++i) { 5434847Sgblack@eecs.umich.edu env_data_size += envp[i].size() + 1; 5444166Sgblack@eecs.umich.edu } 5454166Sgblack@eecs.umich.edu int arg_data_size = 0; 5464166Sgblack@eecs.umich.edu for (int i = 0; i < argv.size(); ++i) { 5474847Sgblack@eecs.umich.edu arg_data_size += argv[i].size() + 1; 5484166Sgblack@eecs.umich.edu } 5494166Sgblack@eecs.umich.edu 5504166Sgblack@eecs.umich.edu //The info_block needs to be padded so it's size is a multiple of the 5514166Sgblack@eecs.umich.edu //alignment mask. Also, it appears that there needs to be at least some 5524166Sgblack@eecs.umich.edu //padding, so if the size is already a multiple, we need to increase it 5534166Sgblack@eecs.umich.edu //anyway. 5544849Sgblack@eecs.umich.edu int base_info_block_size = 5554849Sgblack@eecs.umich.edu sentry_size + file_name_size + env_data_size + arg_data_size; 5564166Sgblack@eecs.umich.edu 5574849Sgblack@eecs.umich.edu int info_block_size = roundUp(base_info_block_size, align); 5584849Sgblack@eecs.umich.edu 5594849Sgblack@eecs.umich.edu int info_block_padding = info_block_size - base_info_block_size; 5604166Sgblack@eecs.umich.edu 5614166Sgblack@eecs.umich.edu //Each auxilliary vector is two 8 byte words 5624166Sgblack@eecs.umich.edu int aux_array_size = intSize * 2 * (auxv.size() + 1); 5634166Sgblack@eecs.umich.edu 5644166Sgblack@eecs.umich.edu int envp_array_size = intSize * (envp.size() + 1); 5654166Sgblack@eecs.umich.edu int argv_array_size = intSize * (argv.size() + 1); 5664166Sgblack@eecs.umich.edu 5674166Sgblack@eecs.umich.edu int argc_size = intSize; 5684166Sgblack@eecs.umich.edu 5694849Sgblack@eecs.umich.edu //Figure out the size of the contents of the actual initial frame 5704849Sgblack@eecs.umich.edu int frame_size = 5714166Sgblack@eecs.umich.edu aux_array_size + 5724166Sgblack@eecs.umich.edu envp_array_size + 5734166Sgblack@eecs.umich.edu argv_array_size + 5744607Sgblack@eecs.umich.edu argc_size; 5754166Sgblack@eecs.umich.edu 5764849Sgblack@eecs.umich.edu //There needs to be padding after the auxiliary vector data so that the 5774849Sgblack@eecs.umich.edu //very bottom of the stack is aligned properly. 5784849Sgblack@eecs.umich.edu int partial_size = frame_size + aux_data_size; 5794849Sgblack@eecs.umich.edu int aligned_partial_size = roundUp(partial_size, align); 5804849Sgblack@eecs.umich.edu int aux_padding = aligned_partial_size - partial_size; 5814849Sgblack@eecs.umich.edu 5824849Sgblack@eecs.umich.edu int space_needed = 5834849Sgblack@eecs.umich.edu info_block_size + 5844849Sgblack@eecs.umich.edu aux_data_size + 5854849Sgblack@eecs.umich.edu aux_padding + 5864849Sgblack@eecs.umich.edu frame_size; 5874849Sgblack@eecs.umich.edu 5884166Sgblack@eecs.umich.edu stack_min = stack_base - space_needed; 5894849Sgblack@eecs.umich.edu stack_min = roundDown(stack_min, align); 5904166Sgblack@eecs.umich.edu stack_size = stack_base - stack_min; 5914166Sgblack@eecs.umich.edu 5924166Sgblack@eecs.umich.edu // map memory 5934166Sgblack@eecs.umich.edu pTable->allocate(roundDown(stack_min, pageSize), 5944166Sgblack@eecs.umich.edu roundUp(stack_size, pageSize)); 5954166Sgblack@eecs.umich.edu 5964166Sgblack@eecs.umich.edu // map out initial stack contents 5975956Sgblack@eecs.umich.edu IntType sentry_base = stack_base - sentry_size; 5985956Sgblack@eecs.umich.edu IntType file_name_base = sentry_base - file_name_size; 5995956Sgblack@eecs.umich.edu IntType env_data_base = file_name_base - env_data_size; 6005956Sgblack@eecs.umich.edu IntType arg_data_base = env_data_base - arg_data_size; 6015956Sgblack@eecs.umich.edu IntType aux_data_base = arg_data_base - info_block_padding - aux_data_size; 6025956Sgblack@eecs.umich.edu IntType auxv_array_base = aux_data_base - aux_array_size - aux_padding; 6035956Sgblack@eecs.umich.edu IntType envp_array_base = auxv_array_base - envp_array_size; 6045956Sgblack@eecs.umich.edu IntType argv_array_base = envp_array_base - argv_array_size; 6055956Sgblack@eecs.umich.edu IntType argc_base = argv_array_base - argc_size; 6064166Sgblack@eecs.umich.edu 6075941Sgblack@eecs.umich.edu DPRINTF(Stack, "The addresses of items on the initial stack:\n"); 6085941Sgblack@eecs.umich.edu DPRINTF(Stack, "0x%x - file name\n", file_name_base); 6095941Sgblack@eecs.umich.edu DPRINTF(Stack, "0x%x - env data\n", env_data_base); 6105941Sgblack@eecs.umich.edu DPRINTF(Stack, "0x%x - arg data\n", arg_data_base); 6115941Sgblack@eecs.umich.edu DPRINTF(Stack, "0x%x - aux data\n", aux_data_base); 6125941Sgblack@eecs.umich.edu DPRINTF(Stack, "0x%x - auxv array\n", auxv_array_base); 6135941Sgblack@eecs.umich.edu DPRINTF(Stack, "0x%x - envp array\n", envp_array_base); 6145941Sgblack@eecs.umich.edu DPRINTF(Stack, "0x%x - argv array\n", argv_array_base); 6155941Sgblack@eecs.umich.edu DPRINTF(Stack, "0x%x - argc \n", argc_base); 6165941Sgblack@eecs.umich.edu DPRINTF(Stack, "0x%x - stack min\n", stack_min); 6174166Sgblack@eecs.umich.edu 6184166Sgblack@eecs.umich.edu // write contents to stack 6194166Sgblack@eecs.umich.edu 6204166Sgblack@eecs.umich.edu // figure out argc 6215956Sgblack@eecs.umich.edu IntType argc = argv.size(); 6225956Sgblack@eecs.umich.edu IntType guestArgc = X86ISA::htog(argc); 6234166Sgblack@eecs.umich.edu 6244849Sgblack@eecs.umich.edu //Write out the sentry void * 6255956Sgblack@eecs.umich.edu IntType sentry_NULL = 0; 6264849Sgblack@eecs.umich.edu initVirtMem->writeBlob(sentry_base, 6274849Sgblack@eecs.umich.edu (uint8_t*)&sentry_NULL, sentry_size); 6284166Sgblack@eecs.umich.edu 6294166Sgblack@eecs.umich.edu //Write the file name 6304166Sgblack@eecs.umich.edu initVirtMem->writeString(file_name_base, filename.c_str()); 6314166Sgblack@eecs.umich.edu 6324793Sgblack@eecs.umich.edu //Fix up the aux vector which points to the "platform" string 6334793Sgblack@eecs.umich.edu assert(auxv[auxv.size() - 1].a_type = M5_AT_PLATFORM); 6344793Sgblack@eecs.umich.edu auxv[auxv.size() - 1].a_val = aux_data_base; 6354793Sgblack@eecs.umich.edu 6364166Sgblack@eecs.umich.edu //Copy the aux stuff 6374166Sgblack@eecs.umich.edu for(int x = 0; x < auxv.size(); x++) 6384166Sgblack@eecs.umich.edu { 6394166Sgblack@eecs.umich.edu initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize, 6404166Sgblack@eecs.umich.edu (uint8_t*)&(auxv[x].a_type), intSize); 6414166Sgblack@eecs.umich.edu initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize, 6424166Sgblack@eecs.umich.edu (uint8_t*)&(auxv[x].a_val), intSize); 6434166Sgblack@eecs.umich.edu } 6444166Sgblack@eecs.umich.edu //Write out the terminating zeroed auxilliary vector 6454166Sgblack@eecs.umich.edu const uint64_t zero = 0; 6464166Sgblack@eecs.umich.edu initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(), 6474166Sgblack@eecs.umich.edu (uint8_t*)&zero, 2 * intSize); 6484166Sgblack@eecs.umich.edu 6494793Sgblack@eecs.umich.edu initVirtMem->writeString(aux_data_base, platform.c_str()); 6504793Sgblack@eecs.umich.edu 6514166Sgblack@eecs.umich.edu copyStringArray(envp, envp_array_base, env_data_base, initVirtMem); 6524166Sgblack@eecs.umich.edu copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem); 6534166Sgblack@eecs.umich.edu 6544166Sgblack@eecs.umich.edu initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize); 6554166Sgblack@eecs.umich.edu 6565713Shsul@eecs.umich.edu ThreadContext *tc = system->getThreadContext(contextIds[0]); 6574793Sgblack@eecs.umich.edu //Set the stack pointer register 6585713Shsul@eecs.umich.edu tc->setIntReg(StackPointerReg, stack_min); 6594166Sgblack@eecs.umich.edu 6604166Sgblack@eecs.umich.edu Addr prog_entry = objFile->entryPoint(); 6615246Sgblack@eecs.umich.edu // There doesn't need to be any segment base added in since we're dealing 6625246Sgblack@eecs.umich.edu // with the flat segmentation model. 6635713Shsul@eecs.umich.edu tc->setPC(prog_entry); 6645713Shsul@eecs.umich.edu tc->setNextPC(prog_entry + sizeof(MachInst)); 6654166Sgblack@eecs.umich.edu 6664166Sgblack@eecs.umich.edu //Align the "stack_min" to a page boundary. 6674166Sgblack@eecs.umich.edu stack_min = roundDown(stack_min, pageSize); 6684166Sgblack@eecs.umich.edu 6694166Sgblack@eecs.umich.edu// num_processes++; 6704166Sgblack@eecs.umich.edu} 6715956Sgblack@eecs.umich.edu 6725956Sgblack@eecs.umich.eduvoid 6735956Sgblack@eecs.umich.eduX86_64LiveProcess::argsInit(int intSize, int pageSize) 6745956Sgblack@eecs.umich.edu{ 6755973Sgblack@eecs.umich.edu std::vector<AuxVector<uint64_t> > extraAuxvs; 6765973Sgblack@eecs.umich.edu X86LiveProcess::argsInit<uint64_t>(pageSize, extraAuxvs); 6775956Sgblack@eecs.umich.edu} 6785956Sgblack@eecs.umich.edu 6795956Sgblack@eecs.umich.eduvoid 6805956Sgblack@eecs.umich.eduI386LiveProcess::argsInit(int intSize, int pageSize) 6815956Sgblack@eecs.umich.edu{ 6825973Sgblack@eecs.umich.edu std::vector<AuxVector<uint32_t> > extraAuxvs; 6835973Sgblack@eecs.umich.edu //Tell the binary where the vsyscall part of the vsyscall page is. 6845973Sgblack@eecs.umich.edu extraAuxvs.push_back(AuxVector<uint32_t>(0x20, 6855973Sgblack@eecs.umich.edu vsyscallPage.base + vsyscallPage.vsyscallOffset)); 6865973Sgblack@eecs.umich.edu extraAuxvs.push_back(AuxVector<uint32_t>(0x21, vsyscallPage.base)); 6875973Sgblack@eecs.umich.edu X86LiveProcess::argsInit<uint32_t>(pageSize, extraAuxvs); 6885956Sgblack@eecs.umich.edu} 6895958Sgblack@eecs.umich.edu 6905958Sgblack@eecs.umich.eduvoid 6915958Sgblack@eecs.umich.eduX86LiveProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn return_value) 6925958Sgblack@eecs.umich.edu{ 6935958Sgblack@eecs.umich.edu tc->setIntReg(INTREG_RAX, return_value.value()); 6945958Sgblack@eecs.umich.edu} 6955958Sgblack@eecs.umich.edu 6965958Sgblack@eecs.umich.eduX86ISA::IntReg 6975958Sgblack@eecs.umich.eduX86_64LiveProcess::getSyscallArg(ThreadContext *tc, int i) 6985958Sgblack@eecs.umich.edu{ 6995958Sgblack@eecs.umich.edu assert(i < NumArgumentRegs); 7005958Sgblack@eecs.umich.edu return tc->readIntReg(ArgumentReg[i]); 7015958Sgblack@eecs.umich.edu} 7025958Sgblack@eecs.umich.edu 7035958Sgblack@eecs.umich.eduvoid 7045958Sgblack@eecs.umich.eduX86_64LiveProcess::setSyscallArg(ThreadContext *tc, int i, X86ISA::IntReg val) 7055958Sgblack@eecs.umich.edu{ 7065958Sgblack@eecs.umich.edu assert(i < NumArgumentRegs); 7075958Sgblack@eecs.umich.edu return tc->setIntReg(ArgumentReg[i], val); 7085958Sgblack@eecs.umich.edu} 7095958Sgblack@eecs.umich.edu 7105958Sgblack@eecs.umich.eduX86ISA::IntReg 7115958Sgblack@eecs.umich.eduI386LiveProcess::getSyscallArg(ThreadContext *tc, int i) 7125958Sgblack@eecs.umich.edu{ 7135959Sgblack@eecs.umich.edu assert(i < NumArgumentRegs32); 7145959Sgblack@eecs.umich.edu return tc->readIntReg(ArgumentReg32[i]); 7155958Sgblack@eecs.umich.edu} 7165958Sgblack@eecs.umich.edu 7175958Sgblack@eecs.umich.eduvoid 7185958Sgblack@eecs.umich.eduI386LiveProcess::setSyscallArg(ThreadContext *tc, int i, X86ISA::IntReg val) 7195958Sgblack@eecs.umich.edu{ 7205959Sgblack@eecs.umich.edu assert(i < NumArgumentRegs); 7215959Sgblack@eecs.umich.edu return tc->setIntReg(ArgumentReg[i], val); 7225958Sgblack@eecs.umich.edu} 723