process.cc revision 5973
1/*
2 * Copyright (c) 2003-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 *          Ali Saidi
30 */
31
32/*
33 * Copyright (c) 2007 The Hewlett-Packard Development Company
34 * All rights reserved.
35 *
36 * Redistribution and use of this software in source and binary forms,
37 * with or without modification, are permitted provided that the
38 * following conditions are met:
39 *
40 * The software must be used only for Non-Commercial Use which means any
41 * use which is NOT directed to receiving any direct monetary
42 * compensation for, or commercial advantage from such use.  Illustrative
43 * examples of non-commercial use are academic research, personal study,
44 * teaching, education and corporate research & development.
45 * Illustrative examples of commercial use are distributing products for
46 * commercial advantage and providing services using the software for
47 * commercial advantage.
48 *
49 * If you wish to use this software or functionality therein that may be
50 * covered by patents for commercial use, please contact:
51 *     Director of Intellectual Property Licensing
52 *     Office of Strategy and Technology
53 *     Hewlett-Packard Company
54 *     1501 Page Mill Road
55 *     Palo Alto, California  94304
56 *
57 * Redistributions of source code must retain the above copyright notice,
58 * this list of conditions and the following disclaimer.  Redistributions
59 * in binary form must reproduce the above copyright notice, this list of
60 * conditions and the following disclaimer in the documentation and/or
61 * other materials provided with the distribution.  Neither the name of
62 * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
63 * contributors may be used to endorse or promote products derived from
64 * this software without specific prior written permission.  No right of
65 * sublicense is granted herewith.  Derivatives of the software and
66 * output created using the software may be prepared, but only for
67 * Non-Commercial Uses.  Derivatives of the software may be shared with
68 * others provided: (i) the others agree to abide by the list of
69 * conditions herein which includes the Non-Commercial Use restrictions;
70 * and (ii) such Derivatives of the software include the above copyright
71 * notice to acknowledge the contribution from this software where
72 * applicable, this list of conditions and the disclaimer below.
73 *
74 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
75 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
76 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
77 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
78 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
79 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
80 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
81 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
82 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
83 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
84 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
85 *
86 * Authors: Gabe Black
87 */
88
89#include "arch/x86/isa_traits.hh"
90#include "arch/x86/process.hh"
91#include "arch/x86/segmentregs.hh"
92#include "arch/x86/types.hh"
93#include "base/loader/object_file.hh"
94#include "base/loader/elf_object.hh"
95#include "base/misc.hh"
96#include "base/trace.hh"
97#include "cpu/thread_context.hh"
98#include "mem/page_table.hh"
99#include "mem/translating_port.hh"
100#include "sim/process_impl.hh"
101#include "sim/syscall_emul.hh"
102#include "sim/system.hh"
103
104using namespace std;
105using namespace X86ISA;
106
107static const int ReturnValueReg = INTREG_RAX;
108static const int ArgumentReg[] = {
109    INTREG_RDI,
110    INTREG_RSI,
111    INTREG_RDX,
112    //This argument register is r10 for syscalls and rcx for C.
113    INTREG_R10W,
114    //INTREG_RCX,
115    INTREG_R8W,
116    INTREG_R9W
117};
118static const int NumArgumentRegs = sizeof(ArgumentReg) / sizeof(const int);
119static const int ArgumentReg32[] = {
120    INTREG_EBX,
121    INTREG_ECX,
122    INTREG_EDX,
123    INTREG_ESI,
124    INTREG_EDI,
125};
126static const int NumArgumentRegs32 = sizeof(ArgumentReg) / sizeof(const int);
127
128X86LiveProcess::X86LiveProcess(LiveProcessParams * params, ObjectFile *objFile,
129        SyscallDesc *_syscallDescs, int _numSyscallDescs) :
130    LiveProcess(params, objFile), syscallDescs(_syscallDescs),
131    numSyscallDescs(_numSyscallDescs)
132{
133    brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
134    brk_point = roundUp(brk_point, VMPageSize);
135}
136
137X86_64LiveProcess::X86_64LiveProcess(LiveProcessParams *params,
138        ObjectFile *objFile, SyscallDesc *_syscallDescs,
139        int _numSyscallDescs) :
140    X86LiveProcess(params, objFile, _syscallDescs, _numSyscallDescs)
141{
142    // Set up stack. On X86_64 Linux, stack goes from the top of memory
143    // downward, less the hole for the kernel address space plus one page
144    // for undertermined purposes.
145    stack_base = (Addr)0x7FFFFFFFF000ULL;
146
147    // Set pointer for next thread stack.  Reserve 8M for main stack.
148    next_thread_stack_base = stack_base - (8 * 1024 * 1024);
149
150    // Set up region for mmaps. This was determined empirically and may not
151    // always be correct.
152    mmap_start = mmap_end = (Addr)0x2aaaaaaab000ULL;
153}
154
155void
156I386LiveProcess::syscall(int64_t callnum, ThreadContext *tc)
157{
158    Addr eip = tc->readPC();
159    if (eip >= vsyscallPage.base &&
160            eip < vsyscallPage.base + vsyscallPage.size) {
161        tc->setNextPC(vsyscallPage.base + vsyscallPage.vsysexitOffset);
162    }
163    X86LiveProcess::syscall(callnum, tc);
164}
165
166
167I386LiveProcess::I386LiveProcess(LiveProcessParams *params,
168        ObjectFile *objFile, SyscallDesc *_syscallDescs,
169        int _numSyscallDescs) :
170    X86LiveProcess(params, objFile, _syscallDescs, _numSyscallDescs)
171{
172    _gdtStart = 0x100000000;
173    _gdtSize = VMPageSize;
174
175    vsyscallPage.base = 0xffffe000ULL;
176    vsyscallPage.size = VMPageSize;
177    vsyscallPage.vsyscallOffset = 0x400;
178    vsyscallPage.vsysexitOffset = 0x410;
179
180    stack_base = vsyscallPage.base;
181
182    // Set pointer for next thread stack.  Reserve 8M for main stack.
183    next_thread_stack_base = stack_base - (8 * 1024 * 1024);
184
185    // Set up region for mmaps. This was determined empirically and may not
186    // always be correct.
187    mmap_start = mmap_end = (Addr)0xf7ffd000ULL;
188}
189
190SyscallDesc*
191X86LiveProcess::getDesc(int callnum)
192{
193    if (callnum < 0 || callnum >= numSyscallDescs)
194        return NULL;
195    return &syscallDescs[callnum];
196}
197
198void
199X86_64LiveProcess::startup()
200{
201    LiveProcess::startup();
202
203    if (checkpointRestored)
204        return;
205
206    argsInit(sizeof(uint64_t), VMPageSize);
207
208    for (int i = 0; i < contextIds.size(); i++) {
209        ThreadContext * tc = system->getThreadContext(contextIds[i]);
210
211        SegAttr dataAttr = 0;
212        dataAttr.writable = 1;
213        dataAttr.readable = 1;
214        dataAttr.expandDown = 0;
215        dataAttr.dpl = 3;
216        dataAttr.defaultSize = 0;
217        dataAttr.longMode = 1;
218
219        //Initialize the segment registers.
220        for(int seg = 0; seg < NUM_SEGMENTREGS; seg++) {
221            tc->setMiscRegNoEffect(MISCREG_SEG_BASE(seg), 0);
222            tc->setMiscRegNoEffect(MISCREG_SEG_EFF_BASE(seg), 0);
223            tc->setMiscRegNoEffect(MISCREG_SEG_ATTR(seg), dataAttr);
224        }
225
226        SegAttr csAttr = 0;
227        csAttr.writable = 0;
228        csAttr.readable = 1;
229        csAttr.expandDown = 0;
230        csAttr.dpl = 3;
231        csAttr.defaultSize = 0;
232        csAttr.longMode = 1;
233
234        tc->setMiscRegNoEffect(MISCREG_CS_ATTR, csAttr);
235
236        //Set up the registers that describe the operating mode.
237        CR0 cr0 = 0;
238        cr0.pg = 1; // Turn on paging.
239        cr0.cd = 0; // Don't disable caching.
240        cr0.nw = 0; // This is bit is defined to be ignored.
241        cr0.am = 0; // No alignment checking
242        cr0.wp = 0; // Supervisor mode can write read only pages
243        cr0.ne = 1;
244        cr0.et = 1; // This should always be 1
245        cr0.ts = 0; // We don't do task switching, so causing fp exceptions
246                    // would be pointless.
247        cr0.em = 0; // Allow x87 instructions to execute natively.
248        cr0.mp = 1; // This doesn't really matter, but the manual suggests
249                    // setting it to one.
250        cr0.pe = 1; // We're definitely in protected mode.
251        tc->setMiscReg(MISCREG_CR0, cr0);
252
253        Efer efer = 0;
254        efer.sce = 1; // Enable system call extensions.
255        efer.lme = 1; // Enable long mode.
256        efer.lma = 1; // Activate long mode.
257        efer.nxe = 1; // Enable nx support.
258        efer.svme = 0; // Disable svm support for now. It isn't implemented.
259        efer.ffxsr = 1; // Turn on fast fxsave and fxrstor.
260        tc->setMiscReg(MISCREG_EFER, efer);
261    }
262}
263
264void
265I386LiveProcess::startup()
266{
267    LiveProcess::startup();
268
269    if (checkpointRestored)
270        return;
271
272    argsInit(sizeof(uint32_t), VMPageSize);
273
274    /*
275     * Set up a GDT for this process. The whole GDT wouldn't really be for
276     * this process, but the only parts we care about are.
277     */
278    pTable->allocate(_gdtStart, _gdtSize);
279    uint64_t zero = 0;
280    assert(_gdtSize % sizeof(zero) == 0);
281    for (Addr gdtCurrent = _gdtStart;
282            gdtCurrent < _gdtStart + _gdtSize; gdtCurrent += sizeof(zero)) {
283        initVirtMem->write(gdtCurrent, zero);
284    }
285
286    // Set up the vsyscall page for this process.
287    pTable->allocate(vsyscallPage.base, vsyscallPage.size);
288    uint8_t vsyscallBlob[] = {
289        0x51,       // push %ecx
290        0x52,       // push %edp
291        0x55,       // push %ebp
292        0x89, 0xe5, // mov %esp, %ebp
293        0x0f, 0x34  // sysenter
294    };
295    initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vsyscallOffset,
296            vsyscallBlob, sizeof(vsyscallBlob));
297
298    uint8_t vsysexitBlob[] = {
299        0x5d,       // pop %ebp
300        0x5a,       // pop %edx
301        0x59,       // pop %ecx
302        0xc3        // ret
303    };
304    initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vsysexitOffset,
305            vsysexitBlob, sizeof(vsysexitBlob));
306
307    for (int i = 0; i < contextIds.size(); i++) {
308        ThreadContext * tc = system->getThreadContext(contextIds[i]);
309
310        SegAttr dataAttr = 0;
311        dataAttr.writable = 1;
312        dataAttr.readable = 1;
313        dataAttr.expandDown = 0;
314        dataAttr.dpl = 3;
315        dataAttr.defaultSize = 1;
316        dataAttr.longMode = 0;
317
318        //Initialize the segment registers.
319        for(int seg = 0; seg < NUM_SEGMENTREGS; seg++) {
320            tc->setMiscRegNoEffect(MISCREG_SEG_BASE(seg), 0);
321            tc->setMiscRegNoEffect(MISCREG_SEG_EFF_BASE(seg), 0);
322            tc->setMiscRegNoEffect(MISCREG_SEG_ATTR(seg), dataAttr);
323            tc->setMiscRegNoEffect(MISCREG_SEG_SEL(seg), 0xB);
324            tc->setMiscRegNoEffect(MISCREG_SEG_LIMIT(seg), (uint32_t)(-1));
325        }
326
327        SegAttr csAttr = 0;
328        csAttr.writable = 0;
329        csAttr.readable = 1;
330        csAttr.expandDown = 0;
331        csAttr.dpl = 3;
332        csAttr.defaultSize = 1;
333        csAttr.longMode = 0;
334
335        tc->setMiscRegNoEffect(MISCREG_CS_ATTR, csAttr);
336
337        tc->setMiscRegNoEffect(MISCREG_TSG_BASE, _gdtStart);
338        tc->setMiscRegNoEffect(MISCREG_TSG_EFF_BASE, _gdtStart);
339        tc->setMiscRegNoEffect(MISCREG_TSG_LIMIT, _gdtStart + _gdtSize - 1);
340
341        // Set the LDT selector to 0 to deactivate it.
342        tc->setMiscRegNoEffect(MISCREG_TSL, 0);
343
344        //Set up the registers that describe the operating mode.
345        CR0 cr0 = 0;
346        cr0.pg = 1; // Turn on paging.
347        cr0.cd = 0; // Don't disable caching.
348        cr0.nw = 0; // This is bit is defined to be ignored.
349        cr0.am = 0; // No alignment checking
350        cr0.wp = 0; // Supervisor mode can write read only pages
351        cr0.ne = 1;
352        cr0.et = 1; // This should always be 1
353        cr0.ts = 0; // We don't do task switching, so causing fp exceptions
354                    // would be pointless.
355        cr0.em = 0; // Allow x87 instructions to execute natively.
356        cr0.mp = 1; // This doesn't really matter, but the manual suggests
357                    // setting it to one.
358        cr0.pe = 1; // We're definitely in protected mode.
359        tc->setMiscReg(MISCREG_CR0, cr0);
360
361        Efer efer = 0;
362        efer.sce = 1; // Enable system call extensions.
363        efer.lme = 1; // Enable long mode.
364        efer.lma = 0; // Deactivate long mode.
365        efer.nxe = 1; // Enable nx support.
366        efer.svme = 0; // Disable svm support for now. It isn't implemented.
367        efer.ffxsr = 1; // Turn on fast fxsave and fxrstor.
368        tc->setMiscReg(MISCREG_EFER, efer);
369    }
370}
371
372template<class IntType>
373void
374X86LiveProcess::argsInit(int pageSize,
375        std::vector<AuxVector<IntType> > extraAuxvs)
376{
377    int intSize = sizeof(IntType);
378
379    typedef AuxVector<IntType> auxv_t;
380    std::vector<auxv_t> auxv = extraAuxvs;
381
382    string filename;
383    if(argv.size() < 1)
384        filename = "";
385    else
386        filename = argv[0];
387
388    //We want 16 byte alignment
389    uint64_t align = 16;
390
391    // load object file into target memory
392    objFile->loadSections(initVirtMem);
393
394    enum X86CpuFeature {
395        X86_OnboardFPU = 1 << 0,
396        X86_VirtualModeExtensions = 1 << 1,
397        X86_DebuggingExtensions = 1 << 2,
398        X86_PageSizeExtensions = 1 << 3,
399
400        X86_TimeStampCounter = 1 << 4,
401        X86_ModelSpecificRegisters = 1 << 5,
402        X86_PhysicalAddressExtensions = 1 << 6,
403        X86_MachineCheckExtensions = 1 << 7,
404
405        X86_CMPXCHG8Instruction = 1 << 8,
406        X86_OnboardAPIC = 1 << 9,
407        X86_SYSENTER_SYSEXIT = 1 << 11,
408
409        X86_MemoryTypeRangeRegisters = 1 << 12,
410        X86_PageGlobalEnable = 1 << 13,
411        X86_MachineCheckArchitecture = 1 << 14,
412        X86_CMOVInstruction = 1 << 15,
413
414        X86_PageAttributeTable = 1 << 16,
415        X86_36BitPSEs = 1 << 17,
416        X86_ProcessorSerialNumber = 1 << 18,
417        X86_CLFLUSHInstruction = 1 << 19,
418
419        X86_DebugTraceStore = 1 << 21,
420        X86_ACPIViaMSR = 1 << 22,
421        X86_MultimediaExtensions = 1 << 23,
422
423        X86_FXSAVE_FXRSTOR = 1 << 24,
424        X86_StreamingSIMDExtensions = 1 << 25,
425        X86_StreamingSIMDExtensions2 = 1 << 26,
426        X86_CPUSelfSnoop = 1 << 27,
427
428        X86_HyperThreading = 1 << 28,
429        X86_AutomaticClockControl = 1 << 29,
430        X86_IA64Processor = 1 << 30
431    };
432
433    //Setup the auxilliary vectors. These will already have endian conversion.
434    //Auxilliary vectors are loaded only for elf formatted executables.
435    ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
436    if(elfObject)
437    {
438        uint64_t features =
439            X86_OnboardFPU |
440            X86_VirtualModeExtensions |
441            X86_DebuggingExtensions |
442            X86_PageSizeExtensions |
443            X86_TimeStampCounter |
444            X86_ModelSpecificRegisters |
445            X86_PhysicalAddressExtensions |
446            X86_MachineCheckExtensions |
447            X86_CMPXCHG8Instruction |
448            X86_OnboardAPIC |
449            X86_SYSENTER_SYSEXIT |
450            X86_MemoryTypeRangeRegisters |
451            X86_PageGlobalEnable |
452            X86_MachineCheckArchitecture |
453            X86_CMOVInstruction |
454            X86_PageAttributeTable |
455            X86_36BitPSEs |
456//            X86_ProcessorSerialNumber |
457            X86_CLFLUSHInstruction |
458//            X86_DebugTraceStore |
459//            X86_ACPIViaMSR |
460            X86_MultimediaExtensions |
461            X86_FXSAVE_FXRSTOR |
462            X86_StreamingSIMDExtensions |
463            X86_StreamingSIMDExtensions2 |
464//            X86_CPUSelfSnoop |
465//            X86_HyperThreading |
466//            X86_AutomaticClockControl |
467//            X86_IA64Processor |
468            0;
469
470        //Bits which describe the system hardware capabilities
471        //XXX Figure out what these should be
472        auxv.push_back(auxv_t(M5_AT_HWCAP, features));
473        //The system page size
474        auxv.push_back(auxv_t(M5_AT_PAGESZ, X86ISA::VMPageSize));
475        //Frequency at which times() increments
476        auxv.push_back(auxv_t(M5_AT_CLKTCK, 100));
477        // For statically linked executables, this is the virtual address of the
478        // program header tables if they appear in the executable image
479        auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable()));
480        // This is the size of a program header entry from the elf file.
481        auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize()));
482        // This is the number of program headers from the original elf file.
483        auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount()));
484        //Defined to be 100 in the kernel source.
485        //This is the address of the elf "interpreter", It should be set
486        //to 0 for regular executables. It should be something else
487        //(not sure what) for dynamic libraries.
488        auxv.push_back(auxv_t(M5_AT_BASE, 0));
489
490        //XXX Figure out what this should be.
491        auxv.push_back(auxv_t(M5_AT_FLAGS, 0));
492        //The entry point to the program
493        auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint()));
494        //Different user and group IDs
495        auxv.push_back(auxv_t(M5_AT_UID, uid()));
496        auxv.push_back(auxv_t(M5_AT_EUID, euid()));
497        auxv.push_back(auxv_t(M5_AT_GID, gid()));
498        auxv.push_back(auxv_t(M5_AT_EGID, egid()));
499        //Whether to enable "secure mode" in the executable
500        auxv.push_back(auxv_t(M5_AT_SECURE, 0));
501        //The string "x86_64" with unknown meaning
502        auxv.push_back(auxv_t(M5_AT_PLATFORM, 0));
503    }
504
505    //Figure out how big the initial stack needs to be
506
507    // A sentry NULL void pointer at the top of the stack.
508    int sentry_size = intSize;
509
510    //This is the name of the file which is present on the initial stack
511    //It's purpose is to let the user space linker examine the original file.
512    int file_name_size = filename.size() + 1;
513
514    string platform = "x86_64";
515    int aux_data_size = platform.size() + 1;
516
517    int env_data_size = 0;
518    for (int i = 0; i < envp.size(); ++i) {
519        env_data_size += envp[i].size() + 1;
520    }
521    int arg_data_size = 0;
522    for (int i = 0; i < argv.size(); ++i) {
523        arg_data_size += argv[i].size() + 1;
524    }
525
526    //The info_block needs to be padded so it's size is a multiple of the
527    //alignment mask. Also, it appears that there needs to be at least some
528    //padding, so if the size is already a multiple, we need to increase it
529    //anyway.
530    int base_info_block_size =
531        sentry_size + file_name_size + env_data_size + arg_data_size;
532
533    int info_block_size = roundUp(base_info_block_size, align);
534
535    int info_block_padding = info_block_size - base_info_block_size;
536
537    //Each auxilliary vector is two 8 byte words
538    int aux_array_size = intSize * 2 * (auxv.size() + 1);
539
540    int envp_array_size = intSize * (envp.size() + 1);
541    int argv_array_size = intSize * (argv.size() + 1);
542
543    int argc_size = intSize;
544
545    //Figure out the size of the contents of the actual initial frame
546    int frame_size =
547        aux_array_size +
548        envp_array_size +
549        argv_array_size +
550        argc_size;
551
552    //There needs to be padding after the auxiliary vector data so that the
553    //very bottom of the stack is aligned properly.
554    int partial_size = frame_size + aux_data_size;
555    int aligned_partial_size = roundUp(partial_size, align);
556    int aux_padding = aligned_partial_size - partial_size;
557
558    int space_needed =
559        info_block_size +
560        aux_data_size +
561        aux_padding +
562        frame_size;
563
564    stack_min = stack_base - space_needed;
565    stack_min = roundDown(stack_min, align);
566    stack_size = stack_base - stack_min;
567
568    // map memory
569    pTable->allocate(roundDown(stack_min, pageSize),
570                     roundUp(stack_size, pageSize));
571
572    // map out initial stack contents
573    IntType sentry_base = stack_base - sentry_size;
574    IntType file_name_base = sentry_base - file_name_size;
575    IntType env_data_base = file_name_base - env_data_size;
576    IntType arg_data_base = env_data_base - arg_data_size;
577    IntType aux_data_base = arg_data_base - info_block_padding - aux_data_size;
578    IntType auxv_array_base = aux_data_base - aux_array_size - aux_padding;
579    IntType envp_array_base = auxv_array_base - envp_array_size;
580    IntType argv_array_base = envp_array_base - argv_array_size;
581    IntType argc_base = argv_array_base - argc_size;
582
583    DPRINTF(Stack, "The addresses of items on the initial stack:\n");
584    DPRINTF(Stack, "0x%x - file name\n", file_name_base);
585    DPRINTF(Stack, "0x%x - env data\n", env_data_base);
586    DPRINTF(Stack, "0x%x - arg data\n", arg_data_base);
587    DPRINTF(Stack, "0x%x - aux data\n", aux_data_base);
588    DPRINTF(Stack, "0x%x - auxv array\n", auxv_array_base);
589    DPRINTF(Stack, "0x%x - envp array\n", envp_array_base);
590    DPRINTF(Stack, "0x%x - argv array\n", argv_array_base);
591    DPRINTF(Stack, "0x%x - argc \n", argc_base);
592    DPRINTF(Stack, "0x%x - stack min\n", stack_min);
593
594    // write contents to stack
595
596    // figure out argc
597    IntType argc = argv.size();
598    IntType guestArgc = X86ISA::htog(argc);
599
600    //Write out the sentry void *
601    IntType sentry_NULL = 0;
602    initVirtMem->writeBlob(sentry_base,
603            (uint8_t*)&sentry_NULL, sentry_size);
604
605    //Write the file name
606    initVirtMem->writeString(file_name_base, filename.c_str());
607
608    //Fix up the aux vector which points to the "platform" string
609    assert(auxv[auxv.size() - 1].a_type = M5_AT_PLATFORM);
610    auxv[auxv.size() - 1].a_val = aux_data_base;
611
612    //Copy the aux stuff
613    for(int x = 0; x < auxv.size(); x++)
614    {
615        initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize,
616                (uint8_t*)&(auxv[x].a_type), intSize);
617        initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
618                (uint8_t*)&(auxv[x].a_val), intSize);
619    }
620    //Write out the terminating zeroed auxilliary vector
621    const uint64_t zero = 0;
622    initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(),
623            (uint8_t*)&zero, 2 * intSize);
624
625    initVirtMem->writeString(aux_data_base, platform.c_str());
626
627    copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
628    copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
629
630    initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
631
632    ThreadContext *tc = system->getThreadContext(contextIds[0]);
633    //Set the stack pointer register
634    tc->setIntReg(StackPointerReg, stack_min);
635
636    Addr prog_entry = objFile->entryPoint();
637    // There doesn't need to be any segment base added in since we're dealing
638    // with the flat segmentation model.
639    tc->setPC(prog_entry);
640    tc->setNextPC(prog_entry + sizeof(MachInst));
641
642    //Align the "stack_min" to a page boundary.
643    stack_min = roundDown(stack_min, pageSize);
644
645//    num_processes++;
646}
647
648void
649X86_64LiveProcess::argsInit(int intSize, int pageSize)
650{
651    std::vector<AuxVector<uint64_t> > extraAuxvs;
652    X86LiveProcess::argsInit<uint64_t>(pageSize, extraAuxvs);
653}
654
655void
656I386LiveProcess::argsInit(int intSize, int pageSize)
657{
658    std::vector<AuxVector<uint32_t> > extraAuxvs;
659    //Tell the binary where the vsyscall part of the vsyscall page is.
660    extraAuxvs.push_back(AuxVector<uint32_t>(0x20,
661                vsyscallPage.base + vsyscallPage.vsyscallOffset));
662    extraAuxvs.push_back(AuxVector<uint32_t>(0x21, vsyscallPage.base));
663    X86LiveProcess::argsInit<uint32_t>(pageSize, extraAuxvs);
664}
665
666void
667X86LiveProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn return_value)
668{
669    tc->setIntReg(INTREG_RAX, return_value.value());
670}
671
672X86ISA::IntReg
673X86_64LiveProcess::getSyscallArg(ThreadContext *tc, int i)
674{
675    assert(i < NumArgumentRegs);
676    return tc->readIntReg(ArgumentReg[i]);
677}
678
679void
680X86_64LiveProcess::setSyscallArg(ThreadContext *tc, int i, X86ISA::IntReg val)
681{
682    assert(i < NumArgumentRegs);
683    return tc->setIntReg(ArgumentReg[i], val);
684}
685
686X86ISA::IntReg
687I386LiveProcess::getSyscallArg(ThreadContext *tc, int i)
688{
689    assert(i < NumArgumentRegs32);
690    return tc->readIntReg(ArgumentReg32[i]);
691}
692
693void
694I386LiveProcess::setSyscallArg(ThreadContext *tc, int i, X86ISA::IntReg val)
695{
696    assert(i < NumArgumentRegs);
697    return tc->setIntReg(ArgumentReg[i], val);
698}
699