memhelpers.hh revision 8442:b1f3dfae06f1
1/* 2 * Copyright (c) 2011 Google 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 */ 30 31#ifndef __ARCH_X86_MEMHELPERS_HH__ 32#define __ARCH_X86_MEMHELPERS_HH__ 33 34#include "base/types.hh" 35#include "sim/byteswap.hh" 36#include "sim/fault_fwd.hh" 37#include "sim/insttracer.hh" 38 39namespace X86ISA 40{ 41 42template <class XC> 43Fault 44readMemTiming(XC *xc, Trace::InstRecord *traceData, Addr addr, 45 uint64_t &mem, unsigned dataSize, unsigned flags) 46{ 47 return xc->readBytes(addr, (uint8_t *)&mem, dataSize, flags); 48} 49 50static inline uint64_t 51getMem(PacketPtr pkt, unsigned dataSize, Trace::InstRecord *traceData) 52{ 53 uint64_t mem; 54 switch (dataSize) { 55 case 1: 56 mem = pkt->get<uint8_t>(); 57 break; 58 case 2: 59 mem = pkt->get<uint16_t>(); 60 break; 61 case 4: 62 mem = pkt->get<uint32_t>(); 63 break; 64 case 8: 65 mem = pkt->get<uint64_t>(); 66 break; 67 default: 68 panic("Unhandled size in getMem.\n"); 69 } 70 if (traceData) 71 traceData->setData(mem); 72 return mem; 73} 74 75template <class XC> 76Fault 77readMemAtomic(XC *xc, Trace::InstRecord *traceData, Addr addr, uint64_t &mem, 78 unsigned dataSize, unsigned flags) 79{ 80 memset(&mem, 0, sizeof(mem)); 81 Fault fault = readMemTiming(xc, traceData, addr, mem, dataSize, flags); 82 if (fault == NoFault) { 83 // If LE to LE, this is a nop, if LE to BE, the actual data ends up 84 // in the right place because the LSBs where at the low addresses on 85 // access. This doesn't work for BE guests. 86 mem = gtoh(mem); 87 if (traceData) 88 traceData->setData(mem); 89 } 90 return fault; 91} 92 93template <class XC> 94Fault 95writeMemTiming(XC *xc, Trace::InstRecord *traceData, uint64_t mem, 96 unsigned dataSize, Addr addr, unsigned flags, uint64_t *res) 97{ 98 if (traceData) { 99 traceData->setData(mem); 100 } 101 mem = TheISA::htog(mem); 102 return xc->writeBytes((uint8_t *)&mem, dataSize, addr, flags, res); 103} 104 105template <class XC> 106Fault 107writeMemAtomic(XC *xc, Trace::InstRecord *traceData, uint64_t mem, 108 unsigned dataSize, Addr addr, unsigned flags, uint64_t *res) 109{ 110 Fault fault = writeMemTiming(xc, traceData, mem, dataSize, addr, flags, 111 res); 112 if (fault == NoFault && res != NULL) { 113 *res = gtoh(*res); 114 } 115 return fault; 116} 117 118} 119 120#endif 121