memhelpers.hh revision 12234:78ece221f9f5 
1/*
2 * Copyright (c) 2011 Google
3 * Copyright (c) 2015 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * Authors: Gabe Black
30 */
31
32#ifndef __ARCH_X86_MEMHELPERS_HH__
33#define __ARCH_X86_MEMHELPERS_HH__
34
35#include <array>
36
37#include "base/types.hh"
38#include "cpu/exec_context.hh"
39#include "sim/byteswap.hh"
40#include "sim/insttracer.hh"
41
42namespace X86ISA
43{
44
45/// Initiate a read from memory in timing mode.
46static Fault
47initiateMemRead(ExecContext *xc, Trace::InstRecord *traceData, Addr addr,
48                unsigned dataSize, Request::Flags flags)
49{
50    return xc->initiateMemRead(addr, dataSize, flags);
51}
52
53static void
54getMem(PacketPtr pkt, uint64_t &mem, unsigned dataSize,
55       Trace::InstRecord *traceData)
56{
57    switch (dataSize) {
58      case 1:
59        mem = pkt->get<uint8_t>();
60        break;
61      case 2:
62        mem = pkt->get<uint16_t>();
63        break;
64      case 4:
65        mem = pkt->get<uint32_t>();
66        break;
67      case 8:
68        mem = pkt->get<uint64_t>();
69        break;
70      default:
71        panic("Unhandled size in getMem.\n");
72    }
73    if (traceData)
74        traceData->setData(mem);
75}
76
77
78template <size_t N>
79void
80getMem(PacketPtr pkt, std::array<uint64_t, N> &mem, unsigned dataSize,
81       Trace::InstRecord *traceData)
82{
83    assert(dataSize >= 8);
84    assert((dataSize % 8) == 0);
85
86    int num_words = dataSize / 8;
87    assert(num_words <= N);
88
89    auto pkt_data = pkt->getConstPtr<const uint64_t>();
90    for (int i = 0; i < num_words; ++i)
91        mem[i] = gtoh(pkt_data[i]);
92
93    // traceData record only has space for 64 bits, so we just record
94    // the first qword
95    if (traceData)
96        traceData->setData(mem[0]);
97}
98
99
100static Fault
101readMemAtomic(ExecContext *xc, Trace::InstRecord *traceData, Addr addr,
102              uint64_t &mem, unsigned dataSize, Request::Flags flags)
103{
104    memset(&mem, 0, sizeof(mem));
105    Fault fault = xc->readMem(addr, (uint8_t *)&mem, dataSize, flags);
106    if (fault == NoFault) {
107        // If LE to LE, this is a nop, if LE to BE, the actual data ends up
108        // in the right place because the LSBs where at the low addresses on
109        // access. This doesn't work for BE guests.
110        mem = gtoh(mem);
111        if (traceData)
112            traceData->setData(mem);
113    }
114    return fault;
115}
116
117template <size_t N>
118Fault
119readMemAtomic(ExecContext *xc, Trace::InstRecord *traceData, Addr addr,
120              std::array<uint64_t, N> &mem, unsigned dataSize,
121              unsigned flags)
122{
123    assert(dataSize >= 8);
124    assert((dataSize % 8) == 0);
125
126    Fault fault = xc->readMem(addr, (uint8_t *)&mem, dataSize, flags);
127
128    if (fault == NoFault) {
129        int num_words = dataSize / 8;
130        assert(num_words <= N);
131
132        for (int i = 0; i < num_words; ++i)
133            mem[i] = gtoh(mem[i]);
134
135        if (traceData)
136            traceData->setData(mem[0]);
137    }
138    return fault;
139}
140
141static Fault
142writeMemTiming(ExecContext *xc, Trace::InstRecord *traceData, uint64_t mem,
143               unsigned dataSize, Addr addr, Request::Flags flags,
144               uint64_t *res)
145{
146    if (traceData) {
147        traceData->setData(mem);
148    }
149    mem = TheISA::htog(mem);
150    return xc->writeMem((uint8_t *)&mem, dataSize, addr, flags, res);
151}
152
153template <size_t N>
154Fault
155writeMemTiming(ExecContext *xc, Trace::InstRecord *traceData,
156               std::array<uint64_t, N> &mem, unsigned dataSize,
157               Addr addr, unsigned flags, uint64_t *res)
158{
159    assert(dataSize >= 8);
160    assert((dataSize % 8) == 0);
161
162    if (traceData) {
163        traceData->setData(mem[0]);
164    }
165
166    int num_words = dataSize / 8;
167    assert(num_words <= N);
168
169    for (int i = 0; i < num_words; ++i)
170        mem[i] = htog(mem[i]);
171
172    return xc->writeMem((uint8_t *)&mem, dataSize, addr, flags, res);
173}
174
175static Fault
176writeMemAtomic(ExecContext *xc, Trace::InstRecord *traceData, uint64_t mem,
177               unsigned dataSize, Addr addr, Request::Flags flags,
178               uint64_t *res)
179{
180    if (traceData) {
181        traceData->setData(mem);
182    }
183    uint64_t host_mem = TheISA::htog(mem);
184    Fault fault =
185          xc->writeMem((uint8_t *)&host_mem, dataSize, addr, flags, res);
186    if (fault == NoFault && res != NULL) {
187        *res = gtoh(*res);
188    }
189    return fault;
190}
191
192template <size_t N>
193Fault
194writeMemAtomic(ExecContext *xc, Trace::InstRecord *traceData,
195               std::array<uint64_t, N> &mem, unsigned dataSize,
196               Addr addr, unsigned flags, uint64_t *res)
197{
198    if (traceData) {
199        traceData->setData(mem[0]);
200    }
201
202    int num_words = dataSize / 8;
203    assert(num_words <= N);
204
205    for (int i = 0; i < num_words; ++i)
206        mem[i] = htog(mem[i]);
207
208    Fault fault = xc->writeMem((uint8_t *)&mem, dataSize, addr, flags, res);
209
210    if (fault == NoFault && res != NULL) {
211        *res = gtoh(*res);
212    }
213
214    return fault;
215}
216
217}
218
219#endif
220