memhelpers.hh revision 10474:799c8ee4ecba 
1/*
2 * Copyright (c) 2011 Google
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#ifndef __ARCH_X86_MEMHELPERS_HH__
32#define __ARCH_X86_MEMHELPERS_HH__
33
34#include "base/types.hh"
35#include "sim/byteswap.hh"
36#include "sim/insttracer.hh"
37
38namespace X86ISA
39{
40
41template <class XC>
42Fault
43readMemTiming(XC *xc, Trace::InstRecord *traceData, Addr addr,
44        uint64_t &mem, unsigned dataSize, unsigned flags)
45{
46    return xc->readMem(addr, (uint8_t *)&mem, dataSize, flags);
47}
48
49static inline uint64_t
50getMem(PacketPtr pkt, unsigned dataSize, Trace::InstRecord *traceData)
51{
52    uint64_t mem;
53    switch (dataSize) {
54      case 1:
55        mem = pkt->get<uint8_t>();
56        break;
57      case 2:
58        mem = pkt->get<uint16_t>();
59        break;
60      case 4:
61        mem = pkt->get<uint32_t>();
62        break;
63      case 8:
64        mem = pkt->get<uint64_t>();
65        break;
66      default:
67        panic("Unhandled size in getMem.\n");
68    }
69    if (traceData)
70        traceData->setData(mem);
71    return mem;
72}
73
74template <class XC>
75Fault
76readMemAtomic(XC *xc, Trace::InstRecord *traceData, Addr addr, uint64_t &mem,
77        unsigned dataSize, unsigned flags)
78{
79    memset(&mem, 0, sizeof(mem));
80    Fault fault = readMemTiming(xc, traceData, addr, mem, dataSize, flags);
81    if (fault == NoFault) {
82        // If LE to LE, this is a nop, if LE to BE, the actual data ends up
83        // in the right place because the LSBs where at the low addresses on
84        // access. This doesn't work for BE guests.
85        mem = gtoh(mem);
86        if (traceData)
87            traceData->setData(mem);
88    }
89    return fault;
90}
91
92template <class XC>
93Fault
94writeMemTiming(XC *xc, Trace::InstRecord *traceData, uint64_t mem,
95        unsigned dataSize, Addr addr, unsigned flags, uint64_t *res)
96{
97    if (traceData) {
98        traceData->setData(mem);
99    }
100    mem = TheISA::htog(mem);
101    return xc->writeMem((uint8_t *)&mem, dataSize, addr, flags, res);
102}
103
104template <class XC>
105Fault
106writeMemAtomic(XC *xc, Trace::InstRecord *traceData, uint64_t mem,
107        unsigned dataSize, Addr addr, unsigned flags, uint64_t *res)
108{
109    Fault fault = writeMemTiming(xc, traceData, mem, dataSize, addr, flags,
110            res);
111    if (fault == NoFault && res != NULL) {
112        *res = gtoh(*res);
113    }
114    return fault;
115}
116
117}
118
119#endif
120