ldstflags.hh revision 5912
12623SN/A/* 22623SN/A * Copyright (c) 2007 The Hewlett-Packard Development Company 32623SN/A * All rights reserved. 42623SN/A * 52623SN/A * Redistribution and use of this software in source and binary forms, 62623SN/A * with or without modification, are permitted provided that the 72623SN/A * following conditions are met: 82623SN/A * 92623SN/A * The software must be used only for Non-Commercial Use which means any 102623SN/A * use which is NOT directed to receiving any direct monetary 112623SN/A * compensation for, or commercial advantage from such use. Illustrative 122623SN/A * examples of non-commercial use are academic research, personal study, 132623SN/A * teaching, education and corporate research & development. 142623SN/A * Illustrative examples of commercial use are distributing products for 152623SN/A * commercial advantage and providing services using the software for 162623SN/A * commercial advantage. 172623SN/A * 182623SN/A * If you wish to use this software or functionality therein that may be 192623SN/A * covered by patents for commercial use, please contact: 202623SN/A * Director of Intellectual Property Licensing 212623SN/A * Office of Strategy and Technology 222623SN/A * Hewlett-Packard Company 232623SN/A * 1501 Page Mill Road 242623SN/A * Palo Alto, California 94304 252623SN/A * 262623SN/A * Redistributions of source code must retain the above copyright notice, 272665Ssaidi@eecs.umich.edu * this list of conditions and the following disclaimer. Redistributions 282665Ssaidi@eecs.umich.edu * in binary form must reproduce the above copyright notice, this list of 292623SN/A * conditions and the following disclaimer in the documentation and/or 302623SN/A * other materials provided with the distribution. Neither the name of 313170Sstever@eecs.umich.edu * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its 323806Ssaidi@eecs.umich.edu * contributors may be used to endorse or promote products derived from 332623SN/A * this software without specific prior written permission. No right of 344040Ssaidi@eecs.umich.edu * sublicense is granted herewith. Derivatives of the software and 352623SN/A * output created using the software may be prepared, but only for 362623SN/A * Non-Commercial Uses. Derivatives of the software may be shared with 373348Sbinkertn@umich.edu * others provided: (i) the others agree to abide by the list of 383348Sbinkertn@umich.edu * conditions herein which includes the Non-Commercial Use restrictions; 394762Snate@binkert.org * and (ii) such Derivatives of the software include the above copyright 402901Ssaidi@eecs.umich.edu * notice to acknowledge the contribution from this software where 412623SN/A * applicable, this list of conditions and the disclaimer below. 422623SN/A * 432623SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 442623SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 452623SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 462623SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 472623SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 482623SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 492623SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 502623SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 512623SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 522623SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 532623SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 542623SN/A * 552623SN/A * Authors: Gabe Black 562623SN/A */ 572623SN/A 582623SN/A#ifndef __ARCH_X86_INSTS_MICROLDSTOP_HH__ 592623SN/A#define __ARCH_X86_INSTS_MICROLDSTOP_HH__ 604873Sstever@eecs.umich.edu 612623SN/A#include "arch/x86/insts/microop.hh" 622623SN/A#include "mem/packet.hh" 632856Srdreslin@umich.edu#include "mem/request.hh" 642856Srdreslin@umich.edu 652856Srdreslin@umich.edunamespace X86ISA 662856Srdreslin@umich.edu{ 672856Srdreslin@umich.edu static const Request::FlagsType SegmentFlagMask = mask(4); 682856Srdreslin@umich.edu static const int FlagShift = 4; 692856Srdreslin@umich.edu enum FlagBit { 704968Sacolyte@umich.edu CPL0FlagBit = 1 714968Sacolyte@umich.edu }; 724968Sacolyte@umich.edu 734968Sacolyte@umich.edu /** 742856Srdreslin@umich.edu * Base class for load and store ops 752856Srdreslin@umich.edu */ 762856Srdreslin@umich.edu class LdStOp : public X86MicroopBase 772623SN/A { 782623SN/A protected: 792623SN/A const uint8_t scale; 802623SN/A const RegIndex index; 812623SN/A const RegIndex base; 822623SN/A const uint64_t disp; 832680Sktlim@umich.edu const uint8_t segment; 842680Sktlim@umich.edu const RegIndex data; 852623SN/A const uint8_t dataSize; 862623SN/A const uint8_t addressSize; 872680Sktlim@umich.edu const Request::FlagsType memFlags; 882623SN/A RegIndex foldOBit, foldABit; 892623SN/A 904968Sacolyte@umich.edu //Constructor 914968Sacolyte@umich.edu LdStOp(ExtMachInst _machInst, 924968Sacolyte@umich.edu const char * mnem, const char * _instMnem, 934968Sacolyte@umich.edu bool isMicro, bool isDelayed, bool isFirst, bool isLast, 944968Sacolyte@umich.edu uint8_t _scale, RegIndex _index, RegIndex _base, 954968Sacolyte@umich.edu uint64_t _disp, uint8_t _segment, 962623SN/A RegIndex _data, 972623SN/A uint8_t _dataSize, uint8_t _addressSize, 982623SN/A Request::FlagsType _memFlags, 993349Sbinkertn@umich.edu OpClass __opClass) : 1002623SN/A X86MicroopBase(machInst, mnem, _instMnem, 1013184Srdreslin@umich.edu isMicro, isDelayed, isFirst, isLast, __opClass), 1022623SN/A scale(_scale), index(_index), base(_base), 1032623SN/A disp(_disp), segment(_segment), 1042623SN/A data(_data), 1052623SN/A dataSize(_dataSize), addressSize(_addressSize), 1063349Sbinkertn@umich.edu memFlags(_memFlags | _segment) 1072623SN/A { 1083310Srdreslin@umich.edu foldOBit = (dataSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0; 1093649Srdreslin@umich.edu foldABit = 1102623SN/A (addressSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0; 1112623SN/A } 1122623SN/A 1133349Sbinkertn@umich.edu std::string generateDisassembly(Addr pc, 1142623SN/A const SymbolTable *symtab) const; 1153184Srdreslin@umich.edu 1163184Srdreslin@umich.edu template<class Context, class MemType> 1172623SN/A Fault read(Context *xc, Addr EA, MemType & Mem, unsigned flags) const 1182623SN/A { 1192623SN/A Fault fault = NoFault; 1202623SN/A switch(dataSize) 1212623SN/A { 1223647Srdreslin@umich.edu case 1: 1233647Srdreslin@umich.edu fault = xc->read(EA, (uint8_t&)Mem, flags); 1243647Srdreslin@umich.edu break; 1253647Srdreslin@umich.edu case 2: 1263647Srdreslin@umich.edu fault = xc->read(EA, (uint16_t&)Mem, flags); 1272626SN/A break; 1283647Srdreslin@umich.edu case 4: 1292626SN/A fault = xc->read(EA, (uint32_t&)Mem, flags); 1302623SN/A break; 1312623SN/A case 8: 1322623SN/A fault = xc->read(EA, (uint64_t&)Mem, flags); 1332657Ssaidi@eecs.umich.edu break; 1342623SN/A default: 1352623SN/A panic("Bad operand size %d for read at %#x.\n", dataSize, EA); 1362623SN/A } 1372623SN/A return fault; 1382623SN/A } 1394192Sktlim@umich.edu 1404192Sktlim@umich.edu template<class Context, class MemType> 1414192Sktlim@umich.edu Fault write(Context *xc, MemType & Mem, Addr EA, unsigned flags) const 1424192Sktlim@umich.edu { 1434192Sktlim@umich.edu Fault fault = NoFault; 1444192Sktlim@umich.edu switch(dataSize) 1454192Sktlim@umich.edu { 1464192Sktlim@umich.edu case 1: 1474192Sktlim@umich.edu fault = xc->write((uint8_t&)Mem, EA, flags, 0); 1484192Sktlim@umich.edu break; 1494192Sktlim@umich.edu case 2: 1502623SN/A fault = xc->write((uint16_t&)Mem, EA, flags, 0); 1512623SN/A break; 1522623SN/A case 4: 1532623SN/A fault = xc->write((uint32_t&)Mem, EA, flags, 0); 1544968Sacolyte@umich.edu break; 1554968Sacolyte@umich.edu case 8: 1562623SN/A fault = xc->write((uint64_t&)Mem, EA, flags, 0); 1572623SN/A break; 1582623SN/A default: 1593647Srdreslin@umich.edu panic("Bad operand size %d for write at %#x.\n", dataSize, EA); 1603647Srdreslin@umich.edu } 1613647Srdreslin@umich.edu return fault; 1625169Ssaidi@eecs.umich.edu } 1635169Ssaidi@eecs.umich.edu 1645169Ssaidi@eecs.umich.edu uint64_t 1652623SN/A get(PacketPtr pkt) const 1662623SN/A { 1672623SN/A switch(dataSize) 1682623SN/A { 1692623SN/A case 1: 1702623SN/A return pkt->get<uint8_t>(); 1712623SN/A case 2: 1722623SN/A return pkt->get<uint16_t>(); 1732623SN/A case 4: 1742623SN/A return pkt->get<uint32_t>(); 1752915Sktlim@umich.edu case 8: 1762915Sktlim@umich.edu return pkt->get<uint64_t>(); 1773177Shsul@eecs.umich.edu default: 1783177Shsul@eecs.umich.edu panic("Bad operand size %d for read at %#x.\n", 1793145Shsul@eecs.umich.edu dataSize, pkt->getAddr()); 1802623SN/A } 1812623SN/A } 1822623SN/A }; 1832623SN/A} 1842623SN/A 1852623SN/A#endif //__ARCH_X86_INSTS_MICROLDSTOP_HH__ 1862623SN/A