ldstflags.hh revision 5965
110206Sandreas.hansson@arm.com/* 29243SN/A * Copyright (c) 2007 The Hewlett-Packard Development Company 39243SN/A * All rights reserved. 49243SN/A * 59243SN/A * Redistribution and use of this software in source and binary forms, 69243SN/A * with or without modification, are permitted provided that the 79243SN/A * following conditions are met: 89243SN/A * 99243SN/A * The software must be used only for Non-Commercial Use which means any 109243SN/A * use which is NOT directed to receiving any direct monetary 119243SN/A * compensation for, or commercial advantage from such use. Illustrative 129243SN/A * examples of non-commercial use are academic research, personal study, 139831SN/A * teaching, education and corporate research & development. 149831SN/A * Illustrative examples of commercial use are distributing products for 159831SN/A * commercial advantage and providing services using the software for 169243SN/A * commercial advantage. 179243SN/A * 189243SN/A * If you wish to use this software or functionality therein that may be 199243SN/A * covered by patents for commercial use, please contact: 209243SN/A * Director of Intellectual Property Licensing 219243SN/A * Office of Strategy and Technology 229243SN/A * Hewlett-Packard Company 239243SN/A * 1501 Page Mill Road 249243SN/A * Palo Alto, California 94304 259243SN/A * 269243SN/A * Redistributions of source code must retain the above copyright notice, 279243SN/A * this list of conditions and the following disclaimer. Redistributions 289243SN/A * in binary form must reproduce the above copyright notice, this list of 299243SN/A * conditions and the following disclaimer in the documentation and/or 309243SN/A * other materials provided with the distribution. Neither the name of 319243SN/A * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its 329243SN/A * contributors may be used to endorse or promote products derived from 339243SN/A * this software without specific prior written permission. No right of 349243SN/A * sublicense is granted herewith. Derivatives of the software and 359243SN/A * output created using the software may be prepared, but only for 369243SN/A * Non-Commercial Uses. Derivatives of the software may be shared with 379243SN/A * others provided: (i) the others agree to abide by the list of 389243SN/A * conditions herein which includes the Non-Commercial Use restrictions; 399243SN/A * and (ii) such Derivatives of the software include the above copyright 409243SN/A * notice to acknowledge the contribution from this software where 419243SN/A * applicable, this list of conditions and the disclaimer below. 429243SN/A * 439243SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 449243SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 459243SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 469243SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 479243SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 489243SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 4910136SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 5010136SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 5110136SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 5210136SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 5310136SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 5410136SN/A * 5510136SN/A * Authors: Gabe Black 569243SN/A */ 5710144SN/A 5810144SN/A#ifndef __ARCH_X86_INSTS_MICROLDSTOP_HH__ 5910144SN/A#define __ARCH_X86_INSTS_MICROLDSTOP_HH__ 6010144SN/A 619243SN/A#include "arch/x86/insts/microop.hh" 6210146Sandreas.hansson@arm.com#include "mem/packet.hh" 639243SN/A#include "mem/request.hh" 649243SN/A 659243SN/Anamespace X86ISA 6610146Sandreas.hansson@arm.com{ 6710146Sandreas.hansson@arm.com static const Request::FlagsType SegmentFlagMask = mask(4); 6810146Sandreas.hansson@arm.com static const int FlagShift = 4; 699243SN/A enum FlagBit { 709243SN/A CPL0FlagBit = 1, 719243SN/A AddrSizeFlagBit = 2 729243SN/A }; 739243SN/A 749243SN/A /** 7510145SN/A * Base class for load and store ops 769972SN/A */ 779243SN/A class LdStOp : public X86MicroopBase 7810140SN/A { 7910140SN/A protected: 8010140SN/A const uint8_t scale; 819972SN/A const RegIndex index; 8210140SN/A const RegIndex base; 8310140SN/A const uint64_t disp; 8410140SN/A const uint8_t segment; 8510140SN/A const RegIndex data; 8610140SN/A const uint8_t dataSize; 8710140SN/A const uint8_t addressSize; 8810140SN/A const Request::FlagsType memFlags; 899243SN/A RegIndex foldOBit, foldABit; 909243SN/A 919489SN/A //Constructor 9210136SN/A LdStOp(ExtMachInst _machInst, 9310145SN/A const char * mnem, const char * _instMnem, 949243SN/A bool isMicro, bool isDelayed, bool isFirst, bool isLast, 9510141SN/A uint8_t _scale, RegIndex _index, RegIndex _base, 9610141SN/A uint64_t _disp, uint8_t _segment, 9710141SN/A RegIndex _data, 9810141SN/A uint8_t _dataSize, uint8_t _addressSize, 9910489SOmar.Naji@arm.com Request::FlagsType _memFlags, 10010489SOmar.Naji@arm.com OpClass __opClass) : 10110489SOmar.Naji@arm.com X86MicroopBase(machInst, mnem, _instMnem, 1029726SN/A isMicro, isDelayed, isFirst, isLast, __opClass), 1039726SN/A scale(_scale), index(_index), base(_base), 1049726SN/A disp(_disp), segment(_segment), 1059726SN/A data(_data), 1069726SN/A dataSize(_dataSize), addressSize(_addressSize), 1079726SN/A memFlags(_memFlags | _segment) 1089726SN/A { 1099489SN/A foldOBit = (dataSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0; 1109831SN/A foldABit = 1119831SN/A (addressSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0; 1129831SN/A } 1139831SN/A 1149831SN/A std::string generateDisassembly(Addr pc, 1159831SN/A const SymbolTable *symtab) const; 1169489SN/A 11710394Swendy.elsasser@arm.com template<class Context, class MemType> 11810394Swendy.elsasser@arm.com Fault read(Context *xc, Addr EA, MemType & Mem, unsigned flags) const 11910394Swendy.elsasser@arm.com { 12010394Swendy.elsasser@arm.com Fault fault = NoFault; 12110394Swendy.elsasser@arm.com switch(dataSize) 1229489SN/A { 1239566SN/A case 1: 1249566SN/A fault = xc->read(EA, (uint8_t&)Mem, flags); 1259566SN/A break; 1269566SN/A case 2: 1279489SN/A fault = xc->read(EA, (uint16_t&)Mem, flags); 12810430SOmar.Naji@arm.com break; 12910430SOmar.Naji@arm.com case 4: 13010430SOmar.Naji@arm.com fault = xc->read(EA, (uint32_t&)Mem, flags); 13110430SOmar.Naji@arm.com break; 13210430SOmar.Naji@arm.com case 8: 13310430SOmar.Naji@arm.com fault = xc->read(EA, (uint64_t&)Mem, flags); 13410430SOmar.Naji@arm.com break; 13510430SOmar.Naji@arm.com default: 13610430SOmar.Naji@arm.com panic("Bad operand size %d for read at %#x.\n", dataSize, EA); 1379243SN/A } 1389243SN/A return fault; 13910216Sandreas.hansson@arm.com } 14010216Sandreas.hansson@arm.com 14110216Sandreas.hansson@arm.com template<class Context, class MemType> 1429243SN/A Fault write(Context *xc, MemType & Mem, Addr EA, unsigned flags) const 1439243SN/A { 1449489SN/A Fault fault = NoFault; 1459243SN/A switch(dataSize) 1469243SN/A { 1479489SN/A case 1: 1489243SN/A fault = xc->write((uint8_t&)Mem, EA, flags, 0); 1499243SN/A break; 1509489SN/A case 2: 1519243SN/A fault = xc->write((uint16_t&)Mem, EA, flags, 0); 1529963SN/A break; 1539963SN/A case 4: 1549963SN/A fault = xc->write((uint32_t&)Mem, EA, flags, 0); 15510210Sandreas.hansson@arm.com break; 15610210Sandreas.hansson@arm.com case 8: 15710210Sandreas.hansson@arm.com fault = xc->write((uint64_t&)Mem, EA, flags, 0); 15810212Sandreas.hansson@arm.com break; 15910212Sandreas.hansson@arm.com default: 16010212Sandreas.hansson@arm.com panic("Bad operand size %d for write at %#x.\n", dataSize, EA); 1619243SN/A } 1629243SN/A return fault; 1639243SN/A } 1649831SN/A 1659831SN/A uint64_t 16610146Sandreas.hansson@arm.com get(PacketPtr pkt) const 16710394Swendy.elsasser@arm.com { 16810394Swendy.elsasser@arm.com switch(dataSize) 16910394Swendy.elsasser@arm.com { 1709489SN/A case 1: 1719243SN/A return pkt->get<uint8_t>(); 17210394Swendy.elsasser@arm.com case 2: 17310394Swendy.elsasser@arm.com return pkt->get<uint16_t>(); 17410394Swendy.elsasser@arm.com case 4: 17510394Swendy.elsasser@arm.com return pkt->get<uint32_t>(); 17610394Swendy.elsasser@arm.com case 8: 17710394Swendy.elsasser@arm.com return pkt->get<uint64_t>(); 1789243SN/A default: 1799489SN/A panic("Bad operand size %d for read at %#x.\n", 1809243SN/A dataSize, pkt->getAddr()); 1819243SN/A } 1829243SN/A } 1839489SN/A }; 1849243SN/A} 18510393Swendy.elsasser@arm.com 18610393Swendy.elsasser@arm.com#endif //__ARCH_X86_INSTS_MICROLDSTOP_HH__ 1879243SN/A